From 434940e082331329cf6f7dba5c036826ce7f2cba Mon Sep 17 00:00:00 2001 From: Ryder Lee Date: Thu, 24 Sep 2020 23:23:13 +0800 Subject: [PATCH] mt76: mt7915: measure channel noise and report it via survey Read per-stream measurements every 100 ms and build a simple moving average. Tested-by: Shayne Chen Signed-off-by: Ryder Lee Signed-off-by: Felix Fietkau --- mt7915/mac.c | 50 +++++++++++++++++++++++++++++++++++++++++++------ mt7915/main.c | 2 ++ mt7915/mt7915.h | 1 + mt7915/regs.h | 8 ++++++++ 4 files changed, 55 insertions(+), 6 deletions(-) diff --git a/mt7915/mac.c b/mt7915/mac.c index ad628951c..a7118df7b 100644 --- a/mt7915/mac.c +++ b/mt7915/mac.c @@ -1136,17 +1136,49 @@ void mt7915_mac_set_timing(struct mt7915_phy *phy) MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE); } -/* - * TODO: mib counters are read-clear and there're many HE functionalities need - * such info, hence firmware prepares a task to read the fields out to a shared - * structure. User should switch to use event format to avoid race condition. - */ +void mt7915_mac_enable_nf(struct mt7915_dev *dev, bool ext_phy) +{ + mt7915_l2_set(dev, MT_WF_PHY_RXTD12(ext_phy), + MT_WF_PHY_RXTD12_IRPI_SW_CLR_ONLY | + MT_WF_PHY_RXTD12_IRPI_SW_CLR); + + mt7915_l2_set(dev, MT_WF_PHY_RX_CTRL1(ext_phy), + FIELD_PREP(MT_WF_PHY_RX_CTRL1_IPI_EN, 0x5)); +} + +static u8 +mt7915_phy_get_nf(struct mt7915_phy *phy, int idx) +{ + static const u8 nf_power[] = { 92, 89, 86, 83, 80, 75, 70, 65, 60, 55, 52 }; + struct mt7915_dev *dev = phy->dev; + u32 val, sum = 0, n = 0; + int nss, i; + + /* TODO: DBDC: 0,1 for 2.4G, 2,3 for 5G */ + for (nss = 0; nss < hweight8(phy->chainmask); nss++) { + u32 reg = MT_WF_IRPI(nss); + + for (i = 0; i < ARRAY_SIZE(nf_power); i++, reg += 4) { + val = mt7915_l2_rr(dev, reg); + sum += val * nf_power[i]; + n += val; + } + } + + if (!n) + return 0; + + return sum / n; +} + static void mt7915_phy_update_channel(struct mt76_phy *mphy, int idx) { struct mt7915_dev *dev = container_of(mphy->dev, struct mt7915_dev, mt76); + struct mt7915_phy *phy = (struct mt7915_phy *)mphy->priv; struct mt76_channel_state *state; u64 busy_time, tx_time, rx_time, obss_time; + int nf; busy_time = mt76_get_field(dev, MT_MIB_SDR9(idx), MT_MIB_SDR9_BUSY_MASK); @@ -1157,12 +1189,18 @@ mt7915_phy_update_channel(struct mt76_phy *mphy, int idx) obss_time = mt76_get_field(dev, MT_WF_RMAC_MIB_AIRTIME14(idx), MT_MIB_OBSSTIME_MASK); - /* TODO: state->noise */ + nf = mt7915_phy_get_nf(phy, idx); + if (!phy->noise) + phy->noise = nf << 4; + else if (nf) + phy->noise += nf - (phy->noise >> 4); + state = mphy->chan_state; state->cc_busy += busy_time; state->cc_tx += tx_time; state->cc_rx += rx_time + obss_time; state->cc_bss_rx += rx_time; + state->noise = -(phy->noise >> 4); } void mt7915_update_channel(struct mt76_dev *mdev) diff --git a/mt7915/main.c b/mt7915/main.c index e9b342749..32731be7a 100644 --- a/mt7915/main.c +++ b/mt7915/main.c @@ -34,12 +34,14 @@ static int mt7915_start(struct ieee80211_hw *hw) mt7915_mcu_set_pm(dev, 0, 0); mt7915_mcu_set_mac(dev, 0, true, false); mt7915_mcu_set_scs(dev, 0, true); + mt7915_mac_enable_nf(dev, 0); } if (phy != &dev->phy) { mt7915_mcu_set_pm(dev, 1, 0); mt7915_mcu_set_mac(dev, 1, true, false); mt7915_mcu_set_scs(dev, 1, true); + mt7915_mac_enable_nf(dev, 1); } mt7915_mcu_set_sku_en(phy, true); diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h index 91808723d..34ff77d6a 100644 --- a/mt7915/mt7915.h +++ b/mt7915/mt7915.h @@ -414,6 +414,7 @@ mt7915_l2_rmw(struct mt7915_dev *dev, u32 addr, u32 mask, u32 val) bool mt7915_mac_wtbl_update(struct mt7915_dev *dev, int idx, u32 mask); void mt7915_mac_reset_counters(struct mt7915_phy *phy); void mt7915_mac_cca_stats_reset(struct mt7915_phy *phy); +void mt7915_mac_enable_nf(struct mt7915_dev *dev, bool ext_phy); void mt7915_mac_write_txwi(struct mt7915_dev *dev, __le32 *txwi, struct sk_buff *skb, struct mt76_wcid *wcid, struct ieee80211_key_conf *key, bool beacon); diff --git a/mt7915/regs.h b/mt7915/regs.h index d69fae511..e4252c8c5 100644 --- a/mt7915/regs.h +++ b/mt7915/regs.h @@ -390,11 +390,19 @@ #define MT_PCIE_MAC(ofs) (MT_PCIE_MAC_BASE + (ofs)) #define MT_PCIE_MAC_INT_ENABLE MT_PCIE_MAC(0x188) +#define MT_WF_IRPI_BASE 0x83006000 +#define MT_WF_IRPI(ofs) (MT_WF_IRPI_BASE + ((ofs) << 16)) + /* PHY: band 0(0x83080000), band 1(0x83090000) */ #define MT_WF_PHY_BASE 0x83080000 #define MT_WF_PHY(ofs) (MT_WF_PHY_BASE + (ofs)) #define MT_WF_PHY_RX_CTRL1(_phy) MT_WF_PHY(0x2004 + ((_phy) << 16)) +#define MT_WF_PHY_RX_CTRL1_IPI_EN GENMASK(2, 0) #define MT_WF_PHY_RX_CTRL1_STSCNT_EN GENMASK(11, 9) +#define MT_WF_PHY_RXTD12(_phy) MT_WF_PHY(0x8230 + ((_phy) << 16)) +#define MT_WF_PHY_RXTD12_IRPI_SW_CLR_ONLY BIT(18) +#define MT_WF_PHY_RXTD12_IRPI_SW_CLR BIT(29) + #endif