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ath79: add support for AVM FRITZ!WLAN Repeater 450E
SOC: Qualcomm QCA9556 (Scorpion) 560MHz MIPS74Kc RAM: 64MB Zentel A3R12E40CBF DDR2 FLASH: 16MiB Winbond W25Q128 SPI NOR WLAN1: QCA9556 2.4 GHz 802.11b/g/n 3x3 INPUT: WPS button LED: Power, WiFi, LAN, RSSI indicator Serial: Header Next to Black metal shield Pinout is 3.3V - RX - TX - GND (Square Pad is 3.3V) The Serial setting is 115200-8-N-1. Installation via EVA: In the first seconds after Power is connected, the bootloader will listen for FTP connections on 192.168.178.1. Firmware can be uploaded like following: ftp> quote USER adam2 ftp> quote PASS adam2 ftp> binary ftp> debug ftp> passive ftp> quote MEDIA FLSH ftp> put openwrt-sysupgrade.bin mtd1 Note that this procedure might take up to two minutes. You need to powercycle the device afterwards to boot OpenWRT. Tested-by: Andreas Ziegler <dev@andreas-ziegler.de> Signed-off-by: David Bauer <mail@david-bauer.net>
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT | ||
/dts-v1/; | ||
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#include <dt-bindings/gpio/gpio.h> | ||
#include <dt-bindings/input/input.h> | ||
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#include "qca9557.dtsi" | ||
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/ { | ||
chosen { | ||
bootargs = "console=ttyS0,115200n8"; | ||
}; | ||
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keys { | ||
compatible = "gpio-keys"; | ||
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wps { | ||
label = "wps"; | ||
linux,code = <KEY_WPS_BUTTON>; | ||
gpios = <&gpio 4 GPIO_ACTIVE_HIGH>; | ||
}; | ||
}; | ||
}; | ||
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&uart { | ||
status = "okay"; | ||
}; | ||
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&spi { | ||
status = "okay"; | ||
num-cs = <1>; | ||
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flash@0 { | ||
compatible = "jedec,spi-nor"; | ||
reg = <0>; | ||
spi-max-frequency = <25000000>; | ||
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partitions { | ||
compatible = "fixed-partitions"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
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partition@0 { | ||
label = "urlader"; | ||
reg = <0x0 0x20000>; | ||
read-only; | ||
}; | ||
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partition@20000 { | ||
compatible = "avm,eva-firmware"; | ||
label = "firmware"; | ||
reg = <0x20000 0xee0000>; | ||
}; | ||
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partition@f00000 { | ||
label = "tffs (1)"; | ||
reg = <0xf00000 0x80000>; | ||
read-only; | ||
}; | ||
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partition@f80000 { | ||
label = "tffs (2)"; | ||
reg = <0xf80000 0x80000>; | ||
read-only; | ||
}; | ||
}; | ||
}; | ||
}; | ||
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&wmac { | ||
status = "okay"; | ||
qca,no-eeprom; | ||
}; | ||
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ð1 { | ||
status = "okay"; | ||
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phy-handle = <&phy0>; | ||
pll-data = <0x3000000 0x101 0x1313>; | ||
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gmac-config { | ||
device = <&gmac>; | ||
ge0-sgmii = <0>; | ||
}; | ||
}; | ||
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&mdio1 { | ||
status = "okay"; | ||
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phy0: ethernet-phy@0 { | ||
reg = <0>; | ||
}; | ||
}; |
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT | ||
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#include <dt-bindings/gpio/gpio.h> | ||
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#include "qca9556_avm_fritz-repeater.dtsi" | ||
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/ { | ||
compatible = "avm,fritz450e", "qca,qca9557"; | ||
model = "AVM FRITZ!WLAN Repeater 450E"; | ||
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aliases { | ||
led-boot = &led_power; | ||
led-failsafe = &led_power; | ||
led-running = &led_power; | ||
led-upgrade = &led_power; | ||
}; | ||
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leds { | ||
compatible = "gpio-leds"; | ||
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led_power: power { | ||
label = "fritz450e:green:power"; | ||
gpios = <&gpio 14 GPIO_ACTIVE_HIGH>; | ||
}; | ||
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wlan { | ||
label = "fritz450e:green:wlan"; | ||
gpios = <&gpio 15 GPIO_ACTIVE_LOW>; | ||
linux,default-trigger = "phy0tpt"; | ||
}; | ||
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lan { | ||
label = "fritz450e:green:lan"; | ||
gpios = <&gpio 13 GPIO_ACTIVE_LOW>; | ||
}; | ||
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rssi2 { | ||
label = "fritz450e:green:rssi2"; | ||
gpios = <&gpio 16 GPIO_ACTIVE_LOW>; | ||
}; | ||
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rssi3 { | ||
label = "fritz450e:green:rssi3"; | ||
gpios = <&gpio 17 GPIO_ACTIVE_LOW>; | ||
}; | ||
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rssi4 { | ||
label = "fritz450e:green:rssi4"; | ||
gpios = <&gpio 18 GPIO_ACTIVE_LOW>; | ||
}; | ||
}; | ||
}; | ||
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&gpio { | ||
/* | ||
* Wondered why rssi0 and rssi1 are missing? | ||
* | ||
* AVM seems to have run low on usable GPIO pins, so | ||
* instead of adding a shift register like they did for | ||
* the 1750E they figured out "Why not use the LEDs on | ||
* the AR8033?". | ||
* | ||
* EVA configures the PHY in a way it does not display | ||
* the link-state using it's LEDs. When we reset the PHY | ||
* using the reset-mechanism of the PHY subsystem, this | ||
* setting is cleared. | ||
* | ||
* We avoid this by keeping the reset line high. | ||
*/ | ||
phy-reset { | ||
gpio-hog; | ||
gpios = <11 GPIO_ACTIVE_HIGH>; | ||
output-high; | ||
line-name = "phy-reset"; | ||
}; | ||
}; |
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8d9c108
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@blocktrron
SOC in compatible is not matching SOC in DTS name(s). Is this intended?
8d9c108
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This is messy all over the target.
I've prepared a patchset for this, however i first have to confirm no SoC specific quirks are attached to these.
8d9c108
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@blocktrron FYI: #2482 (comment)
Discussed something similar for ramips a while ago.