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FS#4165 - Lamobo R1 network/switch broken with v21.02.1 #9153

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openwrt-bot opened this issue Nov 30, 2021 · 3 comments
Closed

FS#4165 - Lamobo R1 network/switch broken with v21.02.1 #9153

openwrt-bot opened this issue Nov 30, 2021 · 3 comments
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bug flyspray kernel release/21.02 target/sunxi

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@openwrt-bot openwrt-bot commented Nov 30, 2021

mistersixt:

OpenWrt v21.02.1 seems to have serious issues with the network/switch configuration while it is/was fine with 19.07.

Image tested is: openwrt-21.02.1-sunxi-cortexa7-lamobo_lamobo-r1-squashfs-sdcard.img.gz

Please find attached the corresponding part of the bootlog.

Kind regards, Joerg.

@ynezz ynezz added the target/sunxi label Mar 7, 2022
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@ynezz ynezz commented Mar 7, 2022

I'm also seeing some weird issue with link detection on my sunxi-cortexa7-sun7i-a20-olinuxino-lime2, I need to re-plug ethernet cable, sometimes twice to get the link up state. On 19.07.9 with 4.14 its fine, 4.19 was working fine as well (I've upgraded from some old snapshot to latest snapshot), 21.02 with 5.4 seems broken, master with 5.10 seems to be broken as well (upgraded from 4.19 to this snapshot).

@ynezz ynezz added bug kernel labels Mar 8, 2022
ynezz added a commit to ynezz/openwrt that referenced this issue Mar 8, 2022
a20-olinuxino-lime2 is currently having hard time with link detection of
certain 1000Mbit partners due to usage of generic PHY driver, probably
due to following missing workaround introduced in upstream in commit
3aed3e2a143c ("net: phy: micrel: add Asym Pause workaround"):

 The Micrel KSZ9031 PHY may fail to establish a link when the Asymmetric
 Pause capability is set. This issue is described in a Silicon Errata
 (DS80000691D or DS80000692D), which advises to always disable the
 capability. This patch implements the workaround by defining a KSZ9031
 specific get_feature callback to force the Asymmetric Pause capability
 bit to be cleared.

 This fixes issues where the link would not come up at boot time, or when
 the Asym Pause bit was set later on.

As a20-olinuxino-lime2 has Micrel KSZ9031RNXCC-TR Gigabit PHY since
revision H we need to use Micrel PHY driver on those devices.

Fixes openwrt#9153
Signed-off-by: Petr Štetiar <ynezz@true.cz>
ynezz added a commit to ynezz/openwrt that referenced this issue Mar 8, 2022
This reverts upstream commit 55dd7e059098ce4bd0a55c251cb78e74604abb57 as
it breaks network on my A20-olinuxino-lime2 hardware revision "K" which
has Micrel KSZ9031RNXCC-TR Gigabit PHY. Bastien has probably some
previous hardware revisions which were based on RTL8211E-VB-CG1 PHY and
thus this fix was working on his board.

Fixes openwrt#9153
References: https://lore.kernel.org/all/20220308125531.27305-1-ynezz@true.cz/
Signed-off-by: Petr Štetiar <ynezz@true.cz>
@ynezz ynezz self-assigned this Mar 8, 2022
@ynezz ynezz added the release/21.02 label Mar 8, 2022
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@ynezz ynezz commented Mar 8, 2022

Seems to be working fine using ynezz@3a979af and ynezz@4bafaf9 fixes.

@ynezz
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@ynezz ynezz commented Mar 8, 2022

Actually this seems to be probably duplicate of #7817 and mine issues are only related to olimex-lime2 board.

@ynezz ynezz closed this Mar 8, 2022
ynezz added a commit to ynezz/openwrt that referenced this issue Mar 8, 2022
a20-olinuxino-lime2 is currently having hard time with link detection of
certain 1000Mbit partners due to usage of generic PHY driver, probably
due to following missing workaround introduced in upstream in commit
3aed3e2a143c ("net: phy: micrel: add Asym Pause workaround"):

 The Micrel KSZ9031 PHY may fail to establish a link when the Asymmetric
 Pause capability is set. This issue is described in a Silicon Errata
 (DS80000691D or DS80000692D), which advises to always disable the
 capability. This patch implements the workaround by defining a KSZ9031
 specific get_feature callback to force the Asymmetric Pause capability
 bit to be cleared.

 This fixes issues where the link would not come up at boot time, or when
 the Asym Pause bit was set later on.

As a20-olinuxino-lime2 has Micrel KSZ9031RNXCC-TR Gigabit PHY since
revision H we need to use Micrel PHY driver on those devices.

Fixes openwrt#9153
Signed-off-by: Petr Štetiar <ynezz@true.cz>
ynezz added a commit to ynezz/openwrt that referenced this issue Mar 8, 2022
This reverts upstream commit 55dd7e059098ce4bd0a55c251cb78e74604abb57 as
it breaks network on my A20-olinuxino-lime2 hardware revision "K" which
has Micrel KSZ9031RNXCC-TR Gigabit PHY. Bastien has probably some
previous hardware revisions which were based on RTL8211E-VB-CG1 PHY and
thus this fix was working on his board.

Fixes openwrt#9153
References: https://lore.kernel.org/all/20220308125531.27305-1-ynezz@true.cz/
Signed-off-by: Petr Štetiar <ynezz@true.cz>
ynezz added a commit to ynezz/openwrt that referenced this issue Mar 15, 2022
a20-olinuxino-lime2 is currently having hard time with link detection of
certain 1000Mbit partners due to usage of generic PHY driver, probably
due to following missing workaround introduced in upstream in commit
3aed3e2a143c ("net: phy: micrel: add Asym Pause workaround"):

 The Micrel KSZ9031 PHY may fail to establish a link when the Asymmetric
 Pause capability is set. This issue is described in a Silicon Errata
 (DS80000691D or DS80000692D), which advises to always disable the
 capability. This patch implements the workaround by defining a KSZ9031
 specific get_feature callback to force the Asymmetric Pause capability
 bit to be cleared.

 This fixes issues where the link would not come up at boot time, or when
 the Asym Pause bit was set later on.

As a20-olinuxino-lime2 has Micrel KSZ9031RNXCC-TR Gigabit PHY since
revision H we need to use Micrel PHY driver on those devices.

Fixes openwrt#9153
Signed-off-by: Petr Štetiar <ynezz@true.cz>
ynezz added a commit to ynezz/openwrt that referenced this issue Mar 15, 2022
This reverts upstream commit 55dd7e059098ce4bd0a55c251cb78e74604abb57 as
it breaks network on my A20-olinuxino-lime2 hardware revision "K" which
has Micrel KSZ9031RNXCC-TR Gigabit PHY. Bastien has probably some
previous hardware revisions which were based on RTL8211E-VB-CG1 PHY and
thus this fix was working on his board.

Fixes openwrt#9153
References: https://lore.kernel.org/all/20220308125531.27305-1-ynezz@true.cz/
Signed-off-by: Petr Štetiar <ynezz@true.cz>
ynezz added a commit to ynezz/openwrt that referenced this issue Mar 15, 2022
a20-olinuxino-lime2 is currently having hard time with link detection of
certain 1000Mbit partners due to usage of generic PHY driver, probably
due to following missing workaround introduced in upstream in commit
3aed3e2a143c ("net: phy: micrel: add Asym Pause workaround"):

 The Micrel KSZ9031 PHY may fail to establish a link when the Asymmetric
 Pause capability is set. This issue is described in a Silicon Errata
 (DS80000691D or DS80000692D), which advises to always disable the
 capability. This patch implements the workaround by defining a KSZ9031
 specific get_feature callback to force the Asymmetric Pause capability
 bit to be cleared.

 This fixes issues where the link would not come up at boot time, or when
 the Asym Pause bit was set later on.

As a20-olinuxino-lime2 has Micrel KSZ9031RNXCC-TR Gigabit PHY since
revision H we need to use Micrel PHY driver on those devices.

Fixes openwrt#9153
Signed-off-by: Petr Štetiar <ynezz@true.cz>
ynezz added a commit to ynezz/openwrt that referenced this issue Mar 15, 2022
This reverts upstream commit 55dd7e059098ce4bd0a55c251cb78e74604abb57 as
it breaks network on my A20-olinuxino-lime2 hardware revision "K" which
has Micrel KSZ9031RNXCC-TR Gigabit PHY. Bastien has probably some
previous hardware revisions which were based on RTL8211E-VB-CG1 PHY and
thus this fix was working on his board.

Fixes openwrt#9153
References: https://lore.kernel.org/all/20220308125531.27305-1-ynezz@true.cz/
Signed-off-by: Petr Štetiar <ynezz@true.cz>
fengguang pushed a commit to 0day-ci/linux that referenced this issue Mar 15, 2022
This reverts commit 55dd7e0 as it
breaks network on my A20-olinuxino-lime2 hardware revision "K" which has
Micrel KSZ9031RNXCC-TR Gigabit PHY. Bastien has probably some previous
hardware revisions which were based on RTL8211E-VB-CG1 PHY and thus this
fix was working on his board.

Cc: stable@vger.kernel.org
Cc: Bastien Roucariès <rouca@debian.org>
References: openwrt/openwrt#9153
References: https://github.com/OLIMEX/OLINUXINO/blob/master/HARDWARE/A20-OLinuXino-LIME2/hardware_revision_changes_log.txt
Signed-off-by: Petr Štetiar <ynezz@true.cz>
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