{"payload":{"pageCount":1,"repositories":[{"type":"Public","name":"hdl-modules","owner":"hdl-modules","isFork":false,"description":"A collection of reusable, high-quality, peer-reviewed VHDL building blocks.","allTopics":["asic","fpga","hardware","amd","vhdl","intel","eda","rtl","ip","xilinx","vivado","altera","fifo","cdc","axi","microsemi","clock-domain-crossing","asynchronous-fifo","axi-lite","efinix"],"primaryLanguage":{"name":"VHDL","color":"#adb2cb"},"pullRequestCount":0,"issueCount":0,"starsCount":82,"forksCount":10,"license":"BSD 3-Clause \"New\" or \"Revised\" License","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-07-12T12:20:13.808Z"}}],"repositoryCount":1,"userInfo":null,"searchable":true,"definitions":[],"typeFilters":[{"id":"all","text":"All"},{"id":"public","text":"Public"},{"id":"source","text":"Sources"},{"id":"fork","text":"Forks"},{"id":"archived","text":"Archived"},{"id":"template","text":"Templates"}],"compactMode":false},"title":"hdl-modules repositories"}