{"payload":{"pageCount":1,"repositories":[{"type":"Public","name":"edalize","owner":"warclab","isFork":true,"description":"An abstraction library for interfacing EDA tools","allTopics":[],"primaryLanguage":{"name":"Python","color":"#3572A5"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":184,"license":"BSD 2-Clause \"Simplified\" License","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2021-09-15T14:47:44.850Z"}},{"type":"Public","name":"fusesoc","owner":"warclab","isFork":true,"description":"Package manager and build abstraction tool for FPGA/ASIC development","allTopics":[],"primaryLanguage":{"name":"Python","color":"#3572A5"},"pullRequestCount":0,"issueCount":0,"starsCount":1,"forksCount":237,"license":"BSD 2-Clause \"Simplified\" License","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2021-09-15T14:47:29.300Z"}},{"type":"Public","name":"warc-cores","owner":"warclab","isFork":false,"description":"FuseSoC cores","allTopics":[],"primaryLanguage":null,"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":0,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2021-09-07T16:18:02.526Z"}},{"type":"Public","name":"hls-examples","owner":"warclab","isFork":false,"description":"WARC lab HLS examples","allTopics":[],"primaryLanguage":{"name":"C++","color":"#f34b7d"},"pullRequestCount":0,"issueCount":0,"starsCount":1,"forksCount":0,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2021-05-16T12:36:25.838Z"}},{"type":"Public","name":"xilinx-userspace-dma","owner":"warclab","isFork":false,"description":"Forked version of xilinx_dma driver that support kernel v4.19","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":0,"issueCount":0,"starsCount":3,"forksCount":0,"license":"MIT License","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2021-04-13T21:51:17.530Z"}},{"type":"Public template","name":"ieee-template","owner":"warclab","isFork":false,"description":"LaTeX Template for IEEE Transactions Format","allTopics":[],"primaryLanguage":{"name":"TeX","color":"#3D6117"},"pullRequestCount":0,"issueCount":0,"starsCount":1,"forksCount":0,"license":"MIT License","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2020-08-17T10:52:04.110Z"}},{"type":"Public","name":"idea","owner":"warclab","isFork":false,"description":"iDEA FPGA Soft Processor","allTopics":[],"primaryLanguage":{"name":"Verilog","color":"#b2b7f8"},"pullRequestCount":0,"issueCount":2,"starsCount":14,"forksCount":6,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2016-06-09T02:11:41.741Z"}},{"type":"Public","name":"dyract","owner":"warclab","isFork":false,"description":"DyRACT Open Source Repository","allTopics":[],"primaryLanguage":{"name":"Verilog","color":"#b2b7f8"},"pullRequestCount":0,"issueCount":1,"starsCount":16,"forksCount":4,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2016-05-04T18:39:16.852Z"}},{"type":"Public","name":"zycap","owner":"warclab","isFork":false,"description":"Zynq PR Management","allTopics":[],"primaryLanguage":{"name":"VHDL","color":"#adb2cb"},"pullRequestCount":0,"issueCount":1,"starsCount":11,"forksCount":11,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2016-04-20T03:50:45.097Z"}},{"type":"Public","name":"bib","owner":"warclab","isFork":false,"description":"","allTopics":[],"primaryLanguage":{"name":"TeX","color":"#3D6117"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":0,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2014-11-17T07:38:21.551Z"}},{"type":"Public","name":"prcontrol","owner":"warclab","isFork":false,"description":"Partial Reconfiguration Controller for Xilinx FPGAs","allTopics":[],"primaryLanguage":{"name":"Verilog","color":"#b2b7f8"},"pullRequestCount":0,"issueCount":0,"starsCount":9,"forksCount":9,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2012-09-13T11:30:56.000Z"}},{"type":"Public","name":"archntu.github.com","owner":"warclab","isFork":false,"description":"Arch at NTU","allTopics":[],"primaryLanguage":null,"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":0,"license":null,"participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2012-08-13T07:15:15.000Z"}}],"repositoryCount":12,"userInfo":null,"searchable":true,"definitions":[],"typeFilters":[{"id":"all","text":"All"},{"id":"public","text":"Public"},{"id":"source","text":"Sources"},{"id":"fork","text":"Forks"},{"id":"archived","text":"Archived"},{"id":"template","text":"Templates"}],"compactMode":false},"title":"warclab repositories"}