From febf7f9e52fbd3dbd7aeab15b8c84f96facde610 Mon Sep 17 00:00:00 2001
From: Sarmad Salman <106231344+Sarmad-Salman@users.noreply.github.com>
Date: Mon, 21 Oct 2024 19:39:19 +0300
Subject: [PATCH 1/2] wrong wire name

---
 .../primitives_mapping/FIFO/fifo36k_to_rs_tdp_36k_mapping.v     | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sim_models/primitives_mapping/FIFO/fifo36k_to_rs_tdp_36k_mapping.v b/sim_models/primitives_mapping/FIFO/fifo36k_to_rs_tdp_36k_mapping.v
index 3f1ada6..3ee781c 100644
--- a/sim_models/primitives_mapping/FIFO/fifo36k_to_rs_tdp_36k_mapping.v
+++ b/sim_models/primitives_mapping/FIFO/fifo36k_to_rs_tdp_36k_mapping.v
@@ -62,7 +62,7 @@ wire [17:0] unused_rdataA2;
 
 assign OVERFLOW = fifo_flags[0];
 assign PROG_FULL = fifo_flags[1];
-assign ALMOST_EMPTY = fifo_flags[2];
+assign ALMOST_FULL = fifo_flags[2];
 assign FULL = fifo_flags[3];
 assign UNDERFLOW = fifo_flags[4];
 assign PROG_EMPTY = fifo_flags[5];

From 0a632eaba1d4d0654f234de45b3e9598abb6c4c8 Mon Sep 17 00:00:00 2001
From: Sarmad Salman <106231344+Sarmad-Salman@users.noreply.github.com>
Date: Mon, 21 Oct 2024 19:41:57 +0300
Subject: [PATCH 2/2] corrected wire name

---
 .../primitives_mapping/FIFO/fifo18kx2_to_rs_tdp_36k_mapping.v | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sim_models/primitives_mapping/FIFO/fifo18kx2_to_rs_tdp_36k_mapping.v b/sim_models/primitives_mapping/FIFO/fifo18kx2_to_rs_tdp_36k_mapping.v
index 8f2eb36..efc0f25 100644
--- a/sim_models/primitives_mapping/FIFO/fifo18kx2_to_rs_tdp_36k_mapping.v
+++ b/sim_models/primitives_mapping/FIFO/fifo18kx2_to_rs_tdp_36k_mapping.v
@@ -107,7 +107,7 @@ wire [17:0] fifo2_flags;
 
 assign OVERFLOW1 = fifo1_flags[0];
 assign PROG_FULL1 = fifo1_flags[1];
-assign ALMOST_EMPTY1 = fifo1_flags[2];
+assign ALMOST_FULL1 = fifo1_flags[2];
 assign FULL1 = fifo1_flags[3];
 assign UNDERFLOW1 = fifo1_flags[4];
 assign PROG_EMPTY1 = fifo1_flags[5];
@@ -116,7 +116,7 @@ assign EMPTY1 = fifo1_flags[7];
 
 assign OVERFLOW2 = fifo2_flags[0];
 assign PROG_FULL2 = fifo2_flags[1];
-assign ALMOST_EMPTY2 = fifo2_flags[2];
+assign ALMOST_FULL2 = fifo2_flags[2];
 assign FULL2 = fifo2_flags[3];
 assign UNDERFLOW2 = fifo2_flags[4];
 assign PROG_EMPTY2 = fifo2_flags[5];