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…pec requirements for MLBAR. With that, we can boot successfully on Windows now with an NVMe boot drive!
pfmooney
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Windows stornvme.sys masks the NVMe BAR0 value with 0xFFFFC000 inside NVMeHwFindAdapter, enforcing the NVMe 1.0e section 2.1.10 MLBAR requirement that bits 13:04 be reserved. This effectively requires BAR0 to be at least 16 KB so that PCI places it on a 16 KB aligned boundary. With the default NVMF_VFIO_USER_MAX_QPAIRS_PER_CTRLR (512), the computed NVME_REG_BAR0_SIZE is 0x2000 (8 KB). PCI is free to place the BAR on an 8 KB aligned address that the mask then corrupts; NVMeHwFindAdapter returns SP_RETURN_BAD_CONFIG with fault text "MLBAR/MUBAR is not valid", surfacing as Windows Code 10 (STATUS_DEVICE_CONFIGURATION_ERROR) on hot-add or STOP 0x7B INACCESSIBLE_BOOT_DEVICE on the boot disk. Add a 16 KB floor to NVME_REG_BAR0_SIZE. For higher MAX_QPAIRS the natural computed size is used unchanged. Propolis (Oxide) fixed the identical bug with the same approach in 2022: oxidecomputer/propolis#126 Tested on Windows Server 2025 with Cloud Hypervisor main and upstream QEMU 10.2. Fixes #2576 Change-Id: Ie916cb3dd3bf0157acd89b08ce54bda3d45dce9d Signed-off-by: Max Makarov <maxpain@linux.com> Reviewed-on: https://review.spdk.io/c/spdk/spdk/+/28341 Reviewed-by: John Levon <levon@movementarian.org> Tested-by: SPDK Automated Test System <spdkbot@gmail.com> Reviewed-by: Tomasz Zawadzki <tomasz@tzawadzki.com> Reviewed-by: Changpeng Liu <changpeliu@tencent.com> Community-CI: Mellanox Build Bot Reviewed-by: Thanos Makatos <thanos.makatos@nutanix.com>
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The NVMe spec implies [1] a minimum size of 0x4000 for the controller register space. Windows thus expects
BAR0 & !(0x4000 - 1) == BAR0 & !0xFto hold true. Which is all fine and well except Propolis sets the size to 0x2000 meaning we end up in this failing scenario whereBAR0 = 0xFEDFE004and so the above relation no longer holds true.TL;DR: propolis set the NVMe controller register space to half the size it should at least be.
[1] Bits 13:04 should be set to 0.
See NVMe 1.0e Section 2.1.10 Offset 10h: MLBAR (BAR0) - Memory Register Base Address, lower 32 bits: