diff --git a/sw/airborne/arch/stm32/mcu_periph/i2c_arch.c b/sw/airborne/arch/stm32/mcu_periph/i2c_arch.c
index 4e0100f716d..0a3992dda19 100644
--- a/sw/airborne/arch/stm32/mcu_periph/i2c_arch.c
+++ b/sw/airborne/arch/stm32/mcu_periph/i2c_arch.c
@@ -1220,8 +1220,10 @@ void i2c_setbitrate(struct i2c_periph *periph, int bitrate)
     if (bitrate < 3000)
       bitrate = 3000;
 
-    // 36MHz, fast scl: 2counts low 1 count high -> / 3:
-    devider = 18000 / (bitrate/1000);
+    // rcc_ppre1_frequency is normally configured to max: 36MHz on F1 and 42MHz on F4
+    // in fast mode: 2counts low 1 count high -> / 3:
+    // in standard mode: 1 count low, 1 count high -> /2:
+    devider = (rcc_ppre1_frequency/2000) / (bitrate/1000);
 
     // never allow faster than 600kbps
     if (devider < 20)
@@ -1249,12 +1251,16 @@ void i2c_setbitrate(struct i2c_periph *periph, int bitrate)
     i2c_peripheral_disable(i2c);
 
     // 1)
-    I2C_CR2(i2c) = 0x0324;
+#ifdef STM32F1
+    i2c_set_clock_frequency(i2c, I2C_CR2_FREQ_36MHZ);
+#else // STM32F4
+    i2c_set_clock_frequency(i2c, I2C_CR2_FREQ_42MHZ);
+#endif
     // 2)
-    //I2C_CCR(i2c) = 0x8000 + devider;
-    I2C_CCR(i2c) = 0x0000 + devider;
+    //i2c_set_fast_mode(i2c);
+    i2c_set_ccr(i2c, devider);
     // 3)
-    I2C_TRISE(i2c) = risetime;
+    i2c_set_trise(i2c, risetime);
 
     // Re-Enable
     i2c_peripheral_enable(i2c);