| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,192 @@ | ||
| /* | ||
| * Copyright (C) 2022 Freek van Tienen <freek.v.tienen@gmail.com> | ||
| * | ||
| * This file is part of paparazzi. | ||
| * | ||
| * paparazzi is free software; you can redistribute it and/or modify | ||
| * it under the terms of the GNU General Public License as published by | ||
| * the Free Software Foundation; either version 2, or (at your option) | ||
| * any later version. | ||
| * | ||
| * paparazzi is distributed in the hope that it will be useful, | ||
| * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| * GNU General Public License for more details. | ||
| * | ||
| * You should have received a copy of the GNU General Public License | ||
| * along with paparazzi; see the file COPYING. If not, write to | ||
| * the Free Software Foundation, 59 Temple Place - Suite 330, | ||
| * Boston, MA 02111-1307, USA. | ||
| */ | ||
|
|
||
| /** | ||
| * @file peripherals/invensense3.h | ||
| * | ||
| * Driver for the Invensense V3 IMUs | ||
| * ICM40605, ICM40609, ICM42605, IIM42652 and ICM42688 | ||
| */ | ||
|
|
||
| #ifndef INVENSENSE3_H | ||
| #define INVENSENSE3_H | ||
|
|
||
| #include "std.h" | ||
| #include "mcu_periph/spi.h" | ||
| #include "mcu_periph/i2c.h" | ||
|
|
||
| /* This sensor has an option to request little-endian data */ | ||
| // Hold 22 measurements + 3 for the register address and length | ||
| #define INVENSENSE3_FIFO_BUFFER_LEN 22 | ||
| #define INVENSENSE3_BUFFER_SIZE INVENSENSE3_FIFO_BUFFER_LEN * 20 + 3 // 20 bytes is the maximum sample size | ||
|
|
||
| /* Invensense v3 SPI peripheral */ | ||
| struct invensense3_spi_t { | ||
| struct spi_periph *p; ///< Peripheral device for communication | ||
| uint8_t slave_idx; ///< Slave index used for Slave Select | ||
| struct spi_transaction trans; ///< Transaction used during configuration and measurements | ||
|
|
||
| uint8_t tx_buf[2]; ///< Transmit buffer | ||
| uint8_t rx_buf[INVENSENSE3_BUFFER_SIZE]; ///< Receive buffer | ||
| }; | ||
|
|
||
| /* Invensense v3 I2C peripheral */ | ||
| struct invensense3_i2c_t { | ||
| struct i2c_periph *p; ///< Peripheral device for communication | ||
| uint8_t slave_addr; ///< The I2C slave address on the bus | ||
| struct i2c_transaction trans; ///< TRansaction used during configuration and measurements | ||
| }; | ||
|
|
||
| /* Possible communication busses for the invense V3 driver */ | ||
| enum invensense3_bus_t { | ||
| INVENSENSE3_SPI, | ||
| INVENSENSE3_I2C | ||
| }; | ||
|
|
||
| /* Different states the invensense v3 driver can be in */ | ||
| enum invensense3_status_t { | ||
| INVENSENSE3_IDLE, | ||
| INVENSENSE3_CONFIG, | ||
| INVENSENSE3_RUNNING | ||
| }; | ||
|
|
||
| /* Different parsers of the invensense v3 driver */ | ||
| enum invensense3_parser_t { | ||
| INVENSENSE3_PARSER_REGISTERS, | ||
| INVENSENSE3_PARSER_FIFO | ||
| }; | ||
|
|
||
| enum invensense3_fifo_packet_t { | ||
| INVENSENSE3_SAMPLE_SIZE_PK1, | ||
| INVENSENSE3_SAMPLE_SIZE_PK2, | ||
| INVENSENSE3_SAMPLE_SIZE_PK3, | ||
| INVENSENSE3_SAMPLE_SIZE_PK4 | ||
| }; | ||
|
|
||
| /* Different device types compatible with the invensense v3 driver */ | ||
| enum invensense3_device_t { | ||
| INVENSENSE3_UNKOWN, | ||
| INVENSENSE3_ICM40605, | ||
| INVENSENSE3_ICM40609, | ||
| INVENSENSE3_ICM42605, | ||
| INVENSENSE3_IIM42652, | ||
| INVENSENSE3_ICM42688 | ||
| }; | ||
|
|
||
| /* The gyro output data rate configuration */ | ||
| enum invensense3_gyro_odr_t { | ||
| INVENSENSE3_GYRO_ODR_32KHZ = 1, ///< Not possible for ICM40605 and ICM42605 | ||
| INVENSENSE3_GYRO_ODR_16KHZ, ///< Not possible for ICM40605 and ICM42605 | ||
| INVENSENSE3_GYRO_ODR_8KHZ, | ||
| INVENSENSE3_GYRO_ODR_4KHZ, | ||
| INVENSENSE3_GYRO_ODR_2KHZ, | ||
| INVENSENSE3_GYRO_ODR_1KHZ, | ||
| INVENSENSE3_GYRO_ODR_200HZ, | ||
| INVENSENSE3_GYRO_ODR_100HZ, | ||
| INVENSENSE3_GYRO_ODR_50HZ, | ||
| INVENSENSE3_GYRO_ODR_25HZ, | ||
| INVENSENSE3_GYRO_ODR_12_5HZ, | ||
| INVENSENSE3_GYRO_ODR_6_25HZ, | ||
| INVENSENSE3_GYRO_ODR_3_125HZ, | ||
| INVENSENSE3_GYRO_ODR_1_5625HZ, | ||
| INVENSENSE3_GYRO_ODR_500HZ | ||
| }; | ||
|
|
||
| /* The gyro range in degrees per second(dps) */ | ||
| enum invensense3_gyro_range_t { | ||
| INVENSENSE3_GYRO_RANGE_2000DPS, | ||
| INVENSENSE3_GYRO_RANGE_1000DPS, | ||
| INVENSENSE3_GYRO_RANGE_500DPS, | ||
| INVENSENSE3_GYRO_RANGE_250DPS, | ||
| INVENSENSE3_GYRO_RANGE_125DPS, | ||
| INVENSENSE3_GYRO_RANGE_62_5DPS, | ||
| INVENSENSE3_GYRO_RANGE_31_25DPS, | ||
| INVENSENSE3_GYRO_RANGE_15_625DPS | ||
| }; | ||
|
|
||
| /* The accelerometer output data rate configuration */ | ||
| enum invensense3_accel_odr_t { | ||
| INVENSENSE3_ACCEL_ODR_32KHZ = 1, ///< Not possible for ICM40605 and ICM42605 | ||
| INVENSENSE3_ACCEL_ODR_16KHZ, ///< Not possible for ICM40605 and ICM42605 | ||
| INVENSENSE3_ACCEL_ODR_8KHZ, | ||
| INVENSENSE3_ACCEL_ODR_4KHZ, | ||
| INVENSENSE3_ACCEL_ODR_2KHZ, | ||
| INVENSENSE3_ACCEL_ODR_1KHZ, | ||
| INVENSENSE3_ACCEL_ODR_200HZ, | ||
| INVENSENSE3_ACCEL_ODR_100HZ, | ||
| INVENSENSE3_ACCEL_ODR_50HZ, | ||
| INVENSENSE3_ACCEL_ODR_25HZ, | ||
| INVENSENSE3_ACCEL_ODR_12_5HZ, | ||
| INVENSENSE3_ACCEL_ODR_6_25HZ, | ||
| INVENSENSE3_ACCEL_ODR_3_125HZ, | ||
| INVENSENSE3_ACCEL_ODR_1_5625HZ, | ||
| INVENSENSE3_ACCEL_ODR_500HZ | ||
| }; | ||
|
|
||
| /* The accelerometer range in G */ | ||
| enum invensense3_accel_range_t { | ||
| INVENSENSE3_ACCEL_RANGE_32G, ///< Only possible for ICM40609 | ||
| INVENSENSE3_ACCEL_RANGE_16G, | ||
| INVENSENSE3_ACCEL_RANGE_8G, | ||
| INVENSENSE3_ACCEL_RANGE_4G, | ||
| INVENSENSE3_ACCEL_RANGE_2G | ||
| }; | ||
|
|
||
| /* Main invensense v3 device structure */ | ||
| struct invensense3_t { | ||
| uint8_t abi_id; ///< The ABI id used to broadcast the device measurements | ||
| enum invensense3_status_t status; ///< Status of the invensense v3 device | ||
| enum invensense3_device_t device; ///< The device type detected | ||
| enum invensense3_parser_t parser; ///< Parser of the device | ||
|
|
||
| enum invensense3_bus_t bus; ///< The communication bus used to connect the device SPI/I2C | ||
| union { | ||
| struct invensense3_spi_t spi; ///< SPI specific configuration | ||
| struct invensense3_i2c_t i2c; ///< I2C specific configuration | ||
| }; | ||
| uint8_t* rx_buffer; | ||
| uint8_t* tx_buffer; | ||
| uint16_t* rx_length; | ||
|
|
||
| uint8_t register_bank; ///< The current register bank communicating with | ||
| uint8_t config_idx; ///< The current configuration index | ||
| uint32_t timer; ///< Used to time operations during configuration (samples left during measuring) | ||
|
|
||
| enum invensense3_gyro_odr_t gyro_odr; ///< Gyro Output Data Rate configuration | ||
| enum invensense3_gyro_range_t gyro_range; ///< Gyro range configuration | ||
| uint16_t gyro_aaf; ///< Gyro Anti-alias filter 3dB Bandwidth configuration [Hz] | ||
| uint16_t gyro_aaf_regs[4]; ///< Gyro Anti-alias filter register values | ||
| enum invensense3_accel_odr_t accel_odr; ///< Accelerometer Output Data Rate configuration | ||
| enum invensense3_accel_range_t accel_range; ///< Accelerometer range configuration | ||
| uint16_t accel_aaf; ///< Accelerometer Anti-alias filter 3dB Bandwidth configuration [Hz] | ||
| uint16_t accel_aaf_regs[4]; ///< Accelerometer Anti-alias filter register values | ||
| enum invensense3_fifo_packet_t sample_size; ///< FIFO packet size | ||
| int sample_numbers; ///< expected FIFO packet number, assuming reading at PERIODIC_FREQUENCY | ||
| float gyro_samplerate; ///< Sample rate in Hz from the gyro_odr | ||
| float accel_samplerate; ///< Sample rate in Hz from the accel_odr | ||
| }; | ||
|
|
||
| /* External functions */ | ||
| void invensense3_init(struct invensense3_t *inv); | ||
| void invensense3_periodic(struct invensense3_t *inv); | ||
| void invensense3_event(struct invensense3_t *inv); | ||
|
|
||
| #endif // INVENSENSE3_H |
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,190 @@ | ||
| /* | ||
| * Copyright (C) 2022 Freek van Tienen <freek.v.tienen@gmail.com> | ||
| * | ||
| * This file is part of paparazzi. | ||
| * | ||
| * paparazzi is free software; you can redistribute it and/or modify | ||
| * it under the terms of the GNU General Public License as published by | ||
| * the Free Software Foundation; either version 2, or (at your option) | ||
| * any later version. | ||
| * | ||
| * paparazzi is distributed in the hope that it will be useful, | ||
| * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| * GNU General Public License for more details. | ||
| * | ||
| * You should have received a copy of the GNU General Public License | ||
| * along with paparazzi; see the file COPYING. If not, write to | ||
| * the Free Software Foundation, 59 Temple Place - Suite 330, | ||
| * Boston, MA 02111-1307, USA. | ||
| */ | ||
|
|
||
| /** | ||
| * @file peripherals/invensense3_regs.h | ||
| * | ||
| * Register and address definitions for the Invensense V3 from ardupilot. | ||
| */ | ||
|
|
||
| #ifndef INVENSENSE3_REGS_H | ||
| #define INVENSENSE3_REGS_H | ||
|
|
||
| #define INV3_BANK0 0x00U | ||
| #define INV3_BANK1 0x01U | ||
| #define INV3_BANK2 0x02U | ||
| #define INV3_BANK3 0x03U | ||
|
|
||
|
|
||
| #define INV3REG(b, r) ((((uint16_t)b) << 8)|(r)) | ||
| #define INV3_READ_FLAG 0x80 | ||
|
|
||
| //Register Map | ||
| #define INV3REG_DEVICE_CONFIG INV3REG(INV3_BANK0,0x11U) | ||
| # define BIT_DEVICE_CONFIG_SOFT_RESET_CONFIG 0x01 | ||
| # define BIT_DEVICE_CONFIG_SPI_MODE 0x10 | ||
| #define INV3REG_FIFO_CONFIG INV3REG(INV3_BANK0,0x16U) | ||
| # define FIFO_CONFIG_MODE_BYPASS 0x00 | ||
| # define FIFO_CONFIG_MODE_STREAM_TO_FIFO 0x01 | ||
| # define FIFO_CONFIG_MODE_STOP_ON_FULL 0x02 | ||
| # define FIFO_CONFIG_MODE_SHIFT 0x06 | ||
| #define INV3REG_TEMP_DATA1 INV3REG(INV3_BANK0,0x1DU) | ||
| #define INV3REG_ACCEL_DATA_X1 INV3REG(INV3_BANK0,0x1FU) | ||
| #define INV3REG_INT_STATUS INV3REG(INV3_BANK0,0x2DU) | ||
| #define INV3REG_FIFO_COUNTH INV3REG(INV3_BANK0,0x2EU) | ||
| #define INV3REG_FIFO_COUNTL INV3REG(INV3_BANK0,0x2FU) | ||
| #define INV3REG_FIFO_DATA INV3REG(INV3_BANK0,0x30U) | ||
| #define INV3REG_SIGNAL_PATH_RESET INV3REG(INV3_BANK0,0x4BU) | ||
| # define BIT_SIGNAL_PATH_RESET_FIFO_FLUSH 0x02 | ||
| # define BIT_SIGNAL_PATH_RESET_TMST_STROBE 0x04 | ||
| # define BIT_SIGNAL_PATH_RESET_ABORT_AND_RESET 0x08 | ||
| # define BIT_SIGNAL_PATH_RESET_DMP_MEM_RESET_EN 0x20 | ||
| # define BIT_SIGNAL_PATH_RESET_DMP_INIT_EN 0x40 | ||
| #define INV3REG_INTF_CONFIG0 INV3REG(INV3_BANK0,0x4CU) | ||
| # define UI_SIFS_CFG_SPI_DIS 0x02 | ||
| # define UI_SIFS_CFG_I2C_DIS 0x03 | ||
| # define UI_SIFS_CFG_SHIFT 0x00 | ||
| # define SENSOR_DATA_BIG_ENDIAN 0x10 | ||
| # define FIFO_COUNT_BIG_ENDIAN 0x20 | ||
| # define FIFO_COUNT_REC 0x40 | ||
| # define FIFO_HOLD_LAST_DATA_EN 0x80 | ||
| #define INV3REG_PWR_MGMT0 INV3REG(INV3_BANK0,0x4EU) | ||
| # define ACCEL_MODE_OFF 0x00 | ||
| # define ACCEL_MODE_LN 0x03 | ||
| # define ACCEL_MODE_SHIFT 0x00 | ||
| # define GYRO_MODE_OFF 0x00 | ||
| # define GYRO_MODE_LN 0x03 | ||
| # define GYRO_MODE_SHIFT 0x02 | ||
| # define BIT_PWR_MGMT_IDLE 0x08 | ||
| # define BIT_PWM_MGMT_TEMP_DIS 0x10 | ||
| #define INV3REG_GYRO_CONFIG0 INV3REG(INV3_BANK0,0x4FU) | ||
| # define GYRO_ODR_32KHZ 0x01 | ||
| # define GYRO_ODR_16KHZ 0x02 | ||
| # define GYRO_ODR_8KHZ 0x03 | ||
| # define GYRO_ODR_4KHZ 0x04 | ||
| # define GYRO_ODR_2KHZ 0x05 | ||
| # define GYRO_ODR_1KHZ 0x06 | ||
| # define GYRO_ODR_200HZ 0x07 | ||
| # define GYRO_ODR_100HZ 0x08 | ||
| # define GYRO_ODR_50HZ 0x09 | ||
| # define GYRO_ODR_25HZ 0x0A | ||
| # define GYRO_ODR_12_5HZ 0x0B | ||
| # define GYRO_ODR_500HZ 0x0F | ||
| # define GYRO_ODR_SHIFT 0x00 | ||
| # define GYRO_FS_SEL_2000DPS 0x00 | ||
| # define GYRO_FS_SEL_1000DPS 0x01 | ||
| # define GYRO_FS_SEL_500DPS 0x02 | ||
| # define GYRO_FS_SEL_250DPS 0x03 | ||
| # define GYRO_FS_SEL_125DPS 0x04 | ||
| # define GYRO_FS_SEL_62_5DPS 0x05 | ||
| # define GYRO_FS_SEL_31_25DPS 0x06 | ||
| # define GYRO_FS_SEL_15_625DPS 0x07 | ||
| # define GYRO_FS_SEL_SHIFT 0x05 | ||
| #define INV3REG_ACCEL_CONFIG0 INV3REG(INV3_BANK0,0x50U) | ||
| # define ACCEL_ODR_32KHZ 0x01 | ||
| # define ACCEL_ODR_16KHZ 0x02 | ||
| # define ACCEL_ODR_8KHZ 0x03 | ||
| # define ACCEL_ODR_4KHZ 0x04 | ||
| # define ACCEL_ODR_2KHZ 0x05 | ||
| # define ACCEL_ODR_1KHZ 0x06 | ||
| # define ACCEL_ODR_200HZ 0x07 | ||
| # define ACCEL_ODR_100HZ 0x08 | ||
| # define ACCEL_ODR_50HZ 0x09 | ||
| # define ACCEL_ODR_25HZ 0x0A | ||
| # define ACCEL_ODR_12_5HZ 0x0B | ||
| # define ACCEL_ODR_6_25HZ 0x0C | ||
| # define ACCEL_ODR_3_125HZ 0x0D | ||
| # define ACCEL_ODR_1_5625HZ 0x0E | ||
| # define ACCEL_ODR_500HZ 0x0F | ||
| # define ACCEL_ODR_SHIFT 0x00 | ||
| # define ACCEL_FS_SEL_16G 0x00 | ||
| # define ACCEL_FS_SEL_8G 0x01 | ||
| # define ACCEL_FS_SEL_4G 0x02 | ||
| # define ACCEL_FS_SEL_2G 0x03 | ||
| # define ACCEL_FS_SEL_SHIFT 0x05 | ||
| #define INV3REG_GYRO_CONFIG1 INV3REG(INV3_BANK0,0x51U) | ||
| #define INV3REG_GYRO_ACCEL_CONFIG0 INV3REG(INV3_BANK0,0x52U) | ||
| #define INV3REG_ACCEL_CONFIG1 INV3REG(INV3_BANK0,0x53U) | ||
| #define INV3REG_TMST_CONFIG INV3REG(INV3_BANK0,0x54U) | ||
| # define BIT_TMST_CONFIG_TMST_EN 0x01 | ||
| #define INV3REG_FIFO_CONFIG1 INV3REG(INV3_BANK0,0x5FU) | ||
| # define BIT_FIFO_CONFIG1_ACCEL_EN 0x01 | ||
| # define BIT_FIFO_CONFIG1_GYRO_EN 0x02 | ||
| # define BIT_FIFO_CONFIG1_TEMP_EN 0x04 | ||
| # define BIT_FIFO_CONFIG1_TMST_FSYNC_EN 0x08 | ||
| # define BIT_FIFO_CONFIG1_HIRES_EN 0x10 | ||
| # define BIT_FIFO_CONFIG1_WM_GT_TH 0x20 | ||
| # define BIT_FIFO_CONFIG1_RESUME_PARTIAL_RD 0x40 | ||
| #define INV3REG_FIFO_CONFIG2 INV3REG(INV3_BANK0,0x60U) | ||
| #define INV3REG_FIFO_CONFIG3 INV3REG(INV3_BANK0,0x61U) | ||
| #define INV3REG_INT_SOURCE0 INV3REG(INV3_BANK0,0x65U) | ||
| #define INV3REG_INT_SOURCE3 INV3REG(INV3_BANK0,0x68U) | ||
| # define BIT_FIFO_FULL_INT_EN 0x02 | ||
| # define BIT_FIFO_THS_INT_EN 0x04 | ||
| # define BIT_UI_DRDY_INT_EN 0x08 | ||
| #define INV3REG_INT_CONFIG1 INV3REG(INV3_BANK0,0x64U) | ||
| # define BIT_INT_ASYNC_RESET 0x10 | ||
| #define INV3REG_WHO_AM_I INV3REG(INV3_BANK0,0x75U) | ||
| #define INV3REG_GYRO_CONFIG_STATIC2 INV3REG(INV3_BANK1,0x0BU) | ||
| # define BIT_GYRO_NF_DIS 0x01 | ||
| # define BIT_GYRO_AAF_DIS 0x02 | ||
| #define INV3REG_GYRO_CONFIG_STATIC3 INV3REG(INV3_BANK1,0x0CU) | ||
| # define GYRO_AAF_DELT_SHIFT 0x00 | ||
| #define INV3REG_GYRO_CONFIG_STATIC4 INV3REG(INV3_BANK1,0x0DU) | ||
| # define GYRO_AAF_DELTSQR_LOW_SHIFT 0x00 //[0:7] | ||
| #define INV3REG_GYRO_CONFIG_STATIC5 INV3REG(INV3_BANK1,0x0EU) | ||
| # define GYRO_AAF_DELTSQR_HIGH_SHIFT 0x00 //[11:8] | ||
| # define GYRO_AAF_BITSHIFT_SHIFT 0x04 | ||
| #define INV3REG_GYRO_CONFIG_STATIC6 INV3REG(INV3_BANK1,0x0FU) | ||
| # define GYRO_X_NF_COSWZ_LOW_SHIFT 0x00 //[0:7] | ||
| #define INV3REG_GYRO_CONFIG_STATIC7 INV3REG(INV3_BANK1,0x10U) | ||
| # define GYRO_Y_NF_COSWZ_LOW_SHIFT 0x00 //[0:7] | ||
| #define INV3REG_GYRO_CONFIG_STATIC8 INV3REG(INV3_BANK1,0x11U) | ||
| # define GYRO_Z_NF_COSWZ_LOW_SHIFT 0x00 //[0:7] | ||
| #define INV3REG_GYRO_CONFIG_STATIC9 INV3REG(INV3_BANK1,0x12U) | ||
| # define GYRO_X_NF_COSWZ_HIGH_SHIFT 0x00 //[8] | ||
| # define GYRO_Y_NF_COSWZ_HIGH_SHIFT 0x01 //[8] | ||
| # define GYRO_Z_NF_COSWZ_HIGH_SHIFT 0x02 //[8] | ||
| # define GYRO_X_NF_COSWZ_SEL_SHIFT 0x03 //[0] | ||
| # define GYRO_Y_NF_COSWZ_SEL_SHIFT 0x04 //[0] | ||
| # define GYRO_Z_NF_COSWZ_SEL_SHIFT 0x05 //[0] | ||
| #define INV3REG_GYRO_CONFIG_STATIC10 INV3REG(INV3_BANK1,0x13U) | ||
| # define GYRO_NF_BW_SEL_SHIFT 0x04 | ||
| #define INV3REG_ACCEL_CONFIG_STATIC2 INV3REG(INV3_BANK2,0x03U) | ||
| # define ACCEL_AAF_DIS 0x01 | ||
| # define ACCEL_AAF_DELT_SHIFT 0x01 | ||
| #define INV3REG_ACCEL_CONFIG_STATIC3 INV3REG(INV3_BANK2,0x04U) | ||
| # define ACCEL_AAF_DELTSQR_LOW_SHIFT 0x00 //[0:7] | ||
| #define INV3REG_ACCEL_CONFIG_STATIC4 INV3REG(INV3_BANK2,0x05U) | ||
| # define ACCEL_AAF_DELTSQR_HIGH_SHIFT 0x00 //[11:8] | ||
| # define ACCEL_AAF_BITSHIFT_SHIFT 0x04 | ||
|
|
||
| #define INV3REG_BANK_SEL 0x76 | ||
|
|
||
| // WHOAMI values | ||
| #define INV3_WHOAMI_ICM40605 0x33 | ||
| #define INV3_WHOAMI_ICM40609 0x3b | ||
| #define INV3_WHOAMI_ICM42605 0x42 | ||
| #define INV3_WHOAMI_ICM42688 0x47 | ||
| #define INV3_WHOAMI_IIM42652 0x6f | ||
| #define INV3_WHOAMI_ICM42670 0x67 | ||
|
|
||
| #endif /* INVENSENSE3_REGS_H */ |
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,13 @@ | ||
| { | ||
| "board_id": 1063, | ||
| "magic": "PX4FWv1", | ||
| "description": "Firmware for the CubePilot CubeOrange+ board", | ||
| "image": "", | ||
| "build_time": 0, | ||
| "summary": "CubeOrange+", | ||
| "version": "0.1", | ||
| "image_size": 0, | ||
| "image_maxsize": 1966080, | ||
| "git_identity": "", | ||
| "board_revision": 0 | ||
| } |