write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe5 0xe0 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x09 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x08 0x00 0x00 0x00 0x78 0x1f 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe5 0xa0 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x07 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x08 0x00 0x00 0x00 0x8f 0xcb 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe5 0x60 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x05 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x08 0x00 0x00 0x00 0x14 0x7a 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe5 0x20 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x03 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x08 0x00 0x00 0x00 0xcb 0x28 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe4 0xe0 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x01 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x08 0x00 0x00 0x00 0x50 0x99 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe4 0xe0 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x1c 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x08 0x00 0x00 0x00 0xef 0xef 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe8 0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x1a 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x08 0x00 0x00 0x00 0x30 0xbd 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe7 0xc0 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x18 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x08 0x00 0x00 0x00 0xab 0x0c 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe7 0x80 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x16 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x08 0x00 0x00 0x00 0x5c 0xd8 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe7 0x40 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x14 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x08 0x00 0x00 0x00 0xc7 0x69 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe7 0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x12 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x08 0x00 0x00 0x00 0x18 0x3b 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe6 0xc0 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x10 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x08 0x00 0x00 0x00 0x83 0x8a 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe6 0x80 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x0e 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x08 0x00 0x00 0x00 0x2e 0x74 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe6 0x40 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x0c 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x08 0x00 0x00 0x00 0xb5 0xc5 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe6 0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x0a 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x08 0x00 0x00 0x00 0x6a 0x97 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe5 0xc0 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x08 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x08 0x00 0x00 0x00 0xf1 0x26 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe5 0x80 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x06 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x08 0x00 0x00 0x00 0x06 0xf2 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe5 0x40 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x04 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x08 0x00 0x00 0x00 0x9d 0x43 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x12 (IrqFlags): (mode: LoRa)
	0x40 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
read (13 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x2e 0x88 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x3c 0x04 0x68 0x19 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe5 0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x02 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x80 0x00 0x00 0x00 0x62 0x75 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x12 (IrqFlags): (mode: LoRa)
	0x40 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
read (13 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x99 0x10 0x06 0x7e 0x1e 0xf2 0x1b 0x00 0x00 0x3c 0x04 0xcd 0xa4 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe4 0xc0 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x00 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x11 0x00 0x00 0x00 0x74 0x81 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x12 (IrqFlags): (mode: LoRa)
	0x40 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
read (13 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x2e 0x21 0x06 0x00 0x00 0x00 0x7e 0x1b 0x10 0x3c 0x04 0x99 0xd0 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe4 0xc0 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x1b 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x22 0x00 0x00 0x00 0xa1 0x2a 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x12 (IrqFlags): (mode: LoRa)
	0x40 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
read (13 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0xa7 0x32 0x06 0x10 0x02 0x00 0x00 0x00 0x00 0x3c 0x04 0x3c 0x69 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe7 0xe0 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x81 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x33 0x00 0x00 0x00 0x8d 0x84 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x12 (IrqFlags): (mode: LoRa)
	0x40 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
read (13 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x2e 0x03 0x06 0x7e 0x1b 0x10 0x00 0x01 0x00 0x3c 0x04 0x8d 0x6f 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe7 0xa0 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x82 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x00 0x00 0x00 0x2a 0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x12 (IrqFlags): (mode: LoRa)
	0x40 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
read (13 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0xaf 0x10 0x06 0x00 0x00 0x00 0x7e 0x1b 0x10 0x3c 0x04 0xaf 0x7e 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe7 0x60 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x83 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x11 0x00 0x00 0x00 0x87 0xbc 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x12 (IrqFlags): (mode: LoRa)
	0x40 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
read (13 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x2e 0x21 0x06 0x10 0x01 0x00 0x00 0x00 0x00 0x3c 0x04 0xdb 0x24 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe7 0x20 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x84 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x22 0x00 0x00 0x00 0x64 0x58 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x12 (IrqFlags): (mode: LoRa)
	0x40 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
read (13 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0xb2 0x32 0x06 0x7e 0x1b 0x10 0x40 0x08 0x0a 0x3c 0x04 0x18 0x41 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe6 0xe0 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x85 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x33 0x00 0x00 0x00 0xc9 0x67 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x12 (IrqFlags): (mode: LoRa)
	0x40 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
read (13 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x2e 0x03 0x06 0x00 0x00 0x00 0x7e 0x1b 0x10 0x3c 0x04 0x48 0xc8 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe6 0xa0 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x86 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x00 0x00 0x00 0x6e 0x60 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x12 (IrqFlags): (mode: LoRa)
	0x40 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
read (13 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0xb2 0x10 0x06 0x00 0x07 0xe8 0xff 0xff 0xff 0x3c 0x04 0xf3 0x77 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe6 0x60 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x87 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x11 0x00 0x00 0x00 0xc3 0x5f 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x12 (IrqFlags): (mode: LoRa)
	0x40 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
read (13 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x2e 0x21 0x06 0x7e 0x1b 0x10 0x10 0x07 0xf8 0x3c 0x04 0x74 0x95 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x09 (PaConfig): (mode: LoRa)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: LoRa)
	0xe6 0x20 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x1a 
write (1 bytes) reg 0x0e (FifoTxBaseAddr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0x3c 0x04 0x3b 0x88 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x22 0x00 0x00 0x00 0x08 0x3d 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x83 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
write (1 bytes) reg 0x11 (IrqFlagsMask): (mode: LoRa)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: LoRa)
	0x00 0x00 
write (1 bytes) reg 0x22 (PayloadLength): (mode: LoRa)
	0x0d 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x85 
write (1 bytes) reg 0x12 (IrqFlags): (mode: LoRa)
	0x40 
write (1 bytes) reg 0x0d (FifoAddrPtr): (mode: LoRa)
	0x00 
read (13 bytes) reg 0x00 (Fifo): (mode: LoRa)
	0xb2 0x32 0x06 0xff 0xff 0xff 0x7e 0x1b 0x10 0x3c 0x04 0x89 0x6d 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x80 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
read (1 bytes) reg 0x0a (PaRamp): (mode: FSK/OOK)
	0x09 
write (2 bytes) reg 0x02 (BitrateMsb): (mode: FSK/OOK)
	0x01 0x26 
write (2 bytes) reg 0x04 (FdevMsb): (mode: FSK/OOK)
	0x02 0xb8 
write (1 bytes) reg 0x10 (RssiThresh): (mode: FSK/OOK)
	0x00 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x12 (RxBw): (mode: FSK/OOK)
	0x02 
write (1 bytes) reg 0x13 (AfcBw): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x0d (RxConfig): (mode: FSK/OOK)
	0x08 
write (1 bytes) reg 0x0e (RssiConfig): (mode: FSK/OOK)
	0x06 
write (1 bytes) reg 0x26 (PreambleLsb): (mode: FSK/OOK)
	0x08 
write (1 bytes) reg 0x27 (SyncConfig): (mode: FSK/OOK)
	0x12 
write (1 bytes) reg 0x28 (SyncValue1): (mode: FSK/OOK)
	0x3e 
write (1 bytes) reg 0x29 (SyncValue2): (mode: FSK/OOK)
	0x6b 
write (1 bytes) reg 0x2a (SyncValue3): (mode: FSK/OOK)
	0x3e 
write (1 bytes) reg 0x30 (PacketConfig1): (mode: FSK/OOK)
	0x48 
write (1 bytes) reg 0x31 (PacketConfig2): (mode: FSK/OOK)
	0x40 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x09 (PaConfig): (mode: FSK/OOK)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: FSK/OOK)
	0xe5 0xe0 0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x09 0x1b 0x1f 0x12 0x00 0x00 0xf1 0x7f 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x33 0x00 0x00 0x00 0x89 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x03 0x06 0x20 0x07 0x54 0x00 0x00 0x00 0x3c 0x04 0xe9 0x4d 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x09 0x1b 0x1f 0x14 0x00 0x00 0x0c 0x40 0xff 0x07 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x00 0x00 0x00 0xc5 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0xb2 0x10 0x06 0x7e 0x1b 0x10 0x00 0x04 0x02 0x3c 0x04 0xbd 0xcc 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x09 0x1b 0x1f 0x16 0x00 0x00 0x01 0xc0 0x00 0xfc 0x7f 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x11 0x00 0x00 0x00 0x1e 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x21 0x06 0x00 0x00 0x00 0x7e 0x1b 0x10 0x3c 0x04 0x99 0xd0 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x09 (PaConfig): (mode: FSK/OOK)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: FSK/OOK)
	0xe5 0xa0 0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x07 0x1b 0x1f 0x18 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0xff 0x07 0x40 0x00 0x04 0x40 0x22 0x00 0x00 0x00 0xef 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0xb2 0x32 0x06 0x10 0x09 0x00 0x00 0x00 0x00 0x3c 0x04 0xe1 0x81 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x07 0x1b 0x1f 0x1a 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0xfc 0x7f 0x00 0x0c 0xc0 0x33 0x00 0x00 0x00 0x25 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x03 0x06 0x7e 0x1b 0x10 0x10 0x02 0x00 0x3c 0x04 0xff 0xad 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x07 0x1b 0x1f 0x1c 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0xff 0x07 0x40 0x00 0x00 0x00 0x00 0x3c 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0xb2 0x10 0x06 0x00 0x00 0x00 0x7e 0x1b 0x10 0x3c 0x04 0xf1 0x38 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x09 (PaConfig): (mode: FSK/OOK)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: FSK/OOK)
	0xe5 0x60 0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x05 0x1b 0x1f 0x1e 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0xfc 0x7f 0x11 0x00 0x00 0x00 0x8f 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x21 0x06 0x00 0x01 0x00 0x00 0x00 0x00 0x3c 0x04 0x81 0x0e 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x05 0x1b 0x1f 0x10 0x00 0xff 0x0f 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x22 0x00 0x00 0x00 0xb0 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0xb2 0x32 0x06 0x7e 0x1b 0x10 0x10 0x01 0x00 0x3c 0x04 0xd7 0x84 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x05 0x1b 0x1f 0x12 0x00 0x00 0xf1 0xff 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x33 0x00 0x00 0x00 0x7b 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x03 0x06 0x00 0x00 0x00 0x7e 0x1b 0x10 0x3c 0x04 0x48 0xc8 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x09 (PaConfig): (mode: FSK/OOK)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: FSK/OOK)
	0xe5 0x20 0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x03 0x1b 0x1f 0x14 0x00 0x00 0x0c 0x40 0xff 0x0f 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x00 0x00 0x00 0x9e 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0xb2 0x10 0x06 0x40 0x08 0x14 0x00 0x00 0x00 0x3c 0x04 0x6a 0xfd 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x03 0x1b 0x1f 0x16 0x00 0x00 0x01 0xc0 0x00 0xfc 0xff 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x11 0x00 0x00 0x00 0x0e 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x21 0x06 0x7e 0x1b 0x10 0x00 0x07 0xe8 0x3c 0x04 0x46 0x92 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x03 0x1b 0x1f 0x18 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0xff 0x0f 0x40 0x00 0x04 0x40 0x22 0x00 0x00 0x00 0x37 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0xb2 0x32 0x06 0xff 0xff 0xff 0x7e 0x1b 0x10 0x3c 0x04 0x89 0x6d 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x09 (PaConfig): (mode: FSK/OOK)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: FSK/OOK)
	0xe4 0xe0 0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x01 0x1b 0x1f 0x1a 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0xfc 0xff 0x00 0x0c 0xc0 0x33 0x00 0x00 0x00 0x0c 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x03 0x06 0x10 0x07 0xf8 0xff 0xff 0xff 0x3c 0x04 0x8b 0xad 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x01 0x1b 0x1f 0x1c 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0xff 0x0f 0x40 0x00 0x00 0x00 0x00 0xe5 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0xb2 0x10 0x06 0x7e 0x1b 0x10 0x10 0x09 0x00 0x3c 0x04 0x8f 0xbb 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x01 0x1b 0x1f 0x1e 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0xfc 0xff 0x11 0x00 0x00 0x00 0x01 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x21 0x06 0x00 0x00 0x00 0x7e 0x1b 0x10 0x3c 0x04 0x99 0xd0 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x09 (PaConfig): (mode: FSK/OOK)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: FSK/OOK)
	0xe4 0xe0 0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x1c 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x22 0x00 0x00 0x00 0xad 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0xb2 0x32 0x06 0x10 0x02 0x00 0x00 0x00 0x00 0x3c 0x04 0xc9 0xd6 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x1c 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x33 0x00 0x00 0x00 0x34 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x03 0x06 0x7e 0x1b 0x10 0x00 0x01 0x00 0x3c 0x04 0x8d 0x6f 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x1c 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x00 0x00 0x00 0x4f 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0xb2 0x10 0x06 0x00 0x00 0x00 0x7e 0x1b 0x10 0x3c 0x04 0xf1 0x38 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x09 (PaConfig): (mode: FSK/OOK)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: FSK/OOK)
	0xe8 0x00 0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x1a 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x11 0x00 0x00 0x00 0x40 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x21 0x06 0x10 0x01 0x00 0x00 0x00 0x00 0x3c 0x04 0xdb 0x24 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x1a 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x22 0x00 0x00 0x00 0x3b 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0xb2 0x32 0x06 0x7e 0x1b 0x10 0x00 0x07 0xe8 0x3c 0x04 0xff 0x62 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x1a 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x33 0x00 0x00 0x00 0xa2 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x03 0x06 0xff 0xff 0xff 0x7e 0x1b 0x10 0x3c 0x04 0xe1 0x85 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x09 (PaConfig): (mode: FSK/OOK)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: FSK/OOK)
	0xe7 0xc0 0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x18 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x00 0x00 0x00 0x56 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0xb2 0x10 0x06 0x10 0x07 0xf8 0xff 0xff 0xff 0x3c 0x04 0x32 0x5d 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x18 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x11 0x00 0x00 0x00 0xcf 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x21 0x06 0x7e 0x1b 0x10 0x20 0x07 0x54 0x3c 0x04 0xed 0x1b 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x18 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x22 0x00 0x00 0x00 0xb4 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0xb2 0x32 0x06 0x00 0x00 0x00 0x7e 0x1b 0x10 0x3c 0x04 0x20 0x20 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x09 (PaConfig): (mode: FSK/OOK)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: FSK/OOK)
	0xe7 0x80 0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x16 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x33 0x00 0x00 0x00 0x89 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x03 0x06 0x00 0x04 0x02 0x00 0x00 0x00 0x3c 0x04 0x72 0xfc 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x16 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x00 0x00 0x00 0xf2 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0xb2 0x10 0x06 0x7e 0x1b 0x10 0x10 0x09 0x00 0x3c 0x04 0x8f 0xbb 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x16 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x11 0x00 0x00 0x00 0x6b 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x21 0x06 0x00 0x00 0x00 0x7e 0x1b 0x10 0x3c 0x04 0x99 0xd0 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x10 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x80 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x81 
read (1 bytes) reg 0x31 (DetectOptimize): (mode: LoRa)
	0xc5 
write (1 bytes) reg 0x31 (DetectOptimize): (mode: LoRa)
	0xc5 
read (1 bytes) reg 0x1e (ModemConfig2): (mode: LoRa)
	0x60 
write (1 bytes) reg 0x1e (ModemConfig2): (mode: LoRa)
	0x60 
read (1 bytes) reg 0x1d (ModemConfig1): (mode: LoRa)
	0x93 
write (1 bytes) reg 0x1d (ModemConfig1): (mode: LoRa)
	0x93 
read (1 bytes) reg 0x1e (ModemConfig2): (mode: LoRa)
	0x60 
write (1 bytes) reg 0x1e (ModemConfig2): (mode: LoRa)
	0x60 
write (1 bytes) reg 0x26 (ModemConfig3): (mode: LoRa)
	0x00 
write (1 bytes) reg 0x31 (DetectOptimize): (mode: LoRa)
	0xc5 
write (1 bytes) reg 0x37 (DetectionThreshold): (mode: LoRa)
	0x0c 
write (1 bytes) reg 0x0c (Lna): (mode: LoRa)
	0x23 
write (1 bytes) reg 0x24 (HopPeriod): (mode: LoRa)
	0x00 
read (1 bytes) reg 0x1d (ModemConfig1): (mode: LoRa)
	0x93 
write (1 bytes) reg 0x1d (ModemConfig1): (mode: LoRa)
	0x93 
write (1 bytes) reg 0x21 (PreambleLsb): (mode: LoRa)
	0x09 
read (1 bytes) reg 0x1d (ModemConfig1): (mode: LoRa)
	0x93 
write (1 bytes) reg 0x1d (ModemConfig1): (mode: LoRa)
	0x93 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x09 (PaConfig): (mode: FSK/OOK)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: FSK/OOK)
	0xe7 0x40 0x00 
write (1 bytes) reg 0x22 (RxTimeout3): (mode: FSK/OOK)
	0x1a 
write (1 bytes) reg 0x0e (RssiConfig): (mode: FSK/OOK)
	0x00 
write (1 bytes) reg 0x0d (RxConfig): (mode: FSK/OOK)
	0x00 
write (26 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x54 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x22 0x00 0x00 0x00 0xb7 0x7f 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x11 (RssiValue): (mode: FSK/OOK)
	0xbf 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x00 0x00 
write (1 bytes) reg 0x22 (RxTimeout3): (mode: FSK/OOK)
	0x0d 
write (1 bytes) reg 0x0d (RxConfig): (mode: FSK/OOK)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
write (1 bytes) reg 0x12 (RxBw): (mode: FSK/OOK)
	0x40 
write (1 bytes) reg 0x0d (RxConfig): (mode: FSK/OOK)
	0x00 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x32 0x06 0x10 0x02 0x00 0x00 0x00 0x00 0x3c 0x04 0x02 0x11 
write (1 bytes) reg 0x01 (OpMode): (mode: LoRa)
	0x80 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
read (1 bytes) reg 0x0a (PaRamp): (mode: FSK/OOK)
	0x09 
write (2 bytes) reg 0x02 (BitrateMsb): (mode: FSK/OOK)
	0x01 0x26 
write (2 bytes) reg 0x04 (FdevMsb): (mode: FSK/OOK)
	0x02 0xb8 
write (1 bytes) reg 0x10 (RssiThresh): (mode: FSK/OOK)
	0x00 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x12 (RxBw): (mode: FSK/OOK)
	0x02 
write (1 bytes) reg 0x13 (AfcBw): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x0d (RxConfig): (mode: FSK/OOK)
	0x08 
write (1 bytes) reg 0x0e (RssiConfig): (mode: FSK/OOK)
	0x06 
write (1 bytes) reg 0x26 (PreambleLsb): (mode: FSK/OOK)
	0x08 
write (1 bytes) reg 0x27 (SyncConfig): (mode: FSK/OOK)
	0x12 
write (1 bytes) reg 0x28 (SyncValue1): (mode: FSK/OOK)
	0x3e 
write (1 bytes) reg 0x29 (SyncValue2): (mode: FSK/OOK)
	0x6b 
write (1 bytes) reg 0x2a (SyncValue3): (mode: FSK/OOK)
	0x3e 
write (1 bytes) reg 0x30 (PacketConfig1): (mode: FSK/OOK)
	0x48 
write (1 bytes) reg 0x31 (PacketConfig2): (mode: FSK/OOK)
	0x40 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x09 (PaConfig): (mode: FSK/OOK)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: FSK/OOK)
	0xe7 0x00 0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x12 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x33 0x00 0x00 0x00 0x90 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0xb2 0x03 0x06 0x7e 0x1b 0x10 0x00 0x01 0x00 0x3c 0x04 0x46 0xa8 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x12 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x00 0x00 0x00 0xeb 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x10 0x06 0x00 0x00 0x00 0x7e 0x1b 0x10 0x3c 0x04 0x3a 0xff 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x12 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x11 0x00 0x00 0x00 0x72 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0xb2 0x21 0x06 0x10 0x01 0x00 0x00 0x00 0x00 0x3c 0x04 0x10 0xe3 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x09 (PaConfig): (mode: FSK/OOK)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: FSK/OOK)
	0xe6 0xc0 0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x10 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x22 0x00 0x00 0x00 0x86 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x32 0x06 0x7e 0x1b 0x10 0x40 0x08 0x32 0x3c 0x04 0x74 0x1a 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x10 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x33 0x00 0x00 0x00 0x1f 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0xb2 0x03 0x06 0x00 0x00 0x00 0x7e 0x1b 0x10 0x3c 0x04 0x83 0x0f 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x10 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x00 0x00 0x00 0x64 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x10 0x06 0x00 0x07 0xe8 0xff 0xff 0xff 0x3c 0x04 0x38 0xb0 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x09 (PaConfig): (mode: FSK/OOK)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: FSK/OOK)
	0xe6 0x80 0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x0e 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x11 0x00 0x00 0x00 0x3d 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0xb2 0x21 0x06 0x7e 0x1b 0x10 0x10 0x07 0xf8 0x3c 0x04 0xbf 0x52 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x0e 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x22 0x00 0x00 0x00 0x46 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x32 0x06 0xff 0xff 0xff 0x7e 0x1b 0x10 0x3c 0x04 0x42 0xaa 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x0e 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x33 0x00 0x00 0x00 0xdf 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0xb2 0x03 0x06 0x20 0x07 0x54 0x00 0x00 0x00 0x3c 0x04 0x22 0x8a 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x09 (PaConfig): (mode: FSK/OOK)
	0xf0 
write (3 bytes) reg 0x06 (FrfMsb): (mode: FSK/OOK)
	0xe6 0x40 0x00 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x0c 0x1b 0x1f 0x00 0x00 0x00 0x0c 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x00 0x00 0x00 0x2b 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
read (13 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x2e 0x10 0x06 0x7e 0x1b 0x10 0x00 0x04 0x02 0x3c 0x04 0x76 0x0b 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x41 0x20 
write (1 bytes) reg 0x35 (FifoThresh): (mode: FSK/OOK)
	0x18 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x19 
write (25 bytes) reg 0x00 (Fifo): (mode: FSK/OOK)
	0x3c 0x04 0x3b 0x0c 0x1b 0x1f 0x00 0x00 0x00 0x01 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x00 0x0c 0xc0 0x11 0x00 0x00 0x00 0xb2 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x01 
write (1 bytes) reg 0x32 (PayloadLength): (mode: FSK/OOK)
	0x0d 
write (2 bytes) reg 0x40 (DioMapping1): (mode: FSK/OOK)
	0x0c 0xe1 
write (1 bytes) reg 0x0c (Lna): (mode: FSK/OOK)
	0x23 
write (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x05 
read (1 bytes) reg 0x01 (OpMode): (mode: FSK/OOK)
	0x03