Tags: patchew-project/qemu
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target/hexagon/idef-parser/prepare: use env to invoke bash This file is the only one involved in the compilation process which still uses the /bin/bash path. Signed-off-by: Samuel Tardieu <sam@rfc1149.net> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231123211506.636533-1-sam@rfc1149.net>
dma-helpers: don't lock AioContext in dma_blk_cb() Commit abfcd27 ("dma-helpers: prevent dma_blk_cb() vs dma_aio_cancel() race") acquired the AioContext lock inside dma_blk_cb() to avoid a race with scsi_device_purge_requests() running in the main loop thread. The SCSI code no longer calls dma_aio_cancel() from the main loop thread while I/O is running in the IOThread AioContext. Therefore it is no longer necessary to take this lock to protect DMAAIOCB fields. The ->cb() function also does not require the lock because blk_aio_*() and friends do not need the AioContext lock. Both hw/ide/core.c and hw/ide/macio.c also call dma_blk_io() but don't rely on it taking the AioContext lock, so this change is safe. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20231123194931.171598-5-stefanha@redhat.com>
target/riscv: add rva22s64 cpu Add a new profile CPU 'rva22s64' to work as an alias of -cpu rv64i,rva22s64 Like the existing rva22u64 CPU already does with the RVA22U64 profile. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-Id: <20231123191532.1101644-8-dbarboza@ventanamicro.com>
target/riscv: add 'rva22u64' CPU This CPU was suggested by Alistair [1] and others during the profile design discussions. It consists of the bare 'rv64i' CPU with rva22u64 enabled by default, like an alias of '-cpu rv64i,rva22u64=true'. Users now have an even easier way of consuming this user-mode profile by doing '-cpu rva22u64'. Extensions can be enabled/disabled at will on top of it. We can boot Linux with this "user-mode" CPU by doing: -cpu rva22u64,sv39=true,s=true,zifencei=true [1] https://lore.kernel.org/qemu-riscv/CAKmqyKP7xzZ9Sx=-Lbx2Ob0qCfB7Z+JO944FQ2TQ+49mqo0q_Q@mail.gmail.com/ Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-Id: <20231123185122.1100436-19-dbarboza@ventanamicro.com>
target/arm/kvm: Have kvm_arm_hw_debug_active take a ARMCPU argument Unify the "kvm_arm.h" API: All functions related to ARM vCPUs take a ARMCPU* argument. Use the CPU() QOM cast macro When calling the generic vCPU API from "sysemu/kvm.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231123183518.64569-17-philmd@linaro.org>
linux-user/riscv: Add Zicboz extensions to hwprobe Upstream Linux recently added RISC-V Zicboz support to the hwprobe API. This patch introduces this for QEMU's user space emulator. Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-Id: <20231123181300.2140622-1-christoph.muellner@vrull.eu>
linux-user/riscv: Add Zicboz extensions to hwprobe Upstream Linux recently added RISC-V Zicboz support to the hwprobe API. This patch introduces this for QEMU's user space emulator. Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu> Message-Id: <20231123180135.2116194-1-christoph.muellner@vrull.eu>
tests/tcg: finesse the registers check for "hidden" regs The reason the ppc64 and s390x test where failing was because gdb hides them although they are still accessible via regnum. We can re-arrange the test a little bit and include these two arches in our test. We also need to be a bit more careful handling remote-registers as the format isn't easily parsed with pure white space separation. Once we fold types like "long long" and "long double" into a single word we can now assert all registers are either listed or elided. Cc: Ilya Leoshkevich <iii@linux.ibm.com> Cc: <qemu-s390x@nongnu.org> Cc: Nicholas Piggin <npiggin@gmail.com> Cc: Daniel Henrique Barboza <danielhb413@gmail.com> Cc: <qemu-ppc@nongnu.org> Cc: Luis Machado <luis.machado@arm.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231121153606.542101-1-alex.bennee@linaro.org> Message-Id: <20231123155620.3042891-15-alex.bennee@linaro.org>
hw/arm/bcm2836: Add local variable to remove various DEVICE() casts Cast the CPU to DeviceState once. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231123143813.42632-9-philmd@linaro.org>
gdbstub: use a better signal when we halt for IO reasons The gdb description GDB_SIGNAL_IO is "I/O possible" and by default gdb will try and restart the guest, getting us nowhere. Report GDB_SIGNAL_STOP instead which should at least halt the session at the failure point. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Cc: Luis Machado <luis.machado@arm.com> Message-Id: <20231123131905.2640498-1-alex.bennee@linaro.org>
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