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fixup HEAD~2

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commit 98ccf0f13091225aa29f4308d54d12fc4dffab5b 1 parent ac4474b
@mlankhorst mlankhorst authored
View
12 pscnv/configure
@@ -9,8 +9,10 @@ echo 'Checking kernel functions...'
./kapitest.sh $ksrc > pscnv_kapi.h
echo 'Generating firmware...'
-m4 nvc0_grhub.fuc | envyas -a -w -m fuc -V nva3 -o nvc0_grhub.fuc.h
-m4 nvc0_grgpc.fuc | envyas -a -w -m fuc -V nva3 -o nvc0_grgpc.fuc.h
-m4 -DNVC0 nva3_copy.fuc | envyas -a -w -m fuc -V nva3 -o nvc0_copy.fuc.h
-envyas -m fuc -a nv98_crypt.fuc -o nv98_crypt.fuc.h
-envyas2 -a nvc0_pdaemon.fuc -w -m fuc -V nva3 -o nvc0_pdaemon.fuc.h
+m4 nvc0_grhub.fuc | envyas -a -w -m fuc -V nva3 -o nvc0_grhub.fuc.h &&
+m4 nvc0_grgpc.fuc | envyas -a -w -m fuc -V nva3 -o nvc0_grgpc.fuc.h &&
+m4 -DNVC0 nva3_copy.fuc | envyas -a -w -m fuc -V nva3 -o nvc0_copy.fuc.h &&
+envyas -m fuc -a nv98_crypt.fuc -o nv98_crypt.fuc.h &&
+envyas2 -a nvc0_pdaemon.fuc -w -m fuc -V nva3 -o nvc0_pdaemon.fuc.h &&
+cp *fuc.h preassembled/
+
View
3  pscnv/nouveau_mem.c
@@ -429,7 +429,8 @@ nouveau_mem_timing_calc(struct drm_device *dev, u32 freq,
ret = nvc0_mem_timing_calc(dev, freq, e, len, boot, t);
break;
default:
- return -ENODEV;
+ ret = -ENODEV;
+ break;
}
if (ret)
View
1  pscnv/nvc0_vram.c
@@ -49,7 +49,6 @@ nvc0_vram_init(struct drm_device *dev)
}
dev_priv->vram_type = nouveau_mem_vbios_type(dev);
- WARN(dev_priv->vram_type == 9, "WTF?\n");
dev_priv->vram->alloc = nvc0_vram_alloc;
dev_priv->vram->free = pscnv_vram_free;
dev_priv->vram->takedown = pscnv_vram_takedown;
View
98 pscnv/preassembled/nvc0_grgpc.fuc.h
@@ -34,28 +34,31 @@ uint32_t nvc0_grgpc_data[] = {
0x00000000,
/* 0x0064: chipsets */
0x000000c0,
- 0x011c00bc,
- 0x01700120,
+ 0x012800c8,
+ 0x01e40194,
0x000000c1,
- 0x012000bc,
- 0x01840120,
+ 0x012c00c8,
+ 0x01f80194,
0x000000c3,
- 0x011c00bc,
- 0x01800120,
+ 0x012800c8,
+ 0x01f40194,
0x000000c4,
- 0x011c00bc,
- 0x01800120,
+ 0x012800c8,
+ 0x01f40194,
0x000000c8,
- 0x011c00bc,
- 0x01700120,
+ 0x012800c8,
+ 0x01e40194,
0x000000ce,
- 0x011c00bc,
- 0x01800120,
+ 0x012800c8,
+ 0x01f40194,
0x000000cf,
- 0x011c00bc,
- 0x017c0120,
+ 0x012800c8,
+ 0x01f00194,
+ 0x000000d9,
+ 0x0194012c,
+ 0x025401f8,
0x00000000,
-/* 0x00bc: nvc0_gpc_mmio_head */
+/* 0x00c8: nvc0_gpc_mmio_head */
0x00000380,
0x14000400,
0x20000450,
@@ -80,10 +83,38 @@ uint32_t nvc0_grgpc_data[] = {
0x00000c8c,
0x08001000,
0x00001014,
-/* 0x011c: nvc0_gpc_mmio_tail */
+/* 0x0128: nvc0_gpc_mmio_tail */
0x00000c6c,
-/* 0x0120: nvc1_gpc_mmio_tail */
-/* 0x0120: nvc0_tpc_mmio_head */
+/* 0x012c: nvc1_gpc_mmio_tail */
+/* 0x012c: nvd9_gpc_mmio_head */
+ 0x00000380,
+ 0x04000400,
+ 0x0800040c,
+ 0x20000450,
+ 0x00000600,
+ 0x00000684,
+ 0x10000700,
+ 0x00000800,
+ 0x08000808,
+ 0x00000828,
+ 0x00000830,
+ 0x000008d8,
+ 0x000008e0,
+ 0x140008e8,
+ 0x0000091c,
+ 0x08000924,
+ 0x00000b00,
+ 0x14000b08,
+ 0x00000bb8,
+ 0x00000c08,
+ 0x1c000c10,
+ 0x00000c6c,
+ 0x00000c80,
+ 0x00000c8c,
+ 0x08001000,
+ 0x00001014,
+/* 0x0194: nvd9_gpc_mmio_tail */
+/* 0x0194: nvc0_tpc_mmio_head */
0x00000018,
0x0000003c,
0x00000048,
@@ -104,14 +135,39 @@ uint32_t nvc0_grgpc_data[] = {
0x4c000644,
0x00000698,
0x04000750,
-/* 0x0170: nvc0_tpc_mmio_tail */
+/* 0x01e4: nvc0_tpc_mmio_tail */
0x00000758,
0x000002c4,
0x000006e0,
-/* 0x017c: nvcf_tpc_mmio_tail */
+/* 0x01f0: nvcf_tpc_mmio_tail */
0x000004bc,
-/* 0x0180: nvc3_tpc_mmio_tail */
+/* 0x01f4: nvc3_tpc_mmio_tail */
+ 0x00000544,
+/* 0x01f8: nvc1_tpc_mmio_tail */
+/* 0x01f8: nvd9_tpc_mmio_head */
+ 0x00000018,
+ 0x0000003c,
+ 0x00000048,
+ 0x00000064,
+ 0x00000088,
+ 0x14000200,
+ 0x0400021c,
+ 0x000002c4,
+ 0x14000300,
+ 0x000003d0,
+ 0x040003e0,
+ 0x08000400,
+ 0x08000420,
+ 0x000004b0,
+ 0x000004e8,
+ 0x000004f4,
+ 0x04000520,
0x00000544,
+ 0x0c000604,
+ 0x4c000644,
+ 0x00000698,
+ 0x000006e0,
+ 0x08000750,
};
uint32_t nvc0_grgpc_code[] = {
View
104 pscnv/preassembled/nvc0_grhub.fuc.h
@@ -30,21 +30,23 @@ uint32_t nvc0_grhub_data[] = {
0x00000000,
/* 0x005c: chipsets */
0x000000c0,
- 0x01340098,
+ 0x013c00a0,
0x000000c1,
- 0x01380098,
+ 0x014000a0,
0x000000c3,
- 0x01340098,
+ 0x013c00a0,
0x000000c4,
- 0x01340098,
+ 0x013c00a0,
0x000000c8,
- 0x01340098,
+ 0x013c00a0,
0x000000ce,
- 0x01340098,
+ 0x013c00a0,
0x000000cf,
- 0x01340098,
+ 0x013c00a0,
+ 0x000000d9,
+ 0x01dc0140,
0x00000000,
-/* 0x0098: nvc0_hub_mmio_head */
+/* 0x00a0: nvc0_hub_mmio_head */
0x0417e91c,
0x04400204,
0x28404004,
@@ -84,50 +86,50 @@ uint32_t nvc0_grhub_data[] = {
0x08408800,
0x0c408900,
0x00408980,
-/* 0x0134: nvc0_hub_mmio_tail */
+/* 0x013c: nvc0_hub_mmio_tail */
0x044064c0,
-/* 0x0138: nvc1_hub_mmio_tail */
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
- 0x00000000,
+/* 0x0140: nvc1_hub_mmio_tail */
+/* 0x0140: nvd9_hub_mmio_head */
+ 0x0417e91c,
+ 0x04400204,
+ 0x24404004,
+ 0x00404044,
+ 0x34404094,
+ 0x184040d0,
+ 0x004040f8,
+ 0x08404130,
+ 0x08404150,
+ 0x04404164,
+ 0x04404178,
+ 0x1c404200,
+ 0x34404404,
+ 0x0c404460,
+ 0x00404480,
+ 0x00404498,
+ 0x0c404604,
+ 0x7c404618,
+ 0x50404698,
+ 0x044046f0,
+ 0x54404700,
+ 0x00405800,
+ 0x08405830,
+ 0x00405854,
+ 0x0c405870,
+ 0x04405a00,
+ 0x00405a18,
+ 0x00406020,
+ 0x0c406028,
+ 0x044064a8,
+ 0x104064b4,
+ 0x00407804,
+ 0x1440780c,
+ 0x004078bc,
+ 0x18408000,
+ 0x00408064,
+ 0x08408800,
+ 0x0c408900,
+ 0x00408980,
+/* 0x01dc: nvd9_hub_mmio_tail */
0x00000000,
0x00000000,
0x00000000,
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