From 66d47809d5ae1159a55b8591f2f8aeb3fc0accc2 Mon Sep 17 00:00:00 2001 From: Pavel Demin Date: Sun, 4 Dec 2016 00:42:25 +0100 Subject: [PATCH] add int_tready_reg to axis_interpolator --- cores/axis_interpolator_v1_0/axis_interpolator.v | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/cores/axis_interpolator_v1_0/axis_interpolator.v b/cores/axis_interpolator_v1_0/axis_interpolator.v index cb82c66b7..969621f81 100644 --- a/cores/axis_interpolator_v1_0/axis_interpolator.v +++ b/cores/axis_interpolator_v1_0/axis_interpolator.v @@ -27,6 +27,7 @@ module axis_interpolator # reg [AXIS_TDATA_WIDTH-1:0] int_tdata_reg, int_tdata_next; reg [CNTR_WIDTH-1:0] int_cntr_reg, int_cntr_next; reg int_tvalid_reg, int_tvalid_next; + reg int_tready_reg, int_tready_next; always @(posedge aclk) begin @@ -34,12 +35,14 @@ module axis_interpolator # begin int_tdata_reg <= {(AXIS_TDATA_WIDTH){1'b0}}; int_tvalid_reg <= 1'b0; + int_tready_reg <= 1'b0; int_cntr_reg <= {(CNTR_WIDTH){1'b0}}; end else begin int_tdata_reg <= int_tdata_next; int_tvalid_reg <= int_tvalid_next; + int_tready_reg <= int_tready_next; int_cntr_reg <= int_cntr_next; end end @@ -48,12 +51,14 @@ module axis_interpolator # begin int_tdata_next = int_tdata_reg; int_tvalid_next = int_tvalid_reg; + int_tready_next = int_tready_reg; int_cntr_next = int_cntr_reg; if(s_axis_tvalid & ~int_tvalid_reg) begin int_tdata_next = s_axis_tdata; int_tvalid_next = 1'b1; + int_tready_next = 1'b1; end if(m_axis_tready & int_tvalid_reg) @@ -64,13 +69,20 @@ module axis_interpolator # end else begin - int_tvalid_next = 1'b0; int_cntr_next = {(CNTR_WIDTH){1'b0}}; + int_tdata_next = s_axis_tdata; + int_tvalid_next = s_axis_tvalid; + int_tready_next = s_axis_tvalid; end end + + if(s_axis_tvalid & int_tready_reg) + begin + int_tready_next = 1'b0; + end end - assign s_axis_tready = ~int_tvalid_reg; + assign s_axis_tready = int_tready_reg; assign m_axis_tdata = int_tdata_reg; assign m_axis_tvalid = int_tvalid_reg;