From c5d3361a8a66507c748203135ca63615f7c98e4c Mon Sep 17 00:00:00 2001 From: Pavel Demin Date: Wed, 10 Apr 2019 15:26:40 +0000 Subject: [PATCH] update ADC ports --- cfg/ports.tcl | 4 ++-- cfg/ports.xdc | 60 +++++++++++++++++++++++++++------------------------ 2 files changed, 34 insertions(+), 30 deletions(-) diff --git a/cfg/ports.tcl b/cfg/ports.tcl index 5823941..9a7319b 100644 --- a/cfg/ports.tcl +++ b/cfg/ports.tcl @@ -1,8 +1,8 @@ ### ADC -create_bd_port -dir I -from 13 -to 0 adc_dat_a_i -create_bd_port -dir I -from 13 -to 0 adc_dat_b_i +create_bd_port -dir I -from 15 -to 0 adc_dat_a_i +create_bd_port -dir I -from 15 -to 0 adc_dat_b_i create_bd_port -dir I adc_clk_p_i create_bd_port -dir I adc_clk_n_i diff --git a/cfg/ports.xdc b/cfg/ports.xdc index 3c40568..7da027b 100644 --- a/cfg/ports.xdc +++ b/cfg/ports.xdc @@ -9,38 +9,42 @@ set_property IOSTANDARD LVCMOS18 [get_ports {adc_dat_a_i[*]}] set_property IOB TRUE [get_ports {adc_dat_a_i[*]}] -set_property PACKAGE_PIN Y17 [get_ports {adc_dat_a_i[0]}] -set_property PACKAGE_PIN W16 [get_ports {adc_dat_a_i[1]}] -set_property PACKAGE_PIN Y16 [get_ports {adc_dat_a_i[2]}] -set_property PACKAGE_PIN W15 [get_ports {adc_dat_a_i[3]}] -set_property PACKAGE_PIN W14 [get_ports {adc_dat_a_i[4]}] -set_property PACKAGE_PIN Y14 [get_ports {adc_dat_a_i[5]}] -set_property PACKAGE_PIN W13 [get_ports {adc_dat_a_i[6]}] -set_property PACKAGE_PIN V12 [get_ports {adc_dat_a_i[7]}] -set_property PACKAGE_PIN V13 [get_ports {adc_dat_a_i[8]}] -set_property PACKAGE_PIN T14 [get_ports {adc_dat_a_i[9]}] -set_property PACKAGE_PIN T15 [get_ports {adc_dat_a_i[10]}] -set_property PACKAGE_PIN V15 [get_ports {adc_dat_a_i[11]}] -set_property PACKAGE_PIN T16 [get_ports {adc_dat_a_i[12]}] -set_property PACKAGE_PIN V16 [get_ports {adc_dat_a_i[13]}] +set_property PACKAGE_PIN V17 [get_ports {adc_dat_a_i[0]}] +set_property PACKAGE_PIN U17 [get_ports {adc_dat_a_i[1]}] +set_property PACKAGE_PIN Y17 [get_ports {adc_dat_a_i[2]}] +set_property PACKAGE_PIN W16 [get_ports {adc_dat_a_i[3]}] +set_property PACKAGE_PIN Y16 [get_ports {adc_dat_a_i[4]}] +set_property PACKAGE_PIN W15 [get_ports {adc_dat_a_i[5]}] +set_property PACKAGE_PIN W14 [get_ports {adc_dat_a_i[6]}] +set_property PACKAGE_PIN Y14 [get_ports {adc_dat_a_i[7]}] +set_property PACKAGE_PIN W13 [get_ports {adc_dat_a_i[8]}] +set_property PACKAGE_PIN V12 [get_ports {adc_dat_a_i[9]}] +set_property PACKAGE_PIN V13 [get_ports {adc_dat_a_i[10]}] +set_property PACKAGE_PIN T14 [get_ports {adc_dat_a_i[11]}] +set_property PACKAGE_PIN T15 [get_ports {adc_dat_a_i[12]}] +set_property PACKAGE_PIN V15 [get_ports {adc_dat_a_i[13]}] +set_property PACKAGE_PIN T16 [get_ports {adc_dat_a_i[14]}] +set_property PACKAGE_PIN V16 [get_ports {adc_dat_a_i[15]}] set_property IOSTANDARD LVCMOS18 [get_ports {adc_dat_b_i[*]}] set_property IOB TRUE [get_ports {adc_dat_b_i[*]}] -set_property PACKAGE_PIN R18 [get_ports {adc_dat_b_i[0]}] -set_property PACKAGE_PIN P16 [get_ports {adc_dat_b_i[1]}] -set_property PACKAGE_PIN P18 [get_ports {adc_dat_b_i[2]}] -set_property PACKAGE_PIN N17 [get_ports {adc_dat_b_i[3]}] -set_property PACKAGE_PIN R19 [get_ports {adc_dat_b_i[4]}] -set_property PACKAGE_PIN T20 [get_ports {adc_dat_b_i[5]}] -set_property PACKAGE_PIN T19 [get_ports {adc_dat_b_i[6]}] -set_property PACKAGE_PIN U20 [get_ports {adc_dat_b_i[7]}] -set_property PACKAGE_PIN V20 [get_ports {adc_dat_b_i[8]}] -set_property PACKAGE_PIN W20 [get_ports {adc_dat_b_i[9]}] -set_property PACKAGE_PIN W19 [get_ports {adc_dat_b_i[10]}] -set_property PACKAGE_PIN Y19 [get_ports {adc_dat_b_i[11]}] -set_property PACKAGE_PIN W18 [get_ports {adc_dat_b_i[12]}] -set_property PACKAGE_PIN Y18 [get_ports {adc_dat_b_i[13]}] +set_property PACKAGE_PIN T17 [get_ports {adc_dat_b_i[0]}] +set_property PACKAGE_PIN R16 [get_ports {adc_dat_b_i[1]}] +set_property PACKAGE_PIN R18 [get_ports {adc_dat_b_i[2]}] +set_property PACKAGE_PIN P16 [get_ports {adc_dat_b_i[3]}] +set_property PACKAGE_PIN P18 [get_ports {adc_dat_b_i[4]}] +set_property PACKAGE_PIN N17 [get_ports {adc_dat_b_i[5]}] +set_property PACKAGE_PIN R19 [get_ports {adc_dat_b_i[6]}] +set_property PACKAGE_PIN T20 [get_ports {adc_dat_b_i[7]}] +set_property PACKAGE_PIN T19 [get_ports {adc_dat_b_i[8]}] +set_property PACKAGE_PIN U20 [get_ports {adc_dat_b_i[9]}] +set_property PACKAGE_PIN V20 [get_ports {adc_dat_b_i[10]} +set_property PACKAGE_PIN W20 [get_ports {adc_dat_b_i[11]} +set_property PACKAGE_PIN W19 [get_ports {adc_dat_b_i[12]}] +set_property PACKAGE_PIN Y19 [get_ports {adc_dat_b_i[13]}] +set_property PACKAGE_PIN W18 [get_ports {adc_dat_b_i[14]}] +set_property PACKAGE_PIN Y18 [get_ports {adc_dat_b_i[15]}] # clock input