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plat/rpi: implement PSCI CPU_OFF. #2
We simulate CPU off by reseting core via RMR. For secondaries,
I didn't bother refactoring out the common code out of
Signed-off-by: Andrei Warkentin email@example.com
See https://developer.trustedfirmware.org/T686 We simulate CPU off by reseting core via RMR. For secondaries, that already puts them in the holding pen waiting for a "warm boot" request as part of PSCI CPU_ON. For the BSP, we have to add logic to distinguish a regular boot from a CPU_OFF state, where like the secondaries, the BSP needs to wait foor a "warm boot" request as part of CPU_ON. I didn't bother refactoring out the common code out of platform_defs.h and palt_helpers.S to keep this clear. These Pi 3/4 files were mostly identical even before this change. Testing: - ACS suite now passes more tests (since it repeatedly calls code on secondaries via CPU_ON). - Linux testing including offlining/onlineing CPU0, e.g. "echo 0 > /sys/devices/system/cpu/cpu0/online". Signed-off-by: Andrei Warkentin <firstname.lastname@example.org>
@andreiw: many thanks for your work on this. If you don't mind I will pick this up and push it into gerrit. As part of a WIP series to unify RPi3 and RPi4 I have a patch to unify plat_helpers.S, I think I will push that first to make your patch smaller.