Skip to content
Browse files

MFC r253532:

Fix an XHCI regression:

The Block Event Interrupts, BEI, feature does not
work like expected with the Renesas XHCI chipsets.
Revert feature.

While at it correct the TD SIZE computation in
case of Zero Length Packet, ZLP, in the end of a
multi frame USB transfer.

PR:             usb/180726
Approved by:    re, hrs
  • Loading branch information...
1 parent e4703cf commit 2969ec61bfd9be3fdcaa50432755d24df345874d hselasky committed Jul 26, 2013
Showing with 9 additions and 11 deletions.
  1. +9 −11 sys/dev/usb/controller/xhci.c
View
20 sys/dev/usb/controller/xhci.c
@@ -1654,7 +1654,6 @@ xhci_setup_generic_chain_sub(struct xhci_std_temp *temp)
/* fill out buffer pointers */
if (average == 0) {
- npkt = 0;
memset(&buf_res, 0, sizeof(buf_res));
} else {
usbd_get_page(temp->pc, temp->offset +
@@ -1669,14 +1668,16 @@ xhci_setup_generic_chain_sub(struct xhci_std_temp *temp)
buf_res.length = XHCI_TD_PAGE_SIZE;
npkt_off += buf_res.length;
+ }
- /* setup npkt */
- npkt = (len_old - npkt_off + temp->max_packet_size - 1) /
- temp->max_packet_size;
+ /* setup npkt */
+ npkt = (len_old - npkt_off + temp->max_packet_size - 1) /
+ temp->max_packet_size;
- if (npkt > 31)
- npkt = 31;
- }
+ if (npkt == 0)
+ npkt = 1;
+ else if (npkt > 31)
+ npkt = 31;
/* fill out TRB's */
td->td_trb[x].qwTrb0 =
@@ -1691,9 +1692,7 @@ xhci_setup_generic_chain_sub(struct xhci_std_temp *temp)
switch (temp->trb_type) {
case XHCI_TRB_TYPE_ISOCH:
- /* BEI: Interrupts are inhibited until EOT */
dword = XHCI_TRB_3_CHAIN_BIT | XHCI_TRB_3_CYCLE_BIT |
- XHCI_TRB_3_BEI_BIT |
XHCI_TRB_3_TBC_SET(temp->tbc) |
XHCI_TRB_3_TLBPC_SET(temp->tlbpc);
if (td != td_first) {
@@ -1728,10 +1727,8 @@ xhci_setup_generic_chain_sub(struct xhci_std_temp *temp)
dword |= XHCI_TRB_3_DIR_IN;
break;
default: /* XHCI_TRB_TYPE_NORMAL */
- /* BEI: Interrupts are inhibited until EOT */
dword = XHCI_TRB_3_CHAIN_BIT | XHCI_TRB_3_CYCLE_BIT |
XHCI_TRB_3_TYPE_SET(XHCI_TRB_TYPE_NORMAL) |
- XHCI_TRB_3_BEI_BIT |
XHCI_TRB_3_TBC_SET(temp->tbc) |
XHCI_TRB_3_TLBPC_SET(temp->tlbpc);
if (temp->direction == UE_DIR_IN)
@@ -1810,6 +1807,7 @@ xhci_setup_generic_chain_sub(struct xhci_std_temp *temp)
usb_pc_cpu_flush(td_first->page_cache);
}
+ /* clear TD SIZE to zero, hence this is the last TRB */
/* remove chain bit because this is the last TRB in the chain */
td->td_trb[td->ntrb - 1].dwTrb2 &= ~htole32(XHCI_TRB_2_TDSZ_SET(15));
td->td_trb[td->ntrb - 1].dwTrb3 &= ~htole32(XHCI_TRB_3_CHAIN_BIT);

0 comments on commit 2969ec6

Please sign in to comment.
Something went wrong with that request. Please try again.