Commits on Mar 29, 2021
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soc/amd/*/gpio: include types.h instead of stdint.h to have size_t
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I7a747d4c28e6d449c054ce83966767e13b51a939 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51782 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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soc/amd: move PM_RST_CTRL1 register definition to common acpimmio header
TEST=Verified that this register and the defined bits exist in Cezanne, Picasso, Stoneyridge, Bolton and SB800. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I32d1d577b05edab006981516a5aefd822e7b984a Reviewed-on: https://review.coreboot.org/c/coreboot/+/51783 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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soc/amd/common/block/acpimmio/mmio_util: add fch_disable_kb_rst
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Suggested-by: Kangheui Won <khwon@chromium.org> Change-Id: Ie65e39ffb8c353415f5b68e1e0f378d18eeb7498 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51784 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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soc/amd/cezanne: Implement PROVIDES_ROM_SHARING
BUG=none TEST=Build guybrush and verified with the PPR that the register and bits are still the same Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I0619f84cf82cbb90ded9dfd58afa6acc9520fb8e Reviewed-on: https://review.coreboot.org/c/coreboot/+/51780 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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mb/google/guybrush: Enable DISABLE_SPI_FLASH_ROM_SHARING
Guybrush uses GPIO67 as an input. BUG=none TEST=Boot guybrush Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I10068bb6870b2cb96033cf3893cde71db5c1d709 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51781 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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soc/amd: add DISABLE_KEYBOARD_RESET_PIN option
The KBRST_L pin will cause a reset when driven or pulled low even when the GPIO mux is set to GPIO and not native function. So when you want to use that pin as general purpose output the keyboard reset input functionality needs to be disabled by selecting this option in the board's Kconfig file to avoid causing a reset by writing a 0 to the output level bit when it's configured as an output. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Suggested-by: Furquan Shaikh <furquan@google.com> Change-Id: I517ad551db9321f26afdba15d97ddb61be1f7d51 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51757 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Kangheui Won <khwon@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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mb/google/guybrush: select DISABLE_KEYBOARD_RESET_PIN
Now that we have the DISABLE_KEYBOARD_RESET_PIN Kconfig option, select it and remove the temporary workaround that was implemented in the mainboard code in commit 39ef890. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I634d11290dad8c93f10979f06243b1bf84737ae2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51785 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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soc/amd/cezanne,picasso: rename fsp_params.c to fsp_s_params.c
This file populates the UPD-S data structure that gets passed to the FSP-S, so add that s part to make it a bit clearer which FSP parameters it'll set up. This is also a preparation to add a fsp_m_params.c file in the following patches. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I53786df0909055e66eac675b5580909b7960944f Reviewed-on: https://review.coreboot.org/c/coreboot/+/51833 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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soc/amd/picasso: factor out UPD-M configuration from romstage
Move the parts of romstage.c that populate the UPD-M data structure to the newly created fsp_m_params.c file. Since platform_fsp_memory_init_params_cb gets called from the FSP driver and not directly from car_stage_entry the two code parts in romstage.c weren't directly interacting. Since soc/romstage.h only contains the mainboard_updm_update function prototype, rename it to soc/fsp.h. This patch also removes a few unused includes. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I52c21f13520dbdfab37587d17b3a8a3b1a780f36 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51834 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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soc/amd/cezanne: factor out UPD-M configuration from romstage
Move the parts of romstage.c that populate the UPD-M data structure to the newly created fsp_m_params.c file. Since platform_fsp_memory_init_params_cb gets called from the FSP driver and not directly from car_stage_entry the two code parts in romstage.c weren't directly interacting. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I1f7f5879ac318372042ff703ebbe584ce1c32c91 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51835 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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mb/amd: majolica,mandolin: Remove needless article from warning
At the end of the built, the line below is printed. coreboot has been built without an the Microchip EC FW. Remove *an*, as one article is enough. Change-Id: I28b24f0f2dade17e30e16cc6d935976e331a7a97 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51842 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> -
soc/amd: smbus: Use correct type for uintptr_t
Fix the format warning below by using `PRIxPTR`, which is defined as unsigned long. src/soc/amd/common/block/smbus/smbus.c:33:56: error: format specifies type 'size_t' (aka 'unsigned int') but the argument has type 'uintptr_t' (aka 'unsigned long') [-Werror,-Wformat] printk(BIOS_ERR, "Invalid SMBus or ASF base %#zx\n", mmio); ~~~~ ^~~~ %#lx src/include/console/console.h:60:61: note: expanded from macro 'printk' #define printk(LEVEL, fmt, args...) do_printk(LEVEL, fmt, ##args) ~~~ ^~~~ 1 error generated. Change-Id: I727c490d3097dcf36cdbcd4db2852cd49d11785f Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51843 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
