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  1. +6 −1 CHANGELOG.md
  2. +2 −0 src/mainboard/pcengines/apu2/PlatformGnbPcie.c
7 changes: 6 additions & 1 deletion CHANGELOG.md
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Expand Up @@ -7,6 +7,10 @@ Releases 4.5.x and 4.6.x are based on mainline support submitted in
[this gerrit ref](https://review.coreboot.org/#/c/14138/).

## [Unreleased]
## [v4.0.24] - 2019-02-04
## Added
- enabled Core Performance Boost feature

## [v4.0.23] - 2019-01-09
## Fixed
- enabled ECC
Expand Down Expand Up @@ -214,7 +218,8 @@ built externally
- forced to use SD in 2.0 mode
- git repository in `Makefile`

[Unreleased]: https://github.com/pcengines/coreboot/compare/v4.0.23...coreboot-4.0.x
[Unreleased]: https://github.com/pcengines/coreboot/compare/v4.0.24...coreboot-4.0.x
[v4.0.24]: https://github.com/pcengines/coreboot/compare/v4.0.23...v4.0.24
[v4.0.23]: https://github.com/pcengines/coreboot/compare/v4.0.22...v4.0.23
[v4.0.22]: https://github.com/pcengines/coreboot/compare/v4.0.21...v4.0.22
[v4.0.21]: https://github.com/pcengines/coreboot/compare/v4.0.20...v4.0.21
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2 changes: 2 additions & 0 deletions src/mainboard/pcengines/apu2/PlatformGnbPcie.c
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Expand Up @@ -123,4 +123,6 @@ OemCustomizeInitEarly (
)
{
InitEarly->GnbConfig.PcieComplexList = &PcieComplex;
InitEarly->PlatformConfig.CStateMode = CStateModeC6;
InitEarly->PlatformConfig.CpbMode = CpbModeAuto;
}