Showing 1,045 changed files with 22,802 additions and 18,382 deletions.
diff --git a/3rdparty/blobs b/3rdparty/blobs
diff --git a/3rdparty/vboot b/3rdparty/vboot
diff --git a/AUTHORS b/AUTHORS
@@ -10,6 +10,7 @@
 
 9elements Agency GmbH
 Advanced Micro Devices, Inc.
+AG Electronics Ltd.
 Alex Züpke
 Alexander Couzens
 Alexandru Gagniuc
@@ -20,27 +21,35 @@ Arthur Heymans
 ASPEED Technology Inc.
 Atheros Corporation
 Atmel Corporation
+BAP - Bruhnspace Advanced Projects
 Carl-Daniel Hailfinger
+Christoph Grenz
 coresystems GmbH
+Corey Osgood
 Damien Zammit
 David Brownell
 David Hendricks
 David Mosberger-Tang
 Denis Dowling
 DENX Software Engineering
+Digital Design Corporation
 DMP Electronics Inc.
 Drew Eckhardt
+Dynon Avionics
+Edward O'Callaghan
 Egbert Eich
 Eltan B.V
 Eric Biederman
 Eswar Nallusamy
+Fabian Kunkel
 Facebook, Inc.
 Felix Held
 Frederic Potter
 Free Software Foundation, Inc.
 Freescale Semiconductor, Inc.
 Gary Jennejohn
 Gerd Hoffmann
+Gergely Kiss
 Google LLC
 Greg Watson
 Idwer Vollering
@@ -53,11 +62,13 @@ Jordan Crouse
 Joseph Smith
 Keith Hui
 Keith Packard
+Kevin Cody-Little
 Kshitij
 Kyösti Mälkki
 Lei Wen
 Li-Ta Lo
 Libra Li
+Libretrend LDA
 Linus Torvalds
 Linux Networx, Inc.
 Luc Verhaegen
@@ -67,51 +78,67 @@ Marius Gröger
 Martin Mares
 Marvell International Ltd.
 Marvell Semiconductor Inc.
+Matt DeVillier
 MediaTek Inc.
+Mondrian Nuessle
 MontaVista Software, Inc.
 Myles Watson
 Network Appliance Inc.
 Nicholas Sielicki
 Nick Barker
 Nico Huber
+Nicola Corna
 Ollie Lo
+Omar Pakker
 Orion Technologies, LLC
 Patrick Georgi
 Patrick Rudolph
+Pavel Sayekat
 PC Engines GmbH
 Per Odlund
 Peter Stuge
+Philipp Degler
+Protectli
 Raptor Engineering, LLC
 Red Hat Inc
 Reinhard Meyer
+Richard Spiegel
 Richard Woodruff
 Ronald G. Minnich
 Rudolf Marek
 Russell King
 Sage Electronic Engineering, LLC
 Samsung Electronics
+Samuel Holland
 SciTech Software, Inc.
 Sebastian Grzywna
 secunet Security Networks AG
 Siemens AG
 Silicon Integrated System Corporation
+Silverback ltd.
 Stefan Reinauer
 Steve Magnani
 ST Microelectronics
 SUSE LINUX AG
 Sven Schnelle
 Syed Mohammed Khasim
 Texas Instruments
+The ChromiumOS Authors
 The Linux Foundation
 Thomas Winischhofer
 Timothy Pearson
+Tobias Diedrich
 Tungsten Graphics, Inc.
 Tyan Computer Corp.
 ucRobotics Inc.
+University of Heidelberg
 Uwe Hermann
 VIA Technologies, Inc
 Vipin Kumar
+Vladimir Serbinenko
+Wang Qing Pei
 Ward Vandewege
+Win Enterprises
 Wolfgang Denk
 Yinghai Lu
 
@@ -125,3 +152,4 @@ src/console
 src/cpu
 src/device
 src/drivers
+src/superio
diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -13,6 +13,16 @@ Please use [pce-fw-builder](https://github.com/pcengines/pce-fw-builder)
 
 ## [Unreleased]
 
+## [v4.11.0.4] - 2020-02-26
+### Changed
+- rebased with official coreboot repository commit e53f8c9
+
+### Fixed
+- microSD card boot order on apu5
+
+### Added
+- ARM management controller interaction on apu5
+
 ## [v4.11.0.3] - 2020-01-29
 ### Changed
 - rebased with official coreboot repository commit 536799d
@@ -369,7 +379,8 @@ redundant code which was similar for APU2/3/5 boards.
 - turn off D4 and D5 leds on boot
 - enable power on after power failure
 
-[Unreleased]: https://github.com/pcengines/coreboot/compare/v4.11.0.3...develop
+[Unreleased]: https://github.com/pcengines/coreboot/compare/v4.11.0.4...develop
+[v4.11.0.4]: https://github.com/pcengines/coreboot/compare/v4.11.0.3...v4.11.0.4
 [v4.11.0.3]: https://github.com/pcengines/coreboot/compare/v4.11.0.2...v4.11.0.3
 [v4.11.0.2]: https://github.com/pcengines/coreboot/compare/v4.11.0.1...v4.11.0.2
 [v4.11.0.1]: https://github.com/pcengines/coreboot/compare/v4.10.0.3...v4.11.0.1

diff --git a/Documentation/contributing/project_ideas.md b/Documentation/contributing/project_ideas.md
@@ -27,7 +27,9 @@ which is a bad experience when trying to build coreboot the first time.
 
 Provide packages/installers of our compiler toolchain for Linux distros,
 Windows, Mac OS. For Windows, this should also include the environment
-(shell, make, ...).
+(shell, make, ...). A student doesn't have to cover _all_ platforms, but
+pick a set of systems that match their interest and knowledge and lay
+out a plan on how to do this.
 
 The scripts to generate these packages should be usable on a Linux
 host, as that's what we're using for our automated build testing system
@@ -64,28 +66,6 @@ across architectures.
 ### Mentors
 * Timothy Pearson <tpearson@raptorengineering.com>
 
-## Support QEMU AArch64
-Having QEMU support for the architectures coreboot can boot helps with
-some (limited) compatibility testing: While QEMU generally doesn't need
-much hardware init, any CPU state changes in the boot flow will likely
-be quite close to reality.
-
-That could be used as a baseline to ensure that changes to architecture
-code doesn't entirely break these architectures
-
-### Requirements
-* coreboot knowledge: Should know the general boot flow in coreboot.
-* other knowledge: This will require knowing how the architecture
-  typically boots, to adapt the coreboot payload interface to be
-  appropriate and, for example, provide a device tree in the platform's
-  typical format.
-* hardware requirements: since QEMU runs practically everywhere and
-  needs no recovery mechanism, these are suitable projects when no special
-  hardware is available.
-
-### Mentors
-* Patrick Georgi <patrick@georgi.software>
-
 ## Add Kernel Address Sanitizer functionality to coreboot
 The Kernel Address Sanitizer (KASAN) is a runtime dynamic memory error detector.
 The idea is to check every memory access (variables) for its validity
@@ -153,33 +133,18 @@ their bug reports.
 ### Mentors
 * Patrick Georgi <patrick@georgi.software>
 
-## Make coreboot coverity clean
-coreboot and several other of our projects are automatically tested
-using Synopsys' free "Coverity Scan" service. While some fare pretty
-good, like [em100](https://scan.coverity.com/projects/em100) at 0 known
-defects, there are still many open issues in other projects, most notably
-[coreboot](https://scan.coverity.com/projects/coreboot) itself (which
-is also the largest codebase).
-
-Not all of the reports are actual issues, but the project benefits a
-lot if the list of unhandled reports is down to 0 because that provides
-a baseline when future changes reintroduce new issues: it's easier to
-triage and handle a list of 5 issues rather than more than 350.
-
-This project would be going through all reports and handling them
-appropriately: Figure out if reports are valid or not and mark them
-as such. For valid reports, provide patches to fix the underlying issue.
-
-### Mentors
-* Patrick Georgi <patrick@georgi.software>
-
 ## Extend Ghidra to support analysis of firmware images
 [Ghidra](https://ghidra-sre.org) is a recently released cross-platform
 disassembler and decompiler that is extensible through plugins. Make it
 useful for firmware related work: Automatically parse formats (eg. by
 integrating UEFITool, cbfstool, decompressors), automatically identify
 16/32/64bit code on x86/amd64, etc.
 
+This has been done in 2019 with [some neat
+features](https://github.com/al3xtjames/ghidra-firmware-utils) being
+developed, but it may be possible to expand support for all kinds of firmware
+analyses.
+
 ## Learn hardware behavior from I/O and memory access logs
 [SerialICE](https://www.serialice.com) is a tool to trace the behavior of
 executable code like firmware images. One result of that is a long log file

diff --git a/Documentation/flash_tutorial/int_flashrom.md b/Documentation/flash_tutorial/int_flashrom.md
@@ -5,7 +5,7 @@
 
 ## Using flashrom
 This method does only work on Linux, if it isn't locked down.
-You may also need to boot with 'iomem=relaxed' in the kernel command
+You may also need to boot with `iomem=relaxed` in the kernel command
 line if CONFIG_IO_STRICT_DEVMEM is set.
 
 

diff --git a/Documentation/getting_started/gpio.md b/Documentation/getting_started/gpio.md
@@ -25,7 +25,7 @@ how to appropriately set these registers. In addition, some mainboards are
 based on a baseboard/variant model, where several variant mainboards may share a
 lot of their circuitry and ICs and the commonality between the boards is
 collected into a virtual ``baseboard.`` In that case, the GPIOs which are shared
-between multiple boards are placed in the baseboard's ``gpio.c` file, while the
+between multiple boards are placed in the baseboard's ``gpio.c`` file, while the
 ones that are board-specific go into each variant's ``gpio.c`` file.
 
 ## Intel SoCs

diff --git a/Documentation/ifdtool/layout.md b/Documentation/ifdtool/layout.md
@@ -14,14 +14,26 @@ The names of the IFD regions in the FMAP should follow the convention of
 starting with the prefix `SI_` which stands for `silicon initialization` as a
 way to categorize anything required by the SoC but not provided by coreboot.
 
-|IFD Region index|IFD Region name|FMAP Name|Notes|
-|---|---|---|---|
-|0|Flash Descriptor|SI_DESC|Always the top 4KB of flash|
-|1|BIOS|SI_BIOS|This is the region that contains coreboot|
-|2|Intel ME|SI_ME||
-|3|Gigabit Ethernet|SI_GBE||
-|4|Platform Data|SI_PDR||
-|8|EC Firmware|SI_EC|Most Chrome OS devices do not use this region; EC firmware is stored BIOS region of flash|
+```eval_rst
++------------+------------------+-----------+-------------------------------------------+
+| IFD Region | IFD Region name  | FMAP Name | Notes                                     |
+| index      |                  |           |                                           |
++============+==================+===========+===========================================+
+| 0          | Flash Descriptor | SI_DESC   | Always the top 4KB of flash               |
++------------+------------------+-----------+-------------------------------------------+
+| 1          | BIOS             | SI_BIOS   | This is the region that contains coreboot |
++------------+------------------+-----------+-------------------------------------------+
+| 2          | Intel ME         | SI_ME     |                                           |
++------------+------------------+-----------+-------------------------------------------+
+| 3          | Gigabit Ethernet | SI_GBE    |                                           |
++------------+------------------+-----------+-------------------------------------------+
+| 4          | Platform Data    | SI_PDR    |                                           |
++------------+------------------+-----------+-------------------------------------------+
+| 8          | EC Firmware      | SI_EC     | Most Chrome OS devices do not use this    |
+|            |                  |           | region; EC firmware is stored in BIOS     |
+|            |                  |           | region of flash                           |
++------------+------------------+-----------+-------------------------------------------+
+```
 
 ## Validation