Showing 2,154 changed files with 259,874 additions and 18,167 deletions.
diff --git a/3rdparty/amd_blobs b/3rdparty/amd_blobs
diff --git a/3rdparty/blobs b/3rdparty/blobs
diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -12,6 +12,16 @@ official [coreboot repository](https://review.coreboot.org/cgit/coreboot.git)
 Please use [pce-fw-builder](https://github.com/pcengines/pce-fw-builder)
 
 ## [Unreleased]
+## [v4.12.0.2] - 2020-06-28
+## Fixed
+- [incorrrect serial number in dmidecode for apu1](https://github.com/pcengines/coreboot/issues/402)
+
+### Changed
+- rebased with official coreboot repository commit f183626
+- enabled TPM2 for apu3d and apu4d supporting a TPM module connection
+
+### Added
+- DRTM ACPI table (holds information about TPM log area for TrenchBoot DRTM)
 
 ## [v4.12.0.1] - 2020-05-29
 ### Changed
@@ -422,7 +432,8 @@ redundant code which was similar for APU2/3/5 boards.
 - turn off D4 and D5 leds on boot
 - enable power on after power failure
 
-[Unreleased]: https://github.com/pcengines/coreboot/compare/v4.12.0.1...develop
+[Unreleased]: https://github.com/pcengines/coreboot/compare/v4.12.0.2...develop
+[v4.12.0.2]: https://github.com/pcengines/coreboot/compare/v4.12.0.1...v4.12.0.2
 [v4.12.0.1]: https://github.com/pcengines/coreboot/compare/v4.11.0.6...v4.12.0.1
 [v4.11.0.6]: https://github.com/pcengines/coreboot/compare/v4.11.0.5...v4.11.0.6
 [v4.11.0.5]: https://github.com/pcengines/coreboot/compare/v4.11.0.4...v4.11.0.5

diff --git a/Documentation/Intel/Board/board.html b/Documentation/Intel/Board/board.html
@@ -222,7 +222,7 @@ <h2><a name="AcpiTables">ACPI Tables</a></h2>
       <li>Add the acpi_create_fadt routine
         <ol type="I">
           <li>fill in the ACPI header</li>
-          <li>Call the acpi_fill_in_fadt routine</li>
+          <li>Call the acpi_fill_fadt routine</li>
         </ol>
       </li>
     </ol>

diff --git a/Documentation/Intel/SoC/soc.html b/Documentation/Intel/SoC/soc.html
@@ -667,7 +667,7 @@ <h3>FADT</h3>
   </li>
   <li>Create a acpi.c module:
     <ol type="A">
-      <li>Add the acpi_fill_in_fadt routine and initialize the values above</li>
+      <li>Add the acpi_fill_fadt routine and initialize the values above</li>
     </ol>
   </li>
 </ol>

diff --git a/Documentation/drivers/smmstore.md b/Documentation/drivers/smmstore.md
@@ -5,7 +5,7 @@ storage driver.
 
 ## SMMSTORE
 
-SMMSTORE is a SMM mediated driver to read from, write to and erase a
+SMMSTORE is a [SMM] mediated driver to read from, write to and erase a
 predefined region in flash. It can be enabled by setting
 `CONFIG_SMMSTORE=y` in menuconfig.
 
@@ -117,7 +117,18 @@ INPUT:
 - `val`: pointer to the value data
 - `valsize`: size of the value data
 
+#### Security
+
+Pointers provided by the payload or OS are checked to not overlap with the SMM.
+That protects the SMM handler from being manipulated.
+
+*However there's no validation done on the source or destination pointing to
+DRAM. A malicious application that is able to issue SMIs could extract arbitrary
+data or modify the currently running kernel.*
+
 ## External links
 
 * [A Tour Beyond BIOS Implementing UEFI Authenticated Variables in SMM with EDKI](https://software.intel.com/sites/default/files/managed/cf/ea/a_tour_beyond_bios_implementing_uefi_authenticated_variables_in_smm_with_edkii.pdf)
 Note, this differs significantly from coreboot's implementation.
+
+[SMM]: ../security/smm.md