.gitlab-ci.yml

@@ -78,7 +78,7 @@ check_dependencies:
 
 .check_hw_matrix: &check_hw_matrix
   image:
-    name: 3mdeb/rf-docker:1.1.0
+    name: 3mdeb/rf-docker:1.2.0
     # https://docs.gitlab.com/ee/ci/docker/using_docker_images.html#overriding-the-entrypoint-of-an-image
     # https://gitlab.com/gitlab-org/gitlab-runner/-/issues/2692
     # use EMPTY ENTRYPOINT for docker >17.06
@@ -100,7 +100,7 @@ check_dependencies:
 
 .run_regression: &run_regression
   image:
-    name: 3mdeb/rf-docker:1.1.0
+    name: 3mdeb/rf-docker:1.2.0
     # https://docs.gitlab.com/ee/ci/docker/using_docker_images.html#overriding-the-entrypoint-of-an-image
     # https://gitlab.com/gitlab-org/gitlab-runner/-/issues/2692
     # use EMPTY ENTRYPOINT for docker >17.06

.gitlab-ci/check_hw_matrix.sh

@@ -7,6 +7,7 @@ git checkout hw-matrix-check
 
 sed -i 's+git@gitlab.com:3mdeb/rte/rtectrl-rest-api.git+https://'$GITLAB_ROBOT_USERNAME':'$GITLAB_ROBOT_TOKEN'@gitlab.com/3mdeb/rte/rtectrl-rest-api.git+' .gitmodules
 sed -i 's+git@gitlab.com:3mdeb/rte/snipeit-rest-api.git+https://'$GITLAB_ROBOT_USERNAME':'$GITLAB_ROBOT_TOKEN'@gitlab.com/3mdeb/rte/snipeit-rest-api.git+' .gitmodules
+sed -i 's+git@gitlab.com:3mdeb/rte/pikvm-rest-api.git+https://'$GITLAB_ROBOT_USERNAME':'$GITLAB_ROBOT_TOKEN'@gitlab.com/3mdeb/rte/pikvm-rest-api.git+' .gitmodules
 git submodule update --init --checkout
 
 # legacy or mainline?
@@ -16,4 +17,4 @@ else
     export FIRMWARE="m"
 fi
 
-bash -cx "./check_hw_matrix.sh"
+bash -cx "./check_hw_matrix.sh ${RELEASE_DIR}/${PLATFORM}_${CI_COMMIT_REF_NAME}.rom"

.gitlab-ci/regression.sh

@@ -5,6 +5,7 @@ cd $TESTS_REPO_DIR
 
 sed -i 's+git@gitlab.com:3mdeb/rte/rtectrl-rest-api.git+https://'$GITLAB_ROBOT_USERNAME':'$GITLAB_ROBOT_TOKEN'@gitlab.com/3mdeb/rte/rtectrl-rest-api.git+' .gitmodules
 sed -i 's+git@gitlab.com:3mdeb/rte/snipeit-rest-api.git+https://'$GITLAB_ROBOT_USERNAME':'$GITLAB_ROBOT_TOKEN'@gitlab.com/3mdeb/rte/snipeit-rest-api.git+' .gitmodules
+sed -i 's+git@gitlab.com:3mdeb/rte/pikvm-rest-api.git+https://'$GITLAB_ROBOT_USERNAME':'$GITLAB_ROBOT_TOKEN'@gitlab.com/3mdeb/rte/pikvm-rest-api.git+' .gitmodules
 git submodule update --init --checkout
 
 # legacy or mainline?

CHANGELOG.md

@@ -13,6 +13,12 @@ Please use [pce-fw-builder](https://github.com/pcengines/pce-fw-builder)
 ****
 ## [Unreleased]
 
+## [v4.16.0.4] - 2022-05-19
+### Changed
+- Rebased with official coreboot repository commit 9686ac2261
+- [updated sortbootorder to v4.6.23](https://github.com/pcengines/sortbootorder/blob/master/CHANGELOG.md#v4623---2022-05-19)
+- [updated SeaBIOS to rel-1.16.0.1](https://github.com/pcengines/seabios/blob/apu_support/CHANGELOG.md#rel-11601---2022-05-19)
+
 ## [v4.16.0.3] - 2022-04-21
 ### Changed
 - Rebased with official coreboot repository commit 2c4b426557
@@ -571,8 +577,9 @@ redundant code which was similar for APU2/3/5 boards.
 - turn off D4 and D5 leds on boot
 - enable power on after power failure
 
-[Unreleased]: https://github.com/pcengines/coreboot/compare/v4.16.0.3...develop
-[v4.16.0.2]: https://github.com/pcengines/coreboot/compare/v4.16.0.2...v4.16.0.3
+[Unreleased]: https://github.com/pcengines/coreboot/compare/v4.16.0.4...develop
+[v4.16.0.4]: https://github.com/pcengines/coreboot/compare/v4.16.0.3...v4.16.0.4
+[v4.16.0.3]: https://github.com/pcengines/coreboot/compare/v4.16.0.2...v4.16.0.3
 [v4.16.0.2]: https://github.com/pcengines/coreboot/compare/v4.16.0.1...v4.16.0.2
 [v4.16.0.1]: https://github.com/pcengines/coreboot/compare/v4.15.0.3...v4.16.0.1
 [v4.15.0.3]: https://github.com/pcengines/coreboot/compare/v4.15.0.2...v4.15.0.3

Documentation/arch/x86/index.md

@@ -26,9 +26,7 @@ In order to add support for x86_64 the following assumptions were made:
 * A stage can install new page tables in RAM
 
 ## Page tables
-Page tables are generated by a tool in `util/pgtblgen/pgtblgen`. It writes
-the page tables to a file which is then included into the CBFS as file called
-`pagetables`.
+A `pagetables` cbfs file is generated based on an assembly file.
 
 To generate the static page tables it must know the physical address where to
 place the file.

Documentation/community/index.md

@@ -3,5 +3,4 @@
 * [Code of Conduct](code_of_conduct.md)
 * [Language style](language_style.md)
 * [Community forums](forums.md)
-* [Project services](services.md)
 * [coreboot at conferences](conferences.md)

Documentation/contributing/coding_style.md

@@ -960,6 +960,41 @@ asm ("magic %reg1, #42nt"
 	: /* outputs */ : /* inputs */ : /* clobbers */);
 ```
 
+GCC extensions
+--------------
+
+GCC is the only officially-supported compiler for coreboot, and a
+variety of its C language extensions are heavily used throughout the
+code base. There have been occasional attempts to add clang as a second
+compiler option, which is generally compatible to the same language
+extensions that have been long-established by GCC.
+
+Some GCC extensions (e.g. inline assembly) are basically required for
+proper firmware development. Others enable more safe or flexible
+coding patterns than can be expressed with standard C (e.g. statement
+expressions and `typeof()` to avoid double evaluation in macros like
+`MAX()`). Yet others just add some simple convenience and reduce
+boilerplate (e.g. `void *` arithmetic).
+
+Since some GCC extensions are necessary either way, there is no gain
+from avoiding other GCC extensions elsewhere. The use of all official
+GCC extensions is expressly allowed within coreboot. In cases where an
+extension can be replaced by a 100% equivalent C standard feature with
+no extra boilerplate or loss of readability, the C standard feature
+should be preferred (this usually only happens when GCC retains an
+older pre-standardization extension for backwards compatibility, e.g.
+the old pre-C99 syntax for designated initializers). But if there is
+any advantage offered by the GCC extension (e.g. using GCC zero-length
+arrays instead of C99 variable-length arrays because they don't inhibit
+`sizeof()`), there is no reason to deprive ourselves of that, and "this
+is not C standard compliant" should not be a reason to argue against
+its use in reviews.
+
+This rule only applies to explicit GCC extensions listed in the
+"Extensions to the C Language Family" section of the GCC manual. Code
+should never rely on incidental GCC translation behavior that is not
+explicitly documented as a feature and could change at any moment.
+
 References
 ----------
 

Documentation/distributions.md

@@ -8,6 +8,15 @@ and those providing after-market firmware to extend the usefulness of devices.
 
 ## Hardware shipping with coreboot
 
+### NovaCustom laptops
+
+[NovaCustom](https://configurelaptop.eu/) sells configurable laptops with
+[Dasharo](https://dasharo.com/) coreboot based firmware on board, maintained by
+[3mdeb](https://3mdeb.com/). NovaCustom offers full GNU/Linux and Microsoft
+Windows compatibility. NovaCustom ensures security updates via fwupd for 5 years
+and the firmware is equipped with important security features such as measured
+boot, verified boot, TPM integration and UEFI Secure Boot.
+
 ### ChromeOS Devices
 
 All ChromeOS devices ([Chromebooks](https://chromebookdb.com/), Chromeboxes,
@@ -54,6 +63,15 @@ provides ready-made firmware images for supported devices: those which can be
 built entirely from source code. Their copy of the coreboot repository is
 therefore stripped of all devices that require binary components to boot.
 
+
+### Dasharo
+
+[Dasharo](https://dasharo.com/) is an open-source based firmware distribution
+focusing on clean and simple code, long-term maintenance, transparent
+validation, privacy-respecting implementation, liberty for the owners, and
+trustworthiness for all.
+
+
 ### MrChromebox
 
 [MrChromebox](https://mrchromebox.tech/) provides upstream coreboot firmware

Documentation/getting_started/kconfig.md

@@ -786,7 +786,7 @@ select <symbol> \[if <expr>\]
     config TPM
         bool
         default n
-        select LPC_TPM if ARCH_X86
+        select MEMORY_MAPPED_TPM if ARCH_X86
         select I2C_TPM if ARCH_ARM
         select I2C_TPM if ARCH_ARM64
         help

Documentation/index.md

@@ -188,6 +188,6 @@ Contents:
 * [SuperIO](superio/index.md)
 * [Vendorcode](vendorcode/index.md)
 * [Utilities](util.md)
-* [coreboot infrastructure](infrastructure/index.md)
+* [Project infrastructure & services](infrastructure/index.md)
 * [Release notes](releases/index.md)
 * [Documentation License](documentation_license.md)