.gitlab-ci.yml

@@ -7,12 +7,20 @@ variables:
   RELEASE_DIR: ${CI_PROJECT_DIR}/apu2_fw_rel
 
 stages:
+  - check_dependencies
   - build_crosscompiler
   - build_rom
   - test_rom
   - sign_rom
   - publish_rom
 
+check_dependencies:
+  stage: check_dependencies
+  script:
+    - git ls-remote https://github.com/pcengines/release_manifests.git | grep ${CI_COMMIT_REF_NAME}
+  only:
+    - tags
+
 build_crosscompiler:
   stage: build_crosscompiler
   tags: 
@@ -30,14 +38,17 @@ build_crosscompiler:
 .build_rom_apu: &build_rom_apu
   variables:
     PLATFORM: apux
+    MANIFEST_FALLBACK_BRANCH: coreboot-xxxx
   stage: build_rom
   tags: 
     - docker
   dependencies:
     - build_crosscompiler
   script:
     - mkdir -p apu2_fw_rel && cd apu2_fw_rel
-    - repo init -u https://github.com/pcengines/release_manifests.git -b ${CI_COMMIT_REF_NAME}
+    - if [ -n "$CI_COMMIT_TAG" ]; then REPO_REVISION="refs/tags/$CI_COMMIT_REF_NAME"; else REPO_REVISION="$CI_COMMIT_REF_NAME"; fi
+    - git ls-remote https://github.com/pcengines/coreboot.git | grep ${REPO_REVISION} || REPO_REVISION="$MANIFEST_FALLBACK_BRANCH"
+    - repo init -u https://github.com/pcengines/release_manifests.git -b ${REPO_REVISION}
     - repo sync --force-sync
     - cp ${CI_PROJECT_DIR}/configs/pcengines_${PLATFORM}.config ${CI_PROJECT_DIR}/apu2_fw_rel/apu2/coreboot/.config
     - ${RELEASE_DIR}/apu2/apu2-documentation/scripts/build_release_img.sh build-ml
@@ -98,6 +109,7 @@ build:apu2:
   <<: *build_rom_apu
   variables:
     PLATFORM: apu2
+    MANIFEST_FALLBACK_BRANCH: coreboot-4.6.x
 
 .test:apu2:
   <<: *test_rom
@@ -119,6 +131,7 @@ build:apu3:
   <<: *build_rom_apu
   variables:
     PLATFORM: apu3
+    MANIFEST_FALLBACK_BRANCH: coreboot-4.6.x
 
 .test:apu3:
   <<: *test_rom
@@ -134,12 +147,34 @@ publish:apu3:
   <<: *publish_rom
   variables:
     PLATFORM: apu3
+
+
+build:apu4:
+  <<: *build_rom_apu
+  variables:
+    PLATFORM: apu4
+
+.test:apu4:
+  <<: *test_rom
+  variables:
+    PLATFORM: apu4
+
+.sign:apu4:
+  <<: *sign_rom
+  variables:
+    PLATFORM: apu4
 
+publish:apu4:
+  <<: *publish_rom
+  variables:
+    PLATFORM: apu4 
+
 
 build:apu5:
   <<: *build_rom_apu
   variables:
     PLATFORM: apu5
+    MANIFEST_FALLBACK_BRANCH: coreboot-4.6.x
 
 .test:apu5:
   <<: *test_rom

CHANGELOG.md

@@ -9,11 +9,21 @@ Releases 4.5.x and 4.6.x are based on mainline support submitted in
 1. After cloning run `make crossgcc-i386` to build the toolchain.
 2. `make menuconfig` and set:
   * `Mainboard/Mainboard vendor` → `PCEngines`
-  * `Mainboard/Mainboard model` → `APU2` or `APU3`
+  * `Mainboard/Mainboard model` → `APU2`, `APU3` or `APU5`
 3. `make`
 
 ## [Unreleased]
 
+## [v4.6.4] - 2017-11-30
+### Added
+- SPI support
+- Security register support for reading serial number
+
+### Changed
+- Upgrade SeaBIOS to 1.11.0.1
+- Update sortbootorder to v4.6.4
+- Switch Memtest86+ to mainline
+
 ## [v4.6.3] - 2017-10-30
 ### Added
 - Runtime configuration of UARTc/d, EHCI and mPCIe2 CLK for APU2/3/5
@@ -117,7 +127,8 @@ redundant code which was similar for APU2/3/5 boards.
 - turn off D4 and D5 leds on boot
 - enable power on after power failure
 
-[Unreleased]: https://github.com/pcengines/coreboot/compare/v4.6.3...coreboot-4.6.x
+[Unreleased]: https://github.com/pcengines/coreboot/compare/v4.6.4...coreboot-4.6.x
+[v4.6.4]: https://github.com/pcengines/coreboot/compare/v4.6.3...v4.6.4
 [v4.6.3]: https://github.com/pcengines/coreboot/compare/v4.6.2...v4.6.3
 [v4.6.2]: https://github.com/pcengines/coreboot/compare/v4.6.1...v4.6.2
 [v4.6.1]: https://github.com/pcengines/coreboot/compare/v4.6.0...v4.6.1

configs/pcengines_apu2.config

@@ -17,7 +17,7 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_COMPRESS_RAMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
-# CONFIG_COLLECT_TIMESTAMPS is not set
+CONFIG_COLLECT_TIMESTAMPS=y
 CONFIG_USE_BLOBS=y
 # CONFIG_COVERAGE is not set
 # CONFIG_UPDATE_IMAGE is not set
@@ -138,6 +138,7 @@ CONFIG_ID_SECTION_OFFSET=0x80
 CONFIG_POST_DEVICE=y
 CONFIG_VARIANT_DIR="apu2"
 # CONFIG_VBOOT is not set
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_DIMM_MAX=4
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_TTYS0_LCS=3
@@ -155,6 +156,7 @@ CONFIG_MAINBOARD_VERSION="1.0"
 # CONFIG_BOARD_PCENGINES_APU1 is not set
 CONFIG_BOARD_PCENGINES_APU2=y
 # CONFIG_BOARD_PCENGINES_APU3 is not set
+# CONFIG_BOARD_PCENGINES_APU4 is not set
 # CONFIG_BOARD_PCENGINES_APU5 is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_AGESA_BINARY_PI_FILE="3rdparty/blobs/mainboard/pcengines/apu2/AGESA.bin"
@@ -198,6 +200,7 @@ CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_HEAP_SIZE=0xc0000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/pi/hudson/bootblock.c"
 CONFIG_TTYS0_BASE=0x3f8
 CONFIG_EHCI_BAR=0xfef00000
@@ -445,7 +448,22 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_IPMI_KCS is not set
 # CONFIG_DRIVERS_LENOVO_WACOM is not set
 # CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
-# CONFIG_SPI_FLASH is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
+# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
 # CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
 # CONFIG_DRIVERS_STORAGE is not set
 CONFIG_DRIVERS_UART=y
@@ -594,6 +612,7 @@ CONFIG_SEABIOS_BOOTORDER_DEF_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/bootorde
 CONFIG_SEABIOS_BOOTMENU_KEY_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/boot-menu-key"
 CONFIG_SEABIOS_BOOTMENU_WAIT_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/boot-menu-wait"
 CONFIG_SEABIOS_BOOTMENU_MESSAGE_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/boot-menu-message"
+CONFIG_SEABIOS_SERCON_PORT_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/sercon-port"
 CONFIG_SEABIOS_DEBUG_LEVEL=-1
 
 #
@@ -609,6 +628,7 @@ CONFIG_PXE=y
 CONFIG_BUILD_IPXE=y
 CONFIG_IPXE_STABLE=y
 # CONFIG_IPXE_MASTER is not set
+# CONFIG_PXE_SERIAL_CONSOLE is not set
 CONFIG_PXE_ROM_ID="8086,157b"
 CONFIG_PXE_CUSTOM_GENERAL_H="../../../../apu2-documentation/ipxe/general.h"
 CONFIG_PXE_CUSTOM_BOOTMENU_FILE="../../../../apu2-documentation/ipxe/menu.ipxe"
@@ -622,7 +642,6 @@ CONFIG_COMPRESSED_PAYLOAD_LZMA=y
 CONFIG_MEMTEST_SECONDARY_PAYLOAD=y
 CONFIG_MEMTEST_STABLE=y
 # CONFIG_MEMTEST_MASTER is not set
-CONFIG_MEMTEST_DISABLE_SPD=y
 # CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
 # CONFIG_TINT_SECONDARY_PAYLOAD is not set
 CONFIG_SORTBOOTORDER_SECONDARY_PAYLOAD=y
@@ -639,6 +658,7 @@ CONFIG_SORTBOOTORDER_SECONDARY_PAYLOAD=y
 # CONFIG_HAVE_DEBUG_SMBUS is not set
 # CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_ACPI is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_TRACE is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set

configs/pcengines_apu3.config

@@ -17,7 +17,7 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_COMPRESS_RAMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
-# CONFIG_COLLECT_TIMESTAMPS is not set
+CONFIG_COLLECT_TIMESTAMPS=y
 CONFIG_USE_BLOBS=y
 # CONFIG_COVERAGE is not set
 # CONFIG_UPDATE_IMAGE is not set
@@ -138,6 +138,7 @@ CONFIG_ID_SECTION_OFFSET=0x80
 CONFIG_POST_DEVICE=y
 CONFIG_VARIANT_DIR="apu3"
 # CONFIG_VBOOT is not set
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_DIMM_MAX=4
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_TTYS0_LCS=3
@@ -155,6 +156,7 @@ CONFIG_MAINBOARD_VERSION="1.0"
 # CONFIG_BOARD_PCENGINES_APU1 is not set
 # CONFIG_BOARD_PCENGINES_APU2 is not set
 CONFIG_BOARD_PCENGINES_APU3=y
+# CONFIG_BOARD_PCENGINES_APU4 is not set
 # CONFIG_BOARD_PCENGINES_APU5 is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_AGESA_BINARY_PI_FILE="3rdparty/blobs/mainboard/pcengines/apu2/AGESA.bin"
@@ -198,6 +200,7 @@ CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_HEAP_SIZE=0xc0000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/pi/hudson/bootblock.c"
 CONFIG_TTYS0_BASE=0x3f8
 CONFIG_EHCI_BAR=0xfef00000
@@ -445,7 +448,22 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_IPMI_KCS is not set
 # CONFIG_DRIVERS_LENOVO_WACOM is not set
 # CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
-# CONFIG_SPI_FLASH is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
+# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
 # CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
 # CONFIG_DRIVERS_STORAGE is not set
 CONFIG_DRIVERS_UART=y
@@ -594,6 +612,7 @@ CONFIG_SEABIOS_BOOTORDER_DEF_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/bootorde
 CONFIG_SEABIOS_BOOTMENU_KEY_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/boot-menu-key"
 CONFIG_SEABIOS_BOOTMENU_WAIT_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/boot-menu-wait"
 CONFIG_SEABIOS_BOOTMENU_MESSAGE_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/boot-menu-message"
+CONFIG_SEABIOS_SERCON_PORT_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/sercon-port"
 CONFIG_SEABIOS_DEBUG_LEVEL=-1
 
 #
@@ -609,6 +628,7 @@ CONFIG_PXE=y
 CONFIG_BUILD_IPXE=y
 CONFIG_IPXE_STABLE=y
 # CONFIG_IPXE_MASTER is not set
+# CONFIG_PXE_SERIAL_CONSOLE is not set
 CONFIG_PXE_ROM_ID="8086,157b"
 CONFIG_PXE_CUSTOM_GENERAL_H="../../../../apu2-documentation/ipxe/general.h"
 CONFIG_PXE_CUSTOM_BOOTMENU_FILE="../../../../apu2-documentation/ipxe/menu.ipxe"
@@ -622,7 +642,6 @@ CONFIG_COMPRESSED_PAYLOAD_LZMA=y
 CONFIG_MEMTEST_SECONDARY_PAYLOAD=y
 CONFIG_MEMTEST_STABLE=y
 # CONFIG_MEMTEST_MASTER is not set
-CONFIG_MEMTEST_DISABLE_SPD=y
 # CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
 # CONFIG_TINT_SECONDARY_PAYLOAD is not set
 CONFIG_SORTBOOTORDER_SECONDARY_PAYLOAD=y
@@ -639,6 +658,7 @@ CONFIG_SORTBOOTORDER_SECONDARY_PAYLOAD=y
 # CONFIG_HAVE_DEBUG_SMBUS is not set
 # CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_ACPI is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_TRACE is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set