diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
@@ -153,6 +153,7 @@ build:apu4:
   <<: *build_rom_apu
   variables:
     PLATFORM: apu4
+    MANIFEST_FALLBACK_BRANCH: coreboot-4.6.x
 
 .test:apu4:
   <<: *test_rom

diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -14,6 +14,19 @@ Releases 4.5.x and 4.6.x are based on mainline support submitted in
 
 ## [Unreleased]
 
+## [v4.6.5] - 2017-12-29
+### Added
+- Apu features default values to `bootorder_def` file
+
+### Changed
+- Updated SeaBIOS to 1.11.0.2
+- Updated sortbootorder to v4.6.5
+- Forced EHCI controller for front USB ports
+- Disabled xHCI controller in SeaBIOS
+
+### Fixed
+- Setting correct PCI_ROM_ID for iPXE depending on platform
+
 ## [v4.6.4] - 2017-11-30
 ### Added
 - SPI support
@@ -127,7 +140,8 @@ redundant code which was similar for APU2/3/5 boards.
 - turn off D4 and D5 leds on boot
 - enable power on after power failure
 
-[Unreleased]: https://github.com/pcengines/coreboot/compare/v4.6.4...coreboot-4.6.x
+[Unreleased]: https://github.com/pcengines/coreboot/compare/v4.6.5...coreboot-4.6.x
+[v4.6.5]: https://github.com/pcengines/coreboot/compare/v4.6.4...v4.6.5
 [v4.6.4]: https://github.com/pcengines/coreboot/compare/v4.6.3...v4.6.4
 [v4.6.3]: https://github.com/pcengines/coreboot/compare/v4.6.2...v4.6.3
 [v4.6.2]: https://github.com/pcengines/coreboot/compare/v4.6.1...v4.6.2

diff --git a/configs/pcengines_apu3.config b/configs/pcengines_apu3.config
@@ -629,7 +629,7 @@ CONFIG_BUILD_IPXE=y
 CONFIG_IPXE_STABLE=y
 # CONFIG_IPXE_MASTER is not set
 # CONFIG_PXE_SERIAL_CONSOLE is not set
-CONFIG_PXE_ROM_ID="8086,157b"
+CONFIG_PXE_ROM_ID="8086,1539"
 CONFIG_PXE_CUSTOM_GENERAL_H="../../../../apu2-documentation/ipxe/general.h"
 CONFIG_PXE_CUSTOM_BOOTMENU_FILE="../../../../apu2-documentation/ipxe/menu.ipxe"
 CONFIG_COMPRESSED_PAYLOAD_LZMA=y

diff --git a/configs/pcengines_apu4.config b/configs/pcengines_apu4.config
@@ -629,7 +629,7 @@ CONFIG_BUILD_IPXE=y
 CONFIG_IPXE_STABLE=y
 # CONFIG_IPXE_MASTER is not set
 # CONFIG_PXE_SERIAL_CONSOLE is not set
-CONFIG_PXE_ROM_ID="8086,157b"
+CONFIG_PXE_ROM_ID="8086,1539"
 CONFIG_PXE_CUSTOM_GENERAL_H="../../../../apu2-documentation/ipxe/general.h"
 CONFIG_PXE_CUSTOM_BOOTMENU_FILE="../../../../apu2-documentation/ipxe/menu.ipxe"
 CONFIG_COMPRESSED_PAYLOAD_LZMA=y

diff --git a/configs/pcengines_apu5.config b/configs/pcengines_apu5.config
@@ -627,7 +627,7 @@ CONFIG_BUILD_IPXE=y
 CONFIG_IPXE_STABLE=y
 # CONFIG_IPXE_MASTER is not set
 # CONFIG_PXE_SERIAL_CONSOLE is not set
-CONFIG_PXE_ROM_ID="8086,157b"
+CONFIG_PXE_ROM_ID="8086,1539"
 CONFIG_PXE_CUSTOM_GENERAL_H="../../../../apu2-documentation/ipxe/general.h"
 CONFIG_PXE_CUSTOM_BOOTMENU_FILE="../../../../apu2-documentation/ipxe/menu.ipxe"
 CONFIG_COMPRESSED_PAYLOAD_LZMA=y

diff --git a/payloads/external/SeaBIOS/Kconfig b/payloads/external/SeaBIOS/Kconfig
@@ -5,7 +5,7 @@ choice
 	default SEABIOS_STABLE
 
 config SEABIOS_STABLE
-	bool "1.11.0.1"
+	bool "1.11.0.2"
 	help
 	  Stable SeaBIOS version
 config SEABIOS_MASTER

diff --git a/payloads/external/SeaBIOS/Makefile b/payloads/external/SeaBIOS/Makefile
@@ -1,5 +1,5 @@
 TAG-$(CONFIG_SEABIOS_MASTER)=origin/master
-TAG-$(CONFIG_SEABIOS_STABLE)=rel-1.11.0.1
+TAG-$(CONFIG_SEABIOS_STABLE)=rel-1.11.0.2
 TAG-$(CONFIG_SEABIOS_REVISION)=$(CONFIG_SEABIOS_REVISION_ID)
 
 project_git_repo=https://github.com/pcengines/seabios.git
@@ -73,6 +73,7 @@ endif
 	echo "# CONFIG_PS2PORT is not set" >> seabios/.config
 	echo "# CONFIG_USB_UHCI is not set" >> seabios/.config
 	echo "# CONFIG_USB_OHCI is not set" >> seabios/.config
+	echo "# CONFIG_USB_XHCI is not set" >> seabios/.config
 	echo "# CONFIG_LPT is not set" >> seabios/.config
 
 	# This shows how to force a previously set .config option *off*

diff --git a/payloads/external/iPXE/Kconfig b/payloads/external/iPXE/Kconfig
@@ -72,7 +72,9 @@ config PXE_SERIAL_CONSOLE
 
 config PXE_ROM_ID
 	string "network card PCI IDs"
-	default "8086,157b"
+	default "8086,157b" if BOARD_PCENGINES_APU2
+ 	default "8086,1539" if BOARD_PCENGINES_APU3 || BOARD_PCENGINES_APU4 || \
+	BOARD_PCENGINES_APU5
 	help
 	  The comma-separated PCI vendor and device ID that would associate
 	  your PXE ROM to your network card.

diff --git a/payloads/external/sortbootorder/Makefile b/payloads/external/sortbootorder/Makefile
@@ -1,4 +1,4 @@
-version=4.6.4
+version=4.6.5
 branch_name=v$(version)
 project_url=https://github.com/pcengines/sortbootorder/archive/$(branch_name).tar.gz
 archive_name=$(branch_name).tar.gz

diff --git a/src/mainboard/pcengines/apu2/bootorder_def b/src/mainboard/pcengines/apu2/bootorder_def
@@ -8,3 +8,10 @@
 /pci@i0cf8/pci-bridge@2,5/*@0/drive@0/disk@0
 /pci@i0cf8/pci-bridge@2,5/*@0/drive@1/disk@0
 /rom@genroms/pxe.rom
+pxen0
+scon1
+usben1
+uartc1
+uartd1
+ehcien0
+mpcie2_clk0
diff --git a/src/mainboard/pcengines/apu2/mainboard.c b/src/mainboard/pcengines/apu2/mainboard.c
@@ -40,6 +40,7 @@
 #define PM_RTC_CONTROL	    0x56
 #define PM_RTC_SHADOW	    0x5B
 #define PM_S_STATE_CONTROL  0xBA
+#define PM_USB_ENABLE       0xEF
 
 #define SEC_REG_SERIAL_ADDR 0x1000
 #define MAX_SERIAL_LEN	    10
@@ -248,6 +249,17 @@ static void mainboard_enable(device_t dev)
 	//
 	pm_write8 ( PM_RTC_SHADOW, pm_read8( PM_RTC_SHADOW ) | (1 << 0));
 
+
+	//
+	// Set EHCI3 as controller for port 8 and 9 (front USB ports)
+	//
+	pm_write8 ( PM_USB_ENABLE, pm_read8( PM_USB_ENABLE ) & ~(1 << 7));
+
+	//
+	// Enable EHCI3
+	//
+	pm_write8 ( PM_USB_ENABLE, pm_read8( PM_USB_ENABLE ) | (1 << 5));
+
 	/* Initialize the PIRQ data structures for consumption */
 	pirq_setup();
 }