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base repository: pcengines/coreboot
base: v4.0.11
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head repository: pcengines/coreboot
compare: v4.0.12
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  • 13 commits
  • 48 files changed
  • 2 contributors

Commits on Aug 29, 2017

  1. pcengines/apu5: add apu5 target 

    Signed-off-by: Kamil Wcislo <kamil.wcislo@3mdeb.com>
    Kamil Wcislo committed Aug 29, 2017
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  2. configs: update configs for apu5 target 

    Signed-off-by: Kamil Wcislo <kamil.wcislo@3mdeb.com>
    Kamil Wcislo committed Aug 29, 2017
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Commits on Aug 30, 2017

  1. update gitignore with sortbootorder build output 

    Signed-off-by: Kamil Wcislo <kamil.wcislo@3mdeb.com>
    Kamil Wcislo committed Aug 30, 2017
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  2. Merge branch 'add_apu5_target' into rel_v4.0.12

    Kamil Wcislo committed Aug 30, 2017
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  3. pcengines/apu5: disable PCIe on J1 

    Signed-off-by: Kamil Wcislo <kamil.wcislo@3mdeb.com>
    Kamil Wcislo committed Aug 30, 2017
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  4. Merge branch 'disable_j1_pcie' into rel_v4.0.12

    Kamil Wcislo committed Aug 30, 2017
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  5. pcengines/apu5: correct GPIO settings for this platform 

    Signed-off-by: Kamil Wcislo <kamil.wcislo@3mdeb.com>
    Kamil Wcislo committed Aug 30, 2017
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  6. pcengines/apu5: EHCI0 enabled by default 

    Signed-off-by: Kamil Wcislo <kamil.wcislo@3mdeb.com>
    Kamil Wcislo committed Aug 30, 2017
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  7. configs: bump version to 4.0.12 

    Signed-off-by: Kamil Wcislo <kamil.wcislo@3mdeb.com>
    Kamil Wcislo committed Aug 30, 2017
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  8. configs: enable sortbootorder for APU5 

    Signed-off-by: Kamil Wcislo <kamil.wcislo@3mdeb.com>
    Kamil Wcislo committed Aug 30, 2017
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  9. CHANGELOG: add 4.0.12 

    Signed-off-by: Kamil Wcislo <kamil.wcislo@3mdeb.com>
    Kamil Wcislo committed Aug 30, 2017
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  10. pcengines/apu5: set simswap pins default high 

    Signed-off-by: Kamil Wcislo <kamil.wcislo@3mdeb.com>
    Kamil Wcislo committed Aug 30, 2017
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  11. Merge pull request #49 from pcengines/rel_v4.0.12 

    Rel v4.0.12
    @pietrushnic
    pietrushnic committed Aug 30, 2017
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