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base repository: pcengines/coreboot
base: v4.0.29
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head repository: pcengines/coreboot
compare: v4.0.30
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  • 9 commits
  • 6 files changed
  • 2 contributors

Commits on Feb 7, 2020

  1. src/mainboard/pcengines/apu5: fix SD bootorder 

    Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
    @miczyg1
    miczyg1 committed Feb 7, 2020
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  2. Merge pull request #371 from pcengines/apu5_sd_bootorder_legacy 

    src/mainboard/pcengines/apu5: fix SD bootorder
    @miczyg1
    miczyg1 committed Feb 7, 2020
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  3. src/mainboard/pcengines/apu2/romstage.c: add LPC MCU init sequence 

    Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
    @miczyg1
    miczyg1 committed Feb 7, 2020
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  4. src/mainboard/pcengines/apu2/romstage.c: reduce the loglevel for LPC … 

    …MCU init sequence errors

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
    @miczyg1
    miczyg1 committed Feb 7, 2020
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  5. Merge pull request #373 from pcengines/apu5_lpc_mcu_legacy 

    Apu5 lpc mcu legacy
    @miczyg1
    miczyg1 committed Feb 7, 2020
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Commits on Feb 25, 2020

  1. CHANGELOG.md: release v4.0.30 update 

    Signed-off-by: Piotr Kleinschmidt <piotr.kleinschmidt@3mdeb.com>
    Piotr Kleinschmidt committed Feb 25, 2020
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  2. CHANGELOG.md: change release date 

    Signed-off-by: Piotr Kleinschmidt <piotr.kleinschmidt@3mdeb.com>
    Piotr Kleinschmidt committed Feb 25, 2020
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  3. Merge pull request #376 from pcengines/rel_4.0.30_changelog 

    Legacy release v4.0.30 - update CHANGELOG.md
    @miczyg1
    miczyg1 committed Feb 25, 2020
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  4. Merge pull request #377 from pcengines/rel_4.0.30 

    Rel 4.0.30
    @miczyg1
    miczyg1 committed Feb 25, 2020
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