14 changes: 12 additions & 2 deletions payloads/coreinfo/pci_module.c
Expand Up @@ -183,8 +183,14 @@ static void pci_scan_bus(int bus)

/* Nobody home. */
if (val == 0xffffffff || val == 0x00000000 ||
val == 0x0000ffff || val == 0xffff0000)
val == 0x0000ffff || val == 0xffff0000) {

/* If function 0 is not present, no need
* to test other functions. */
if (func == 0)
func = 8;
continue;
}

/* FIXME: Remove this arbitrary limitation. */
if (devices_index >= MAX_PCI_DEVICES)
Expand All @@ -197,7 +203,11 @@ static void pci_scan_bus(int bus)

/* If this is a bridge, then follow it. */
hdr = pci_read_config8(dev, REG_HEADER_TYPE);
hdr &= 0x7f;

if ((func == 0) && !(hdr & HEADER_TYPE_MULTIFUNCTION))
func = 8;

hdr &= ~HEADER_TYPE_MULTIFUNCTION;
if (hdr == HEADER_TYPE_BRIDGE ||
hdr == HEADER_TYPE_CARDBUS) {
unsigned int busses;
Expand Down
1 change: 1 addition & 0 deletions payloads/external/GRUB2/Makefile
Expand Up @@ -30,6 +30,7 @@ grub2/build/config.h: $(CONFIG_DEP) | checkout
mkdir grub2/build
cd grub2 && ./autogen.sh
cd grub2/build && ../configure CC="$(HOSTCC)" LD="$(LD)" \
FREETYPE="pkg-config freetype2" BUILD_FREETYPE="pkg-config freetype2" \
TARGET_CC="$(CC)" TARGET_OBJCOPY="$(OBJCOPY)" TARGET_STRIP="$(STRIP)" \
CFLAGS=-O2 TARGET_CFLAGS=-Os \
--with-platform=coreboot --enable-boot-time --disable-werror
Expand Down
113 changes: 113 additions & 0 deletions payloads/external/LinuxBoot/Kconfig
@@ -0,0 +1,113 @@
## This file is part of the coreboot project.
##
## Copyright (C) 2017 Facebook Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##

if PAYLOAD_LINUXBOOT

choice
prompt "Architecture"
default LINUXBOOT_X86_64

config LINUXBOOT_X86_64
bool "x86_64"
help
AMD64 kernel and initramfs

config LINUXBOOT_X86
bool "x86"
help
X86 kernel and initramfs
endchoice

config LINUXBOOT_ARCH
string
default "amd64" if LINUXBOOT_X86_64
default "386" if LINUXBOOT_X86

choice
prompt "Kernel version"
default LINUXBOOT_KERNEL_STABLE

config LINUXBOOT_KERNEL_STABLE
bool "4.15.3"
help
Stable kernel version
endchoice

config LINUXBOOT_KERNEL_VERSION
string
default "4.15.3" if LINUXBOOT_KERNEL_STABLE

config LINUXBOOT_KERNEL_CONFIGFILE
string "Kernel config file"
default ""
help
Add your own kernel configuration file. Otherwise a default
minimal defconfig is used.

config LINUXBOOT_KERNEL_COMMANDLINE
string "Kernel command-line"
default ""
help
Add your own kernel command-line arguments.

config PAYLOAD_FILE
default "payloads/external/LinuxBoot/linuxboot/kernel-image"

choice
prompt "Payload Mode"
default LINUXBOOT_UROOT

config LINUXBOOT_UROOT
bool "u-root"
help
Enable u-root linuxboot mode.
See http://u-root.tk/ for more information.
endchoice

if LINUXBOOT_UROOT

choice
prompt "U-root version"
default LINUXBOOT_UROOT_MASTER

config LINUXBOOT_UROOT_MASTER
bool "master"
help
Latest u-root version
endchoice

config LINUXBOOT_UROOT_VERSION
string
default "master" if LINUXBOOT_UROOT_MASTER

config LINUXBOOT_UROOT_COMMANDS
string "Select u-root commands"
default ""
help
Comma separated list of additional modules to include. Otherwise all modules
of u-root are included.

config LINUXBOOT_UROOT_FILES
string "Add files to u-root base"
default ""
help
Path to directory containing root structure for embedding into the
initramfs.

config PAYLOAD_USERSPACE
string ""
default "payloads/external/LinuxBoot/linuxboot/initramfs.cpio.xz"

endif
endif
23 changes: 23 additions & 0 deletions payloads/external/LinuxBoot/Kconfig.name
@@ -0,0 +1,23 @@
## This file is part of the coreboot project.
##
## Copyright (C) 2017 Facebook Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##

config PAYLOAD_LINUXBOOT
bool "LinuxBoot"
depends on ARCH_X86
help
Select this option if you want to build a coreboot image
with a LinuxBoot payload. If you don't know what this is
about, just leave it enabled.

See https://coreboot.org/Payloads for more information.
63 changes: 63 additions & 0 deletions payloads/external/LinuxBoot/Makefile
@@ -0,0 +1,63 @@
## This file is part of the coreboot project.
##
## Copyright (C) 2017 Facebook Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##

kernel_tarball=https://cdn.kernel.org/pub/linux/kernel/v4.x/linux-$(CONFIG_LINUXBOOT_KERNEL_VERSION).tar.xz
project_dir=linuxboot
kernel_dir=$(project_dir)/kernel

unexport $(COREBOOT_EXPORTS)

all: payload

$(kernel_dir)/.config:
echo " WWW Download Linux $(CONFIG_LINUXBOOT_KERNEL_VERSION)"
mkdir -p $(kernel_dir)
ifeq ("$(wildcard $(kernel_dir)/README)","")
wget -qO- $(kernel_tarball) | tar xJ -C $(kernel_dir) --strip 1
endif

config: $(kernel_dir)/.config
echo " CONFIG Linux $(CONFIG_LINUXBOOT_KERNEL_VERSION)"
ifneq ($(CONFIG_LINUXBOOT_KERNEL_CONFIGFILE),)
cp $(CONFIG_LINUXBOOT_KERNEL_CONFIGFILE) $(kernel_dir)/.config
endif
ifeq ($(CONFIG_LINUXBOOT_ARCH),386)
cp x86/defconfig $(kernel_dir)/.config
else ifeq ($(CONFIG_LINUXBOOT_ARCH),amd64)
cp x86_64/defconfig $(kernel_dir)/.config
endif

$(project_dir)/kernel-image: config
echo " MAKE Kernel $(CONFIG_LINUXBOOT_KERNEL_VERSION)"
$(MAKE) -C $(kernel_dir) olddefconfig
$(MAKE) -C $(kernel_dir) -j $(CPUS)
ifeq ($(CONFIG_LINUXBOOT_ARCH),386)
cp $(kernel_dir)/arch/x86/boot/bzImage $(project_dir)/kernel-image
else ifeq ($(CONFIG_LINUXBOOT_ARCH),amd64)
cp $(kernel_dir)/arch/x86/boot/bzImage $(project_dir)/kernel-image
endif

payload: $(project_dir)/kernel-image
ifeq ($(CONFIG_LINUXBOOT_UROOT),y)
$(MAKE) -f targets/u-root.mk
endif

clean:
if [ -d "$(kernel_dir)" ]; then make -C $(kernel_dir) clean; fi
rm -f $(project_dir)/initramfs.cpio.xz

distclean:
rm -rf $(project_dir)

.PHONY: config patch payload clean distclean clone fetch all
80 changes: 80 additions & 0 deletions payloads/external/LinuxBoot/targets/u-root.mk
@@ -0,0 +1,80 @@
## This file is part of the coreboot project.
##
## Copyright (C) 2017 Facebook Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##

uroot_git_repo=https://github.com/u-root/u-root.git
uroot_dir=$(project_dir)/go/src/github.com/u-root/u-root
go_check=$(shell command -v go 1>/dev/null 2>&1 && echo go)
project_dir=$(shell pwd)/linuxboot
project_name=u-root
go_path_dir=$(shell pwd)/linuxboot/go

all: build

check:
ifneq ($(go_check),go)
printf "\n<<Please install Golang >= 1.9 for u-root mode>>\n\n"
exit 1
endif
mkdir -p $(project_dir)/go/src/github.com/u-root

$(uroot_dir)/.git:
echo " Git Cloning u-root $(CONFIG_LINUXBOOT_UROOT_VERSION)"
git clone $(uroot_git_repo) $(uroot_dir)

fetch: check $(uroot_dir)/.git
-cd "$(uroot_dir)" && git fetch origin

checkout: fetch
cd "$(uroot_dir)" && \
if ! git diff --quiet _cb_checkout "$(CONFIG_LINUXBOOT_UROOT_VERSION)" -- 2>/dev/null; \
then \
printf " CHECKOUT $(project_name) [$(CONFIG_LINUXBOOT_UROOT_VERSION)]\n"; \
git checkout $$(git rev-parse HEAD) >/dev/null 2>&1; \
git branch -f _cb_checkout "$(CONFIG_LINUXBOOT_UROOT_VERSION)" && \
git checkout _cb_checkout && \
$(if $(project_patches), \
for patch in $(project_patches); do \
printf " PATCH $$patch\n"; \
git am --keep-cr "$$patch" || \
( printf "Error when applying patches.\n"; \
git am --abort; exit 1; ); \
done;,true;) \
fi

$(project_dir)/initramfs.cpio.xz: checkout
cd $(uroot_dir); GOARCH=$(CONFIG_LINUXBOOT_ARCH) GOPATH=$(go_path_dir) go build u-root.go
echo " MAKE u-root $(CONFIG_LINUXBOOT_UROOT_VERSION)"
ifneq ($(CONFIG_LINUXBOOT_UROOT_COMMANDS),)
ifneq ($(CONFIG_LINUXBOOT_UROOT_FILES),)
cd $(uroot_dir); GOARCH=$(CONFIG_LINUXBOOT_ARCH) GOPATH=$(go_path_dir) ./u-root \
-build=bb -files $(CONFIG_LINUXBOOT_UROOT_FILES) -o $(project_dir)/initramfs.cpio \
./cmds/{$(CONFIG_LINUXBOOT_UROOT_COMMANDS)}
else
cd $(uroot_dir); GOARCH=$(CONFIG_LINUXBOOT_ARCH) GOPATH=$(go_path_dir) ./u-root \
-build=bb -o $(project_dir)/initramfs.cpio ./cmds/{$(CONFIG_LINUXBOOT_UROOT_COMMANDS)}
endif
else
ifneq ($(CONFIG_LINUXBOOT_UROOT_FILES),)
cd $(uroot_dir); GOARCH=$(CONFIG_LINUXBOOT_ARCH) GOPATH=$(go_path_dir) ./u-root \
-build=bb -files $(CONFIG_LINUXBOOT_UROOT_FILES) -o $(project_dir)/initramfs.cpio
else
cd $(uroot_dir); GOARCH=$(CONFIG_LINUXBOOT_ARCH) GOPATH=$(go_path_dir) ./u-root \
-build=bb -o $(project_dir)/initramfs.cpio
endif
endif
xz -f --check=crc32 -9 --lzma2=dict=1MiB --threads=$(CPUS) $(project_dir)/initramfs.cpio

build: $(project_dir)/initramfs.cpio.xz

.PHONY: build checkout fetch all check
37 changes: 37 additions & 0 deletions payloads/external/Makefile.inc
Expand Up @@ -4,6 +4,7 @@
##
## Copyright (C) 2009-2010 coresystems GmbH
## Copyright (C) 2015 Google Inc.
## Copyright (C) 2017 Facebook Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
Expand Down Expand Up @@ -31,6 +32,13 @@ $(PAYLOAD_CONFIG): payloads/external/depthcharge/depthcharge/build/depthcharge.e
#TODO: Figure out version
endif

ifeq ($(CONFIG_PAYLOAD_LINUXBOOT),y)
ifneq ($(strip $(call strip_quotes,$(CONFIG_LINUXBOOT_KERNEL_COMMANDLINE))),)
ADDITIONAL_PAYLOAD_CONFIG+=-C $(CONFIG_LINUXBOOT_KERNEL_COMMANDLINE)
endif
ADDITIONAL_PAYLOAD_CONFIG+=-I $(CONFIG_PAYLOAD_USERSPACE)
endif

ifeq ($(CONFIG_PAYLOAD_LINUX),y)
ifneq ($(strip $(call strip_quotes,$(CONFIG_LINUX_COMMAND_LINE))),)
ADDITIONAL_PAYLOAD_CONFIG+=-C $(CONFIG_LINUX_COMMAND_LINE)
Expand Down Expand Up @@ -307,3 +315,32 @@ payloads/external/iPXE/ipxe/ipxe.rom ipxe: $(DOTCONFIG)
CONFIG_PXE_CUSTOM_GENERAL_H=$(CONFIG_PXE_CUSTOM_GENERAL_H) \
CONFIG_PXE_CUSTOM_BOOTMENU_FILE=$(CONFIG_PXE_CUSTOM_BOOTMENU_FILE) \
MFLAGS= MAKEFLAGS=

# LinuxBoot

linuxboot:
$(MAKE) -C payloads/external/LinuxBoot \
HOSTCC="$(HOSTCC)" \
CC="$(HOSTCC)" \
GCC_CC_x86_32=$(GCC_CC_x86_32) \
GCC_CC_x86_64=$(GCC_CC_x86_64) \
GCC_CC_arm=$(GCC_CC_arm) \
GCC_CC_arm64=$(GCC_CC_arm64) \
OBJCOPY_x86_32=$(OBJCOPY_x86_32) \
OBJCOPY_x86_64=$(OBJCOPY_x86_64) \
OBJCOPY_arm=$(OBJCOPY_arm) \
OBJCOPY_arm64=$(OBJCOPY_arm64) \
CPUS=$(CPUS) \
CONFIG_LINUXBOOT_KERNEL_VERSION=$(CONFIG_LINUXBOOT_KERNEL_VERSION) \
CONFIG_LINUXBOOT_KERNEL_CONFIGFILE=$(CONFIG_LINUXBOOT_KERNEL_CONFIGFILE) \
CONFIG_LINUXBOOT_KERNEL_COMMANDLINE=$(CONFIG_LINUXBOOT_KERNEL_COMMANDLINE) \
CONFIG_LINUXBOOT_UROOT_VERSION=$(CONFIG_LINUXBOOT_UROOT_VERSION) \
CONFIG_LINUXBOOT_UROOT_COMMANDS="$(CONFIG_LINUXBOOT_UROOT_COMMANDS)" \
CONFIG_LINUXBOOT_ARCH=$(CONFIG_LINUXBOOT_ARCH) \
CONFIG_LINUXBOOT_UROOT=$(CONFIG_LINUXBOOT_UROOT) \
CONFIG_LINUXBOOT_UROOT_FILES=$(CONFIG_LINUXBOOT_UROOT_FILES)

payloads/external/LinuxBoot/linuxboot/kernel-image: linuxboot
payloads/external/LinuxBoot/linuxboot/initramfs.cpio.xz: linuxboot
payloads/external/LinuxBoot/linuxboot/kernel/.config: linuxboot
payloads/external/LinuxBoot/linuxboot/go/src/github.com/u-root/u-root/.git: linuxboot
16 changes: 9 additions & 7 deletions payloads/external/iPXE/Kconfig
Expand Up @@ -63,13 +63,6 @@ config PXE_ROM_FILE
help
The path and filename of the file to use as PXE ROM.

config PXE_SERIAL_CONSOLE
bool "Enable serial console"
def_bool n
help
Enable/disable iPXE serial console. Since SeaBIOS supports serial
console this option might be helpful to avoid duplicated output.

config PXE_ROM_ID
string "network card PCI IDs"
default "10ec,8168"
Expand Down Expand Up @@ -97,5 +90,14 @@ config PXE_CUSTOM_BOOTMENU_FILE
help
This option allows user to customize boot menu for iPXE ROM.

config PXE_SERIAL_CONSOLE
bool "Enable iPXE serial console"
def_bool y
help
Enable/disable iPXE serial console. Since SeaBIOS supports serial
console this option might be helpful to avoid duplicated output.

Unselect to let only SeaBIOS handle printing output.

endmenu
endif
2 changes: 1 addition & 1 deletion payloads/external/tianocore/Makefile
Expand Up @@ -78,7 +78,7 @@ checktools:
echo "#include <uuid/uuid.h>" > libtest.c
echo "int main(int argc, char **argv) { (void) argc; (void) argv; return 0; }" >> libtest.c
$(HOSTCC) $(HOSTCCFLAGS) libtest.c -o libtest >/dev/null 2>&1 && echo " found uuid-dev." || \
( echo " Not found."; echo "ERROR: please_install uuid-dev (uuid-devel)"; exit 1 )
( echo " Not found."; echo "ERROR: please_install uuid-dev (libuuid-devel)"; exit 1 )
rm -rf libtest.c libtest
echo "Checking nasm..."
type nasm > /dev/null 2>&1 && echo " found nasm." || \
Expand Down
@@ -0,0 +1,38 @@
From b652262ed0dd554c44e7b1bf7134d3458f5edef1 Mon Sep 17 00:00:00 2001
From: Patrick Rudolph <siro@das-labor.org>
Date: Sun, 17 Jun 2018 08:44:51 +0200
Subject: [PATCH] BaseTools: Fix building with -Werror=stringop-truncation

Signed-off-by: Patrick Rudolph <siro@das-labor.org>
---
BaseTools/Source/C/GenVtf/GenVtf.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/BaseTools/Source/C/GenVtf/GenVtf.c b/BaseTools/Source/C/GenVtf/GenVtf.c
index acc142a6d1..5d77016eba 100644
--- a/BaseTools/Source/C/GenVtf/GenVtf.c
+++ b/BaseTools/Source/C/GenVtf/GenVtf.c
@@ -129,9 +129,9 @@ Returns:
} else {
Length = strlen(Str);
if (Length < 4) {
- strncpy (TemStr + 4 - Length, Str, Length);
+ memcpy (TemStr + 4 - Length, Str, Length);
} else {
- strncpy (TemStr, Str + Length - 4, 4);
+ memcpy (TemStr, Str + Length - 4, 4);
}

sscanf (
@@ -1529,7 +1529,7 @@ Returns:
//
FitStartPtr = (FIT_TABLE *) RelativeAddress;

- strncpy ((CHAR8 *) &FitStartPtr->CompAddress, FIT_SIGNATURE, 8); // "_FIT_ "
+ memcpy ((CHAR8 *) &FitStartPtr->CompAddress, FIT_SIGNATURE, 8); // "_FIT_ "
assert (((VtfInfo->CompSize & 0x00FFFFFF) % 16) == 0);
FitStartPtr->CompSize = (VtfInfo->CompSize & 0x00FFFFFF) / 16;
FitStartPtr->CompVersion = MAKE_VERSION (VtfInfo->MajorVer, VtfInfo->MinorVer);
--
2.17.0

@@ -0,0 +1,40 @@
From 5546ab29b2c0c2fc3a963bc71221918dc77b6152 Mon Sep 17 00:00:00 2001
From: Patrick Rudolph <siro@das-labor.org>
Date: Sun, 17 Jun 2018 08:53:25 +0200
Subject: [PATCH] gcc7: Fix building with -fpermissive

Signed-off-by: Patrick Rudolph <siro@das-labor.org>
---
BaseTools/Source/C/VfrCompile/VfrUtilityLib.cpp | 2 +-
MdeModulePkg/Library/UefiHiiLib/HiiLib.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/BaseTools/Source/C/VfrCompile/VfrUtilityLib.cpp b/BaseTools/Source/C/VfrCompile/VfrUtilityLib.cpp
index 3ca57ed741..4fa066dd9f 100644
--- a/BaseTools/Source/C/VfrCompile/VfrUtilityLib.cpp
+++ b/BaseTools/Source/C/VfrCompile/VfrUtilityLib.cpp
@@ -3372,7 +3372,7 @@ CVfrStringDB::GetVarStoreNameFormStringId (
UINT8 BlockType;
EFI_HII_STRING_PACKAGE_HDR *PkgHeader;

- if (mStringFileName == '\0' ) {
+ if (mStringFileName == NULL ) {
return NULL;
}

diff --git a/MdeModulePkg/Library/UefiHiiLib/HiiLib.c b/MdeModulePkg/Library/UefiHiiLib/HiiLib.c
index 857950118f..de0aa5f7bc 100644
--- a/MdeModulePkg/Library/UefiHiiLib/HiiLib.c
+++ b/MdeModulePkg/Library/UefiHiiLib/HiiLib.c
@@ -2181,7 +2181,7 @@ InternalHiiIfrValueAction (

StringPtr = ConfigAltResp;

- while (StringPtr != L'\0') {
+ while (StringPtr != NULL) {
//
// 1. Find <ConfigHdr> GUID=...&NAME=...&PATH=...
//
--
2.17.0

12 changes: 8 additions & 4 deletions payloads/external/tint/Makefile
@@ -1,5 +1,5 @@
project_url=http://snapshot.debian.org/archive/debian-archive/20110127T084257Z/debian/pool/main/t/tint/tint_0.03b.tar.gz
archive_name=tint_0.03b.tar.gz
project_url=https://mirror.fsf.org/trisquel/pool/main/t/tint/tint_0.04+nmu1.tar.gz
archive_name=tint_0.04+nmu1.tar.gz

unexport KCONFIG_AUTOHEADER
unexport KCONFIG_AUTOCONFIG
Expand All @@ -16,13 +16,17 @@ tint: patch

patch: download
cd tint; \
if [ -e debian ]; then patch -l -p1 < ../libpayload_tint.patch; fi
if [ -e debian ]; then \
rm -rf debian typedefs.h Makefile; \
touch Makefile; \
patch -l -p1 < ../libpayload_tint.patch; \
fi

download:
test -d tint || { wget $(project_url); \
tar -xvf $(archive_name); \
rm $(archive_name); \
mv tint-0.03b tint; }
mv tint-0.04+nmu1 tint; }

clean:
test -d tint && $(MAKE) -C tint clean || exit 0
Expand Down
771 changes: 139 additions & 632 deletions payloads/external/tint/libpayload_tint.patch

Large diffs are not rendered by default.

2 changes: 1 addition & 1 deletion payloads/libpayload/configs/config.cheza
@@ -1,3 +1,3 @@
CONFIG_LP_CHROMEOS=y
CONFIG_LP_ARCH_ARM64=y
# CONFIG_LP_CURSES is not set
CONFIG_LP_TIMER_ARM64_ARCH=y
2 changes: 1 addition & 1 deletion payloads/libpayload/curses/form/fld_info.c
Expand Up @@ -82,7 +82,7 @@ field_info(const FIELD *field,
| int *drows, int *dcols,
| int *maxgrow)
|
| Description : Retrieve informations about a dynamic fields current
| Description : Retrieve information about a dynamic fields current
| dynamic parameters.
|
| Return Values : E_OK - success
Expand Down
4 changes: 2 additions & 2 deletions payloads/libpayload/curses/form/fld_user.c
Expand Up @@ -39,7 +39,7 @@ MODULE_ID("$Id: fld_user.c,v 1.16 2010/01/23 21:14:36 tom Exp $")
| Function : int set_field_userptr(FIELD *field, void *usrptr)
|
| Description : Set the pointer that is reserved in any field to store
| application relevant informations
| application relevant information
|
| Return Values : E_OK - on success
+--------------------------------------------------------------------------*/
Expand All @@ -57,7 +57,7 @@ set_field_userptr(FIELD *field, void *usrptr)
| Function : void *field_userptr(const FIELD *field)
|
| Description : Return the pointer that is reserved in any field to
| store application relevant informations.
| store application relevant information.
|
| Return Values : Value of pointer. If no such pointer has been set,
| NULL is returned
Expand Down
4 changes: 2 additions & 2 deletions payloads/libpayload/curses/form/frm_user.c
Expand Up @@ -39,7 +39,7 @@ MODULE_ID("$Id: frm_user.c,v 1.15 2010/01/23 21:14:36 tom Exp $")
| Function : int set_form_userptr(FORM *form, void *usrptr)
|
| Description : Set the pointer that is reserved in any form to store
| application relevant informations
| application relevant information
|
| Return Values : E_OK - on success
+--------------------------------------------------------------------------*/
Expand All @@ -57,7 +57,7 @@ set_form_userptr(FORM *form, void *usrptr)
| Function : void *form_userptr(const FORM *form)
|
| Description : Return the pointer that is reserved in any form to
| store application relevant informations.
| store application relevant information.
|
| Return Values : Value of pointer. If no such pointer has been set,
| NULL is returned
Expand Down
2 changes: 1 addition & 1 deletion payloads/libpayload/curses/menu/m_global.c
Expand Up @@ -135,7 +135,7 @@ ComputeMaximum_NameDesc_Lengths(MENU * menu)
| Facility : libnmenu
| Function : static void ResetConnectionInfo(MENU *, ITEM **)
|
| Description : Reset all informations in the menu and the items in
| Description : Reset all information in the menu and the items in
| the item array that indicates a connection
|
| Return Values : -
Expand Down
4 changes: 2 additions & 2 deletions payloads/libpayload/curses/menu/m_item_use.c
Expand Up @@ -44,7 +44,7 @@ MODULE_ID("$Id: m_item_use.c,v 1.17 2010/01/23 21:20:10 tom Exp $")
| Function : int set_item_userptr(ITEM *item, void *userptr)
|
| Description : Set the pointer that is reserved in any item to store
| application relevant informations.
| application relevant information.
|
| Return Values : E_OK - success
+--------------------------------------------------------------------------*/
Expand All @@ -61,7 +61,7 @@ set_item_userptr(ITEM * item, void *userptr)
| Function : void *item_userptr(const ITEM *item)
|
| Description : Return the pointer that is reserved in any item to store
| application relevant informations.
| application relevant information.
|
| Return Values : Value of the pointer. If no such pointer has been set,
| NULL is returned.
Expand Down
4 changes: 2 additions & 2 deletions payloads/libpayload/curses/menu/m_userptr.c
Expand Up @@ -44,7 +44,7 @@ MODULE_ID("$Id: m_userptr.c,v 1.17 2010/01/23 21:20:10 tom Exp $")
| Function : int set_menu_userptr(MENU *menu, void *userptr)
|
| Description : Set the pointer that is reserved in any menu to store
| application relevant informations.
| application relevant information.
|
| Return Values : E_OK - success
+--------------------------------------------------------------------------*/
Expand All @@ -61,7 +61,7 @@ set_menu_userptr(MENU * menu, void *userptr)
| Function : void *menu_userptr(const MENU *menu)
|
| Description : Return the pointer that is reserved in any menu to
| store application relevant informations.
| store application relevant information.
|
| Return Values : Value of the pointer. If no such pointer has been set,
| NULL is returned
Expand Down
19 changes: 14 additions & 5 deletions payloads/libpayload/drivers/i8042/i8042.c
Expand Up @@ -31,6 +31,8 @@
#include <libpayload.h>
#include <stddef.h>

#include "i8042.h"

/* Overflowing FIFO implementation */

struct fifo {
Expand Down Expand Up @@ -87,6 +89,8 @@ static void fifo_push(struct fifo *fifo, u8 c)
*/
static int fifo_is_empty(struct fifo *fifo)
{
if (!fifo)
return 1;
return fifo->tx == fifo->rx;
}

Expand Down Expand Up @@ -202,13 +206,13 @@ u8 i8042_probe(void)
kbc_init = 1;

/* Disable first device */
if (i8042_cmd(0xad) != 0) {
if (i8042_cmd(I8042_CMD_DIS_KB) != 0) {
kbc_init = 0;
return 0;
}

/* Disable second device */
if (i8042_cmd(0xa7) != 0) {
if (i8042_cmd(I8042_CMD_DIS_AUX) != 0) {
kbc_init = 0;
return 0;
}
Expand All @@ -218,17 +222,18 @@ u8 i8042_probe(void)
read_data();

/* Self test. */
if (i8042_cmd_with_response(0xaa) != 0x55) {
if (i8042_cmd_with_response(I8042_CMD_SELF_TEST)
!= I8042_SELF_TEST_RSP) {
kbc_init = 0;
return 0;
}

/* Test secondary port */
if (i8042_cmd_with_response(0xa9) == 0)
if (i8042_cmd_with_response(I8042_CMD_AUX_TEST) == 0)
aux_fifo = fifo_init(4 * 32);

/* Test first PS/2 port */
if (i8042_cmd_with_response(0xab) == 0)
if (i8042_cmd_with_response(I8042_CMD_KB_TEST) == 0)
ps2_fifo = fifo_init(2 * 16);

kbc_init = 0;
Expand Down Expand Up @@ -332,6 +337,8 @@ static void i8042_data_poll(void)
*/
u8 i8042_data_ready_ps2(void)
{
if (!initialized)
return 0;
i8042_data_poll();
return !fifo_is_empty(ps2_fifo);
}
Expand All @@ -341,6 +348,8 @@ u8 i8042_data_ready_ps2(void)
*/
u8 i8042_data_ready_aux(void)
{
if (!initialized)
return 0;
i8042_data_poll();
return !fifo_is_empty(aux_fifo);
}
Expand Down
69 changes: 69 additions & 0 deletions payloads/libpayload/drivers/i8042/i8042.h
@@ -0,0 +1,69 @@
/*
* This file is part of the libpayload project.
*
* Copyright 2018 Google LLC.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/

#ifndef __DRIVERS_I8042_I8042_H__
#define __DRIVERS_I8042_I8042_H__

/* Port 0x64 commands */
#define I8042_CMD_RD_CMD_BYTE 0x20
#define I8042_CMD_WR_CMD_BYTE 0x60
#define I8042_CMD_DIS_AUX 0xa7
#define I8042_CMD_EN_AUX 0xa8
#define I8042_CMD_AUX_TEST 0xa9
#define I8042_CMD_SELF_TEST 0xaa
#define I8042_SELF_TEST_RSP 0x55
#define I8042_CMD_KB_TEST 0xab
#define I8042_CMD_DIAG_DUMP 0xac
#define I8042_CMD_DIS_KB 0xad
#define I8042_CMD_EN_KB 0xae
#define I8042_CMD_RD_INPUT_PORT 0xc0
#define I8042_CMD_RD_OUTPUT_PORT 0xd0
#define I8042_CMD_WR_OUTPUT_PORT 0xd1
#define I8042_CMD_RD_TEST_INPUTS 0xe0

/* Port 0x60 keyboard commands */
#define I8042_KBCMD_SET_MODE_IND 0xed
#define I8042_MODE_CAPS_LOCK_ON (1 << 2)
#define I8042_MODE_CAPS_LOCK_OFF (0 << 2)
#define I8042_MODE_NUM_LOCK_ON (1 << 1)
#define I8042_MODE_NUM_LOCK_OFF (0 << 1)
#define I8042_MODE_SCROLL_LOCK_ON (1 << 0)
#define I8042_MODE_SCROLL_LOCK_OFF (0 << 0)
#define I8042_KBCMD_SET_SCANCODE 0xf0
#define I8042_SCANCODE_SET_1 (1)
#define I8042_SCANCODE_SET_2 (2)
#define I8042_SCANCODE_SET_3 (3)
#define I8042_KBCMD_SET_TYPEMATIC 0xf3
#define I8042_KBCMD_EN 0xf4
#define I8042_KBCMD_DEFAULT_DIS 0xf5
#define I8042_KBCMD_SET_DEFAULT 0xf6
#define I8042_KBCMD_RESEND 0xfe
#define I8042_KBCMD_RESET 0xff

#endif /* __DRIVERS_I8042_I8042_H__ */
85 changes: 49 additions & 36 deletions payloads/libpayload/drivers/i8042/keyboard.c
Expand Up @@ -32,7 +32,8 @@
#include <libpayload-config.h>
#include <libpayload.h>

#define I8042_CMD_DIS_KB 0xad
#include "i8042.h"

#define POWER_BUTTON 0x90

struct layout_maps {
Expand All @@ -41,6 +42,7 @@ struct layout_maps {
};

static struct layout_maps *map;
static int modifier = 0;

static struct layout_maps keyboard_layouts[] = {
#if IS_ENABLED(CONFIG_LP_PC_KEYBOARD_LAYOUT_US)
Expand Down Expand Up @@ -158,11 +160,6 @@ static struct layout_maps keyboard_layouts[] = {
#endif
};

#define MOD_SHIFT (1 << 0)
#define MOD_CTRL (1 << 1)
#define MOD_CAPSLOCK (1 << 2)
#define MOD_ALT (1 << 3)

static unsigned char keyboard_cmd(unsigned char cmd)
{
i8042_write_data(cmd);
Expand All @@ -177,71 +174,81 @@ int keyboard_havechar(void)

unsigned char keyboard_get_scancode(void)
{
return i8042_read_data_ps2();
}

int keyboard_getchar(void)
{
static int modifier = 0;
unsigned char ch;
int shift;
int ret = 0;

while (!keyboard_havechar()) ;

ch = keyboard_get_scancode();
ch = i8042_read_data_ps2();

switch (ch) {
case 0x36:
case 0x2a:
modifier |= MOD_SHIFT;
modifier |= KB_MOD_SHIFT;
break;
case 0x80 | 0x36:
case 0x80 | 0x2a:
modifier &= ~MOD_SHIFT;
modifier &= ~KB_MOD_SHIFT;
break;
case 0x38:
modifier |= MOD_ALT;
modifier |= KB_MOD_ALT;
break;
case 0x80 | 0x38:
modifier &= ~MOD_ALT;
modifier &= ~KB_MOD_ALT;
break;
case 0x1d:
modifier |= MOD_CTRL;
modifier |= KB_MOD_CTRL;
break;
case 0x80 | 0x1d:
modifier &= ~MOD_CTRL;
modifier &= ~KB_MOD_CTRL;
break;
case 0x3a:
if (modifier & MOD_CAPSLOCK) {
modifier &= ~MOD_CAPSLOCK;
if (keyboard_cmd(0xed))
keyboard_cmd(0 << 2);
if (modifier & KB_MOD_CAPSLOCK) {
modifier &= ~KB_MOD_CAPSLOCK;
if (keyboard_cmd(I8042_KBCMD_SET_MODE_IND))
keyboard_cmd(I8042_MODE_CAPS_LOCK_OFF);
} else {
modifier |= MOD_CAPSLOCK;
if (keyboard_cmd(0xed))
keyboard_cmd(1 << 2);
modifier |= KB_MOD_CAPSLOCK;
if (keyboard_cmd(I8042_KBCMD_SET_MODE_IND))
keyboard_cmd(I8042_MODE_CAPS_LOCK_ON);
}
break;
}

return ch;
}

int keyboard_getmodifier(void)
{
return modifier;
}

int keyboard_getchar(void)
{
unsigned char ch;
int shift;
int ret = 0;

while (!keyboard_havechar()) ;

ch = keyboard_get_scancode();

if (!(ch & 0x80) && ch < 0x57) {
shift =
(modifier & MOD_SHIFT) ^ (modifier & MOD_CAPSLOCK) ? 1 : 0;
(modifier & KB_MOD_SHIFT) ^ (modifier & KB_MOD_CAPSLOCK) ? 1 : 0;

if (modifier & MOD_ALT)
if (modifier & KB_MOD_ALT)
shift += 2;

ret = map->map[shift][ch];

if (modifier & MOD_CTRL) {
if (modifier & KB_MOD_CTRL) {
switch (ret) {
case 'a' ... 'z':
ret &= 0x1f;
break;
case KEY_DC:
/* vulcan nerve pinch */
if ((modifier & MOD_ALT) && reset_handler)
if ((modifier & KB_MOD_ALT) && reset_handler)
reset_handler();
default:
ret = 0;
Expand Down Expand Up @@ -298,19 +305,19 @@ void keyboard_init(void)
keyboard_getchar();

/* Enable first PS/2 port */
i8042_cmd(0xae);
i8042_cmd(I8042_CMD_EN_KB);

/* Set scancode set 1 */
ret = keyboard_cmd(0xf0);
ret = keyboard_cmd(I8042_KBCMD_SET_SCANCODE);
if (!ret)
return;

ret = keyboard_cmd(0x01);
ret = keyboard_cmd(I8042_SCANCODE_SET_1);
if (!ret)
return;

/* Enable scanning */
ret = keyboard_cmd(0xf4);
ret = keyboard_cmd(I8042_KBCMD_EN);
if (!ret)
return;

Expand All @@ -324,10 +331,16 @@ void keyboard_disconnect(void)
if (inb(0x64) == 0xFF)
return;

if (!i8042_has_ps2())
return;

/* Empty keyboard buffer */
while (keyboard_havechar())
keyboard_getchar();

/* Disable scanning */
keyboard_cmd(I8042_KBCMD_DEFAULT_DIS);

/* Send keyboard disconnect command */
i8042_cmd(I8042_CMD_DIS_KB);

Expand Down
29 changes: 17 additions & 12 deletions payloads/libpayload/drivers/usb/usbhid.c
Expand Up @@ -87,6 +87,7 @@ usb_hid_destroy (usbdev_t *dev)
static int keycount;
#define KEYBOARD_BUFFER_SIZE 16
static short keybuffer[KEYBOARD_BUFFER_SIZE];
static int modifiers;

const char *countries[36][2] = {
{ "not supported", "us" },
Expand Down Expand Up @@ -244,9 +245,6 @@ static const struct layout_maps keyboard_layouts[] = {
//#endif
};

#define MOD_SHIFT (1 << 0)
#define MOD_ALT (1 << 1)
#define MOD_CTRL (1 << 2)

static void usb_hid_keyboard_queue(int ch) {
/* ignore key presses if buffer full */
Expand All @@ -264,15 +262,17 @@ usb_hid_process_keyboard_event(usbhid_inst_t *const inst,
{
const usb_hid_keyboard_event_t *const previous = &inst->previous;

int i, keypress = 0, modifiers = 0;
int i, keypress = 0;

if (current->modifiers & 0x01) /* Left-Ctrl */ modifiers |= MOD_CTRL;
if (current->modifiers & 0x02) /* Left-Shift */ modifiers |= MOD_SHIFT;
if (current->modifiers & 0x04) /* Left-Alt */ modifiers |= MOD_ALT;
modifiers = 0;

if (current->modifiers & 0x01) /* Left-Ctrl */ modifiers |= KB_MOD_CTRL;
if (current->modifiers & 0x02) /* Left-Shift */ modifiers |= KB_MOD_SHIFT;
if (current->modifiers & 0x04) /* Left-Alt */ modifiers |= KB_MOD_ALT;
if (current->modifiers & 0x08) /* Left-GUI */ ;
if (current->modifiers & 0x10) /* Right-Ctrl */ modifiers |= MOD_CTRL;
if (current->modifiers & 0x20) /* Right-Shift */ modifiers |= MOD_SHIFT;
if (current->modifiers & 0x40) /* Right-AltGr */ modifiers |= MOD_ALT;
if (current->modifiers & 0x10) /* Right-Ctrl */ modifiers |= KB_MOD_CTRL;
if (current->modifiers & 0x20) /* Right-Shift */ modifiers |= KB_MOD_SHIFT;
if (current->modifiers & 0x40) /* Right-AltGr */ modifiers |= KB_MOD_ALT;
if (current->modifiers & 0x80) /* Right-GUI */ ;

if ((current->modifiers & 0x05) && ((current->keys[0] == 0x4c) ||
Expand Down Expand Up @@ -315,10 +315,10 @@ usb_hid_process_keyboard_event(usbhid_inst_t *const inst,
continue;


/* Mask off MOD_CTRL */
/* Mask off KB_MOD_CTRL */
keypress = map->map[modifiers & 0x03][current->keys[i]];

if (modifiers & MOD_CTRL) {
if (modifiers & KB_MOD_CTRL) {
switch (keypress) {
case 'a' ... 'z':
keypress &= 0x1f;
Expand Down Expand Up @@ -509,3 +509,8 @@ int usbhid_getchar (void)

return (int)ret;
}

int usbhid_getmodifiers(void)
{
return modifiers;
}
1 change: 1 addition & 0 deletions payloads/libpayload/include/cbfs_core.h
Expand Up @@ -68,6 +68,7 @@

#define CBFS_TYPE_STAGE 0x10
#define CBFS_TYPE_SELF 0x20
#define CBFS_TYPE_FIT 0x21
#define CBFS_TYPE_OPTIONROM 0x30
#define CBFS_TYPE_BOOTSPLASH 0x40
#define CBFS_TYPE_RAW 0x50
Expand Down
9 changes: 9 additions & 0 deletions payloads/libpayload/include/libpayload.h
Expand Up @@ -141,6 +141,7 @@ int usb_initialize(void);
int usb_exit (void);
int usbhid_havechar(void);
int usbhid_getchar(void);
int usbhid_getmodifiers(void);
/** @} */

/**
Expand All @@ -162,6 +163,14 @@ int keyboard_havechar(void);
unsigned char keyboard_get_scancode(void);
int keyboard_getchar(void);
int keyboard_set_layout(char *country);
int keyboard_getmodifier(void);

enum KEYBOARD_MODIFIERS {
KB_MOD_SHIFT = (1 << 0),
KB_MOD_ALT = (1 << 1),
KB_MOD_CTRL = (1 << 2),
KB_MOD_CAPSLOCK = (1 << 3),
};
/** @} */

/**
Expand Down
26 changes: 20 additions & 6 deletions src/Kconfig
Expand Up @@ -227,9 +227,15 @@ config UBSAN
say N because it adds a small performance penalty and may abort
on code that happens to work in spite of the UB.

config NO_RELOCATABLE_RAMSTAGE
bool
default n if ARCH_X86
default y

config RELOCATABLE_RAMSTAGE
bool
depends on EARLY_CBMEM_INIT
bool "Build the ramstage to be relocatable in 32-bit address space."
default !NO_RELOCATABLE_RAMSTAGE
select RELOCATABLE_MODULES
help
The reloctable ramstage support allows for the ramstage to be built
Expand Down Expand Up @@ -289,6 +295,17 @@ config DEVICETREE
Examples: "devicetree.variant.cb"
"variant/devicetree.cb"

config OVERRIDE_DEVICETREE
string
default ""
help
This symbol allows variants to provide an override devicetree file to
override the registers and/or add new devices on top of the ones
provided by baseboard devicetree using CONFIG_DEVICETREE.

Examples: "devicetree.variant-override.cb"
"variant/devicetree-override.cb"

config CBFS_SIZE
hex "Size of CBFS filesystem in ROM"
# Default value set at the end of the file
Expand Down Expand Up @@ -516,10 +533,6 @@ config IOAPIC
bool
default n

config CACHE_ROM_SIZE_OVERRIDE
hex
default 0x0

config USE_WATCHDOG_ON_BOOT
bool
default n
Expand Down Expand Up @@ -746,7 +759,7 @@ config DEBUG_SMI
bool "Output verbose SMI debug messages"
default n
depends on HAVE_SMI_HANDLER
select SPI_FLASH_SMM if SPI_CONSOLE
select SPI_FLASH_SMM if SPI_CONSOLE || CONSOLE_SPI_FLASH
help
This option enables additional SMI related debug messages.

Expand Down Expand Up @@ -1139,6 +1152,7 @@ config RELOCATABLE_MODULES

config NO_STAGE_CACHE
bool
default y if !HAVE_ACPI_RESUME
help
Do not save any component in stage cache for resume path. On resume,
all components would be read back from CBFS again.
Expand Down
10 changes: 5 additions & 5 deletions src/arch/arm/armv7/bootblock.S
Expand Up @@ -89,11 +89,11 @@ call_bootblock:
/* Set stackpointer in internal RAM to call bootblock main() */
ldr sp, =_estack
ldr r0,=0x00000000
/*
* The current design of cpu_info places the struct at the top of the
* stack. Free enough space to accommodate for that, but make sure it's
* 8-byte aligned for ABI compliance.
*/
/*
* The current design of cpu_info places the struct at the top of the
* stack. Free enough space to accommodate for that, but make sure it's
* 8-byte aligned for ABI compliance.
*/
sub sp, sp, #16
bl main

Expand Down
2 changes: 1 addition & 1 deletion src/arch/arm/armv7/cpu.S
Expand Up @@ -84,7 +84,7 @@
lsl ip, ip, r2 @ shift by that into way position
mov r0, #1
lsl r2, r0, r2 @ r2 now contains the way decr
mov r0, r3 @ get sets/level (no way yet)
mov r0, r3 @ get sets/level (no way yet)
orr r3, r3, ip @ merge way into way/set/level
bfc r0, #0, #4 @ clear low 4 bits (level) to get numset - 1
sub r2, r2, r0 @ subtract from way decr
Expand Down
10 changes: 5 additions & 5 deletions src/arch/arm/armv7/mmu.c
Expand Up @@ -45,8 +45,8 @@
#define ATTR_BLOCK (\
0ULL << 54 | /* XN. 0:Not restricted */ \
0ULL << 53 | /* PXN. 0:Not restricted */ \
1 << 10 | /* AF. 1:Accessed. This is to prevent access \
* fault when accessed for the first time */ \
1 << 10 | /* AF. 1:Accessed. This is to prevent access */ \
/* fault when accessed for the first time */ \
0 << 6 | /* AP[2:1]. 0b00:full access from PL1 */ \
0 << 5 | /* NS. 0:Output address is in Secure space */ \
0 << 1 | /* block/table. 0:block entry */ \
Expand Down Expand Up @@ -219,7 +219,7 @@ void mmu_config_range_kb(u32 start_kb, u32 size_kb, enum dcache_policy policy)
start_kb * KiB, (start_kb + size_kb) * KiB, attrs[policy].name);

u32 end_kb = ALIGN_UP((start_kb + size_kb), PAGE_SIZE/KiB) -
(start_kb & ~mask);
(start_kb & ~mask);

assert(end_kb <= BLOCK_SIZE/KiB);

Expand Down Expand Up @@ -285,7 +285,7 @@ void mmu_init(void)
int i;

printk(BIOS_DEBUG, "LPAE Translation tables are @ %p\n",
ttb_buff);
ttb_buff);
ASSERT((read_mmfr0() & 0xf) >= 5);

/*
Expand All @@ -308,7 +308,7 @@ void mmu_init(void)
*/
for (i = 0; i < 4; i++) {
pgd_buff[i] = ((uint32_t)pmd & NEXTLEVEL_MASK) |
ATTR_NEXTLEVEL;
ATTR_NEXTLEVEL;
pmd += BLOCK_SIZE / PAGE_SIZE;
}

Expand Down
2 changes: 1 addition & 1 deletion src/arch/arm/armv7/thread.c
Expand Up @@ -39,7 +39,7 @@ static inline uintptr_t push_stack(uintptr_t cur_stack, uintptr_t value)
}

void arch_prepare_thread(struct thread *t,
void asmlinkage(*thread_entry)(void *), void *arg)
void asmlinkage(*thread_entry)(void *), void *arg)
{
uintptr_t stack = t->stack_current;
int i;
Expand Down
4 changes: 2 additions & 2 deletions src/arch/arm/include/armv7/arch/cache.h
Expand Up @@ -48,8 +48,8 @@
#define SCTLR_SW (1 << 10) /* SWP and SWPB enable */
#define SCTLR_Z (1 << 11) /* Branch prediction enable */
#define SCTLR_I (1 << 12) /* Instruction cache enable */
#define SCTLR_V (1 << 13) /* Low/high exception vectors */
#define SCTLR_RR (1 << 14) /* Round Robin select */
#define SCTLR_V (1 << 13) /* Low/high exception vectors */
#define SCTLR_RR (1 << 14) /* Round Robin select */
/* Bits 16:15 are reserved */
#define SCTLR_HA (1 << 17) /* Hardware Access flag enable */
/* Bit 18 is reserved */
Expand Down
1 change: 1 addition & 0 deletions src/arch/arm64/Makefile.inc
Expand Up @@ -136,6 +136,7 @@ ramstage-y += memcpy.S
ramstage-y += memmove.S
ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += arm_tf.c
ramstage-y += transition.c transition_asm.S
ramstage-$(CONFIG_PAYLOAD_FIT_SUPPORT) += fit_payload.c

rmodules_arm64-y += memset.S
rmodules_arm64-y += memcpy.S
Expand Down
4 changes: 2 additions & 2 deletions src/arch/arm64/arm_tf.c
Expand Up @@ -51,9 +51,9 @@ void arm_tf_run_bl31(u64 payload_entry, u64 payload_arg0, u64 payload_spsr)
if (prog_locate(&bl31))
die("BL31 not found");

bl31_entry = selfload(&bl31, false);
if (!bl31_entry)
if (!selfload(&bl31, false))
die("BL31 load failed");
bl31_entry = prog_entry(&bl31);

SET_PARAM_HEAD(&bl31_params, PARAM_BL31, VERSION_1, 0);

Expand Down
15 changes: 15 additions & 0 deletions src/arch/arm64/armv8/cpu.S
Expand Up @@ -15,6 +15,7 @@
*/

#include <arch/asm.h>
#include <arch/cache.h>

.macro dcache_apply_all crm
dsb sy
Expand Down Expand Up @@ -83,6 +84,20 @@ ENTRY(dcache_clean_invalidate_all)
dcache_apply_all crm=cisw
ENDPROC(dcache_clean_invalidate_all)

/* This must be implemented in assembly to ensure there are no accesses to
memory (e.g. the stack) in between disabling and flushing the cache. */
ENTRY(mmu_disable)
str x30, [sp, #-0x8]
mrs x0, sctlr_el3
mov x1, #~(SCTLR_C | SCTLR_M)
and x0, x0, x1
msr sctlr_el3, x0
isb
bl dcache_clean_invalidate_all
ldr x30, [sp, #-0x8]
ret
ENDPROC(mmu_disable)

/*
* Bring an ARMv8 processor we just gained control of (e.g. from IROM) into a
* known state regarding caches/SCTLR/PSTATE. Completely invalidates
Expand Down
14 changes: 0 additions & 14 deletions src/arch/arm64/armv8/mmu.c
Expand Up @@ -321,17 +321,3 @@ void mmu_enable(void)
raw_write_sctlr_el3(sctlr);
isb();
}

/*
* CAUTION: This implementation assumes that coreboot never uses non-identity
* page tables for pages containing executed code. If you ever want to violate
* this assumption, have fun figuring out the associated problems on your own.
*/
void mmu_disable(void)
{
dcache_clean_invalidate_all();
uint32_t sctlr = raw_read_sctlr_el3();
sctlr &= ~(SCTLR_C | SCTLR_M);
raw_write_sctlr_el3(sctlr);
isb();
}
262 changes: 262 additions & 0 deletions src/arch/arm64/fit_payload.c
@@ -0,0 +1,262 @@
/*
* Copyright 2013 Google Inc.
* Copyright 2018 Facebook, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/

#include <console/console.h>
#include <bootmem.h>
#include <stdlib.h>
#include <program_loading.h>
#include <string.h>
#include <commonlib/compression.h>
#include <commonlib/cbfs_serialized.h>
#include <lib.h>
#include <fit.h>
#include <endian.h>

#define MAX_KERNEL_SIZE (64*MiB)

struct arm64_kernel_header {
u32 code0;
u32 code1;
u64 text_offset;
u64 image_size;
u64 flags;
u64 res2;
u64 res3;
u64 res4;
u32 magic;
#define KERNEL_HEADER_MAGIC 0x644d5241
u32 res5;
};

static struct {
union {
struct arm64_kernel_header header;
u8 raw[sizeof(struct arm64_kernel_header) + 0x100];
};
#define SCRATCH_CANARY_VALUE 0xdeadbeef
u32 canary;
} scratch;

/* Returns true if decompressing was successful and it looks like a kernel. */
static bool decompress_kernel_header(const struct fit_image_node *node)
{
/* Partially decompress to get text_offset. Can't check for errors. */
scratch.canary = SCRATCH_CANARY_VALUE;
switch (node->compression) {
case CBFS_COMPRESS_NONE:
memcpy(scratch.raw, node->data, sizeof(scratch.raw));
break;
case CBFS_COMPRESS_LZMA:
ulzman(node->data, node->size,
scratch.raw, sizeof(scratch.raw));
break;
case CBFS_COMPRESS_LZ4:
ulz4fn(node->data, node->size,
scratch.raw, sizeof(scratch.raw));
break;
default:
printk(BIOS_ERR, "ERROR: Unsupported compression algorithm!\n");
return false;
}

/* Should never happen, but if it does we'll want to know. */
if (scratch.canary != SCRATCH_CANARY_VALUE)
die("ERROR: Partial decompression ran over scratchbuf!\n");

if (scratch.header.magic != KERNEL_HEADER_MAGIC) {
printk(BIOS_ERR,
"ERROR: Invalid kernel magic: %#.8x\n != %#.8x\n",
scratch.header.magic, KERNEL_HEADER_MAGIC);
return false;
}

/**
* Prior to v3.17, the endianness of text_offset was not specified. In
* these cases image_size is zero and text_offset is 0x80000 in the
* endianness of the kernel. Where image_size is non-zero image_size is
* little-endian and must be respected. Where image_size is zero,
* text_offset can be assumed to be 0x80000.
*/
if (!scratch.header.image_size)
scratch.header.text_offset = cpu_to_le64(0x80000);

return true;
}

static size_t get_kernel_size(const struct fit_image_node *node)
{
if (scratch.header.image_size)
return le64_to_cpu(scratch.header.image_size);

/**
* When image_size is zero, a bootloader should attempt to keep as much
* memory as possible free for use by the kernel immediately after the
* end of the kernel image. The amount of space required will vary
* depending on selected features, and is effectively unbound.
*/

printk(BIOS_WARNING, "FIT: image_size not set in kernel header.\n"
"Leaving additional %u MiB of free space after kernel.\n",
MAX_KERNEL_SIZE >> 20);

return node->size + MAX_KERNEL_SIZE;
}

static bool fit_place_kernel(const struct range_entry *r, void *arg)
{
struct region *region = arg;
resource_t start;

if (range_entry_tag(r) != BM_MEM_RAM)
return true;

/**
* The Image must be placed text_offset bytes from a 2MB aligned base
* address anywhere in usable system RAM and called there. The region
* between the 2 MB aligned base address and the start of the image has
* no special significance to the kernel, and may be used for other
* purposes.
*
* If the reserved memory (BL31 for example) is smaller than text_offset
* we can use the 2 MiB base address, otherwise use the next 2 MiB page.
* It's not mandatory, but wastes less memory below the kernel.
*/
start = ALIGN_DOWN(range_entry_base(r), 2 * MiB) +
le64_to_cpu(scratch.header.text_offset);

if (start < range_entry_base(r))
start += 2 * MiB;
/**
* At least image_size bytes from the start of the image must be free
* for use by the kernel.
*/
if (start + region->size < range_entry_end(r)) {
region->offset = (size_t)start;
return false;
}

return true;
}

/**
* Place the region in free memory range.
*
* The caller has to set region->offset to the minimum allowed address.
* The region->offset is usually 0 on kernel >v4.6 and kernel_base + kernel_size
* on kernel <v4.6.
*/
static bool fit_place_mem(const struct range_entry *r, void *arg)
{
struct region *region = arg;
resource_t start;

if (range_entry_tag(r) != BM_MEM_RAM)
return true;

/* Linux 4.15 doesn't like 4KiB alignment. Align to 1 MiB for now. */
start = ALIGN_UP(MAX(region->offset, range_entry_base(r)), 1 * MiB);

if (start + region->size < range_entry_end(r)) {
region->offset = (size_t)start;
return false;
}

return true;
}

bool fit_payload_arch(struct prog *payload, struct fit_config_node *config,
struct region *kernel,
struct region *fdt,
struct region *initrd)
{
bool place_anywhere;
void *arg = NULL;

if (!config->fdt || !fdt) {
printk(BIOS_CRIT, "CRIT: Providing a valid FDT is mandatory to "
"boot an ARM64 kernel!\n");
return false;
}

if (!decompress_kernel_header(config->kernel_node)) {
printk(BIOS_CRIT, "CRIT: Payload doesn't look like an ARM64"
" kernel Image.\n");
return false;
}

/* Update kernel size from image header, if possible */
kernel->size = get_kernel_size(config->kernel_node);
printk(BIOS_DEBUG, "FIT: Using kernel size of 0x%zx bytes\n",
kernel->size);

/**
* The code assumes that bootmem_walk provides a sorted list of memory
* regions, starting from the lowest address.
* The order of the calls here doesn't matter, as the placement is
* enforced in the called functions.
* For details check code on top.
*/

if (!bootmem_walk(fit_place_kernel, kernel))
return false;

/* Mark as reserved for future allocations. */
bootmem_add_range(kernel->offset, kernel->size, BM_MEM_PAYLOAD);

/**
* NOTE: versions prior to v4.6 cannot make use of memory below the
* physical offset of the Image so it is recommended that the Image be
* placed as close as possible to the start of system RAM.
*
* For kernel <v4.6 the INITRD and FDT can't be placed below the kernel.
* In that case set region offset to an address on top of kernel.
*/
place_anywhere = !!(le64_to_cpu(scratch.header.flags) & (1 << 3));
printk(BIOS_DEBUG, "FIT: Placing FDT and INITRD %s\n",
place_anywhere ? "anywhere" : "on top of kernel");

/* Place INITRD */
if (config->ramdisk) {
if (place_anywhere)
initrd->offset = 0;
else
initrd->offset = kernel->offset + kernel->size;

if (!bootmem_walk(fit_place_mem, initrd))
return false;
/* Mark as reserved for future allocations. */
bootmem_add_range(initrd->offset, initrd->size, BM_MEM_PAYLOAD);
}

/* Place FDT */
if (place_anywhere)
fdt->offset = 0;
else
fdt->offset = kernel->offset + kernel->size;

if (!bootmem_walk(fit_place_mem, fdt))
return false;
/* Mark as reserved for future allocations. */
bootmem_add_range(fdt->offset, fdt->size, BM_MEM_PAYLOAD);

/* Kernel expects FDT as argument */
arg = (void *)fdt->offset;

prog_set_entry(payload, (void *)kernel->offset, arg);

bootmem_dump_ranges();

return true;
}
4 changes: 2 additions & 2 deletions src/arch/arm64/include/arch/transition.h
Expand Up @@ -56,7 +56,7 @@
#define EXC_VID_LOW32_SERR 15
#define NUM_EXC_VIDS 16

#ifndef __ASSEMBLY__
#ifndef __ASSEMBLER__

#include <stdint.h>
#include <arch/lib_helpers.h>
Expand Down Expand Up @@ -197,6 +197,6 @@ void exc_dispatch(struct exc_state *exc_state, uint64_t id);
*/
void exc_entry(struct exc_state *exc_state, uint64_t id);

#endif /* __ASSEMBLY__ */
#endif /* __ASSEMBLER__ */

#endif /* __ARCH_ARM64_TRANSITION_H__ */
4 changes: 2 additions & 2 deletions src/arch/arm64/include/armv8/arch/barrier.h
Expand Up @@ -15,7 +15,7 @@
#ifndef __ASM_ARM_BARRIER_H
#define __ASM_ARM_BARRIER_H

#ifndef __ASSEMBLY__
#ifndef __ASSEMBLER__

#define sevl() asm volatile("sevl" : : : "memory")
#define sev() asm volatile("sev" : : : "memory")
Expand Down Expand Up @@ -103,6 +103,6 @@ do { \
!ret; \
})

#endif /* __ASSEMBLY__ */
#endif /* __ASSEMBLER__ */

#endif /* __ASM_ARM_BARRIER_H */
15 changes: 9 additions & 6 deletions src/arch/arm64/include/armv8/arch/cache.h
Expand Up @@ -32,10 +32,6 @@
#ifndef ARM_ARM64_CACHE_H
#define ARM_ARM64_CACHE_H

#include <stddef.h>
#include <stdint.h>
#include <arch/barrier.h>

/* SCTLR_ELx common bits */
#define SCTLR_M (1 << 0) /* MMU enable */
#define SCTLR_A (1 << 1) /* Alignment check enable */
Expand All @@ -52,11 +48,16 @@
#define SCTLR_EL1_UMA (1 << 9) /* User mask access */
#define SCTLR_EL1_DZE (1 << 14) /* DC ZVA instruction at EL0 */
#define SCTLR_EL1_UCT (1 << 15) /* CTR_EL0 register EL0 access */
#define SCTLR_EL1_NTWI (1 << 16) /* Not trap WFI */
#define SCTLR_EL1_NTWE (1 << 18) /* Not trap WFE */
#define SCTLR_EL1_NTWI (1 << 16) /* Not trap WFI */
#define SCTLR_EL1_NTWE (1 << 18) /* Not trap WFE */
#define SCTLR_EL1_E0E (1 << 24) /* Exception endianness at EL0 */
#define SCTLR_EL1_UCI (1 << 26) /* EL0 access to cache instructions */

#ifndef __ASSEMBLER__

#include <stddef.h>
#include <stdint.h>
#include <arch/barrier.h>

/* dcache clean by virtual address to PoC */
void dcache_clean_by_mva(void const *addr, size_t len);
Expand Down Expand Up @@ -92,4 +93,6 @@ static inline void icache_invalidate_all(void)
: : : "memory");
}

#endif /* __ASSEMBLER__ */

#endif /* ARM_ARM64_CACHE_H */
4 changes: 2 additions & 2 deletions src/arch/arm64/include/armv8/arch/lib_helpers.h
Expand Up @@ -136,7 +136,7 @@
#define CPACR_TRAP_FP_EL0 (1 << CPACR_FPEN_SHIFT)
#define CPACR_TRAP_FP_DISABLE (3 << CPACR_FPEN_SHIFT)

#ifdef __ASSEMBLY__
#ifdef __ASSEMBLER__

/* Macro to switch to label based on current el */
.macro switch_el xreg label1 label2 label3
Expand Down Expand Up @@ -585,6 +585,6 @@ void tlbiallis_current(void);
void tlbiallis(uint32_t el);
void tlbivaa_el1(uint64_t va);

#endif // __ASSEMBLY__
#endif /* __ASSEMBLER__ */

#endif /* __ARCH_LIB_HELPERS_H__ */
135 changes: 0 additions & 135 deletions src/arch/arm64/stage_entry.S

This file was deleted.

1 change: 0 additions & 1 deletion src/arch/arm64/transition_asm.S
Expand Up @@ -53,7 +53,6 @@
* to be executed.
*/

#define __ASSEMBLY__
#include <arch/asm.h>
#include <arch/lib_helpers.h>
#include <arch/transition.h>
Expand Down
6 changes: 1 addition & 5 deletions src/arch/x86/Kconfig
Expand Up @@ -17,6 +17,7 @@ config ARCH_X86
bool
default n
select PCI
select RELOCATABLE_MODULES

# stage selectors for x86

Expand Down Expand Up @@ -107,10 +108,6 @@ config NUM_IPI_STARTS
int
default 2

config ROMCC
bool
default n

config CBMEM_TOP_BACKUP
def_bool n
help
Expand Down Expand Up @@ -224,7 +221,6 @@ config VERSTAGE_ADDR
config POSTCAR_STAGE
def_bool n
select NO_CAR_GLOBAL_MIGRATION
select RELOCATABLE_MODULES

config VERSTAGE_DEBUG_SPINLOOP
bool
Expand Down
43 changes: 2 additions & 41 deletions src/arch/x86/Makefile.inc
Expand Up @@ -180,10 +180,10 @@ verstage-y += memset.c
verstage-y += memcpy.c
verstage-y += memmove.c
verstage-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
# If C environment is used for bootblock it means there's no need
# If verstage is a separate stage it means there's no need
# for a chipset-specific car_stage_entry() so use the generic one
# which just calls verstage().
verstage-$(CONFIG_C_ENVIRONMENT_BOOTBLOCK) += verstage.c
verstage-$(CONFIG_VBOOT_SEPARATE_VERSTAGE) += verstage.c

verstage-$(CONFIG_COLLECT_TIMESTAMPS_TSC) += timestamp.c

Expand Down Expand Up @@ -223,46 +223,7 @@ romstage-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
romstage-y += postcar_loader.c
romstage-$(CONFIG_COLLECT_TIMESTAMPS_TSC) += timestamp.c

ifneq ($(CONFIG_ROMCC),y)

romstage-srcs += $(src)/mainboard/$(MAINBOARDDIR)/romstage.c

else # CONFIG_ROMCC == y

# This order matters. The mainboards requiring ROMCC need their mainboard
# code to follow the prior crt0s files for program flow control. The
# romstage.inc from the MAINBOARDDIR is implicitly main() for romstage
# because of the instruction sequen fall-through.
crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
crt0s += $(src)/arch/x86/crt0_romcc_epilogue.inc

ifeq ($(CONFIG_MMX),y)
ifeq ($(CONFIG_SSE),y)
ROMCCFLAGS := -mcpu=p4 -O2 # MMX, SSE
else
ROMCCFLAGS := -mcpu=p2 -O2 # MMX, !SSE
endif
else
ROMCCFLAGS := -mcpu=i386 -O2 # !MMX, !SSE
endif

$(objcbfs)/romstage%.bin: $(objcbfs)/romstage%.elf
@printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
$(OBJCOPY_romstage) -O binary $< $@

$(objcbfs)/romstage%.elf: $(objcbfs)/romstage%.debug
@printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
cp $< $@.tmp
$(OBJCOPY_romstage) --strip-debug $@.tmp
$(OBJCOPY_romstage) --add-gnu-debuglink=$< $@.tmp
mv $@.tmp $@

$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
printf " ROMCC romstage.inc\n"
$(ROMCC) -c -S $(ROMCCFLAGS) -D__ROMSTAGE__ -D__PRE_RAM__ -I. $(CPPFLAGS_romstage) $< -o $@

endif

romstage-libs ?=

$(eval $(call early_x86_assembly_entry_rule,romstage))
Expand Down
40 changes: 30 additions & 10 deletions src/arch/x86/acpi.c
Expand Up @@ -449,7 +449,7 @@ void acpi_create_dmar(acpi_dmar_t *dmar, enum dmar_flags flags,
}

unsigned long acpi_create_dmar_drhd(unsigned long current, u8 flags,
u16 segment, u32 bar)
u16 segment, u64 bar)
{
dmar_entry_t *drhd = (dmar_entry_t *)current;
memset(drhd, 0, sizeof(*drhd));
Expand All @@ -462,6 +462,20 @@ unsigned long acpi_create_dmar_drhd(unsigned long current, u8 flags,
return drhd->length;
}

unsigned long acpi_create_dmar_rmrr(unsigned long current, u16 segment,
u64 bar, u64 limit)
{
dmar_rmrr_entry_t *rmrr = (dmar_rmrr_entry_t *)current;
memset(rmrr, 0, sizeof(*rmrr));
rmrr->type = DMAR_RMRR;
rmrr->length = sizeof(*rmrr); /* will be fixed up later */
rmrr->segment = segment;
rmrr->bar = bar;
rmrr->limit = limit;

return rmrr->length;
}

unsigned long acpi_create_dmar_atsr(unsigned long current, u8 flags,
u16 segment)
{
Expand All @@ -481,13 +495,19 @@ void acpi_dmar_drhd_fixup(unsigned long base, unsigned long current)
drhd->length = current - base;
}

void acpi_dmar_rmrr_fixup(unsigned long base, unsigned long current)
{
dmar_rmrr_entry_t *rmrr = (dmar_rmrr_entry_t *)base;
rmrr->length = current - base;
}

void acpi_dmar_atsr_fixup(unsigned long base, unsigned long current)
{
dmar_atsr_entry_t *atsr = (dmar_atsr_entry_t *)base;
atsr->length = current - base;
}

static unsigned long acpi_create_dmar_drhd_ds(unsigned long current,
static unsigned long acpi_create_dmar_ds(unsigned long current,
enum dev_scope_type type, u8 enumeration_id, u8 bus, u8 dev, u8 fn)
{
/* we don't support longer paths yet */
Expand All @@ -505,31 +525,31 @@ static unsigned long acpi_create_dmar_drhd_ds(unsigned long current,
return ds->length;
}

unsigned long acpi_create_dmar_drhd_ds_pci_br(unsigned long current, u8 bus,
unsigned long acpi_create_dmar_ds_pci_br(unsigned long current, u8 bus,
u8 dev, u8 fn)
{
return acpi_create_dmar_drhd_ds(current,
return acpi_create_dmar_ds(current,
SCOPE_PCI_SUB, 0, bus, dev, fn);
}

unsigned long acpi_create_dmar_drhd_ds_pci(unsigned long current, u8 bus,
unsigned long acpi_create_dmar_ds_pci(unsigned long current, u8 bus,
u8 dev, u8 fn)
{
return acpi_create_dmar_drhd_ds(current,
return acpi_create_dmar_ds(current,
SCOPE_PCI_ENDPOINT, 0, bus, dev, fn);
}

unsigned long acpi_create_dmar_drhd_ds_ioapic(unsigned long current,
unsigned long acpi_create_dmar_ds_ioapic(unsigned long current,
u8 enumeration_id, u8 bus, u8 dev, u8 fn)
{
return acpi_create_dmar_drhd_ds(current,
return acpi_create_dmar_ds(current,
SCOPE_IOAPIC, enumeration_id, bus, dev, fn);
}

unsigned long acpi_create_dmar_drhd_ds_msi_hpet(unsigned long current,
unsigned long acpi_create_dmar_ds_msi_hpet(unsigned long current,
u8 enumeration_id, u8 bus, u8 dev, u8 fn)
{
return acpi_create_dmar_drhd_ds(current,
return acpi_create_dmar_ds(current,
SCOPE_MSI_HPET, enumeration_id, bus, dev, fn);
}

Expand Down
14 changes: 13 additions & 1 deletion src/arch/x86/boot.c
Expand Up @@ -11,6 +11,7 @@
* GNU General Public License for more details.
*/

#include <commonlib/helpers.h>
#include <console/console.h>
#include <arch/stages.h>
#include <program_loading.h>
Expand Down Expand Up @@ -202,7 +203,18 @@ static void jmp_payload(void *entry, unsigned long buffer, unsigned long size)

int arch_supports_bounce_buffer(void)
{
return 1;
return !IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE);
}

int payload_arch_usable_ram_quirk(uint64_t start, uint64_t size)
{
if (start < 1 * MiB && (start + size) <= 1 * MiB) {
printk(BIOS_DEBUG,
"Payload being loaded at below 1MiB without region being marked as RAM usable.\n");
return 1;
}

return 0;
}

static void try_payload(struct prog *prog)
Expand Down
1 change: 0 additions & 1 deletion src/arch/x86/cbmem.c
Expand Up @@ -12,7 +12,6 @@
*/

#include <stdlib.h>
#include <console/console.h>
#include <cbmem.h>
#include <compiler.h>
#include <arch/acpi.h>
Expand Down
8 changes: 0 additions & 8 deletions src/arch/x86/cpu_common.c
Expand Up @@ -11,15 +11,7 @@
* GNU General Public License for more details.
*/

#include <console/console.h>
#include <cpu/cpu.h>
#include <arch/io.h>
#include <string.h>
#include <cpu/x86/lapic.h>
#include <arch/cpu.h>
#include <device/path.h>
#include <device/device.h>
#include <smp/spinlock.h>

#ifndef __x86_64__
/* Standard macro to see if a specific flag is changeable */
Expand Down
26 changes: 0 additions & 26 deletions src/arch/x86/crt0_romcc_epilogue.inc

This file was deleted.

26 changes: 19 additions & 7 deletions src/arch/x86/include/arch/acpi.h
Expand Up @@ -331,6 +331,15 @@ typedef struct dmar_entry {
u64 bar;
} __packed dmar_entry_t;

typedef struct dmar_rmrr_entry {
u16 type;
u16 length;
u16 reserved;
u16 segment;
u64 bar;
u64 limit;
} __packed dmar_rmrr_entry_t;

typedef struct dmar_atsr_entry {
u16 type;
u16 length;
Expand Down Expand Up @@ -423,7 +432,7 @@ typedef struct acpi_dbg2_header {
struct acpi_table_header header;
uint32_t devices_offset;
uint32_t devices_count;
} __attribute__ ((packed)) acpi_dbg2_header_t;
} __attribute__((packed)) acpi_dbg2_header_t;

/* DBG2: Microsoft Debug Port Table 2 device entry */
typedef struct acpi_dbg2_device {
Expand All @@ -439,7 +448,7 @@ typedef struct acpi_dbg2_device {
uint8_t reserved[2];
uint16_t base_address_offset;
uint16_t address_size_offset;
} __attribute__ ((packed)) acpi_dbg2_device_t;
} __attribute__((packed)) acpi_dbg2_device_t;

/* FADT (Fixed ACPI Description Table) */
typedef struct acpi_fadt {
Expand Down Expand Up @@ -738,19 +747,22 @@ unsigned long acpi_write_dbg2_pci_uart(acpi_rsdp_t *rsdp, unsigned long current,
void acpi_create_dmar(acpi_dmar_t *dmar, enum dmar_flags flags,
unsigned long (*acpi_fill_dmar)(unsigned long));
unsigned long acpi_create_dmar_drhd(unsigned long current, u8 flags,
u16 segment, u32 bar);
u16 segment, u64 bar);
unsigned long acpi_create_dmar_rmrr(unsigned long current, u16 segment,
u64 bar, u64 limit);
unsigned long acpi_create_dmar_atsr(unsigned long current, u8 flags,
u16 segment);
void acpi_dmar_drhd_fixup(unsigned long base, unsigned long current);
void acpi_dmar_rmrr_fixup(unsigned long base, unsigned long current);
void acpi_dmar_atsr_fixup(unsigned long base, unsigned long current);
unsigned long acpi_create_dmar_drhd_ds_pci_br(unsigned long current,
unsigned long acpi_create_dmar_ds_pci_br(unsigned long current,
u8 bus, u8 dev, u8 fn);
unsigned long acpi_create_dmar_drhd_ds_pci(unsigned long current,
unsigned long acpi_create_dmar_ds_pci(unsigned long current,
u8 bus, u8 dev, u8 fn);
unsigned long acpi_create_dmar_drhd_ds_ioapic(unsigned long current,
unsigned long acpi_create_dmar_ds_ioapic(unsigned long current,
u8 enumeration_id,
u8 bus, u8 dev, u8 fn);
unsigned long acpi_create_dmar_drhd_ds_msi_hpet(unsigned long current,
unsigned long acpi_create_dmar_ds_msi_hpet(unsigned long current,
u8 enumeration_id,
u8 bus, u8 dev, u8 fn);
void acpi_write_hest(acpi_hest_t *hest,
Expand Down
5 changes: 5 additions & 0 deletions src/arch/x86/include/arch/cpu.h
Expand Up @@ -282,6 +282,11 @@ void postcar_frame_init_lowmem(struct postcar_frame *pcf);
void postcar_frame_add_mtrr(struct postcar_frame *pcf,
uintptr_t addr, size_t size, int type);

/*
* Add variable MTRR covering the memory-mapped ROM with given MTRR type.
*/
void postcar_frame_add_romcache(struct postcar_frame *pcf, int type);

/*
* Push used MTRR and Max MTRRs on to the stack
* and return pointer to stack top.
Expand Down
34 changes: 34 additions & 0 deletions src/arch/x86/include/smm.h
@@ -0,0 +1,34 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2018 Google LLC
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/

#include <stddef.h>
#include <stdint.h>
#include <cpu/x86/smm.h>

/*
* calls into SMM with the given cmd and subcmd in eax, and arg in ebx
*
* static inline because the resulting assembly is often smaller than
* the call sequence due to constant folding.
*/
static inline u32 call_smm(u8 cmd, u8 subcmd, void *arg)
{
u32 res = 0;
__asm__ __volatile__ (
"outb %b0, %3"
: "=a" (res)
: "a" ((subcmd << 8) | cmd), "b" (arg), "i" (APM_CNT));
return res;
}
3 changes: 2 additions & 1 deletion src/arch/x86/memlayout.ld
Expand Up @@ -26,7 +26,8 @@ SECTIONS
* conditionalize with macros.
*/
#if ENV_RAMSTAGE
RAMSTAGE(CONFIG_RAMBASE, CONFIG_RAMTOP - CONFIG_RAMBASE)
RAMSTAGE(CONFIG_RAMBASE, (CONFIG_RELOCATABLE_RAMSTAGE ? 8M :
CONFIG_RAMTOP - CONFIG_RAMBASE))

#elif ENV_ROMSTAGE
/* The 1M size is not allocated. It's just for basic size checking.
Expand Down
2 changes: 0 additions & 2 deletions src/arch/x86/pci_ops_conf1.c
Expand Up @@ -11,10 +11,8 @@
* GNU General Public License for more details.
*/

#include <console/console.h>
#include <arch/io.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
/*
* Functions for accessing PCI configuration space with type 1 accesses
Expand Down
7 changes: 7 additions & 0 deletions src/arch/x86/postcar_loader.c
Expand Up @@ -113,6 +113,13 @@ void postcar_frame_add_mtrr(struct postcar_frame *pcf,
}
}

void postcar_frame_add_romcache(struct postcar_frame *pcf, int type)
{
if (!IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED))
return;
postcar_frame_add_mtrr(pcf, CACHE_ROM_BASE, CACHE_ROM_SIZE, type);
}

void *postcar_commit_mtrrs(struct postcar_frame *pcf)
{
/*
Expand Down
83 changes: 0 additions & 83 deletions src/arch/x86/romcc_console.c

This file was deleted.

7 changes: 4 additions & 3 deletions src/arch/x86/smbios.c
Expand Up @@ -677,10 +677,11 @@ static int smbios_walk_device_tree(struct device *tree, int *handle,
int len = 0;

for (dev = tree; dev; dev = dev->next) {
printk(BIOS_INFO, "%s (%s)\n", dev_path(dev), dev_name(dev));

if (dev->ops && dev->ops->get_smbios_data)
if (dev->enabled && dev->ops && dev->ops->get_smbios_data) {
printk(BIOS_INFO, "%s (%s)\n", dev_path(dev),
dev_name(dev));
len += dev->ops->get_smbios_data(dev, handle, current);
}
}
return len;
}
Expand Down
1 change: 1 addition & 0 deletions src/commonlib/include/commonlib/cbfs_serialized.h
Expand Up @@ -68,6 +68,7 @@
#define CBFS_TYPE_DELETED2 0xffffffff
#define CBFS_TYPE_STAGE 0x10
#define CBFS_TYPE_SELF 0x20
#define CBFS_TYPE_FIT 0x21
#define CBFS_TYPE_OPTIONROM 0x30
#define CBFS_TYPE_BOOTSPLASH 0x40
#define CBFS_TYPE_RAW 0x50
Expand Down
1 change: 0 additions & 1 deletion src/commonlib/storage/bouncebuf.c
Expand Up @@ -16,7 +16,6 @@
*/

#include <arch/cache.h>
#include <console/console.h>
#include "bouncebuf.h"
#include <halt.h>
#include "storage.h"
Expand Down
1 change: 0 additions & 1 deletion src/commonlib/storage/mmc.c
Expand Up @@ -20,7 +20,6 @@
*/

#include <commonlib/storage.h>
#include <console/console.h>
#include <delay.h>
#include "sd_mmc.h"
#include "mmc.h"
Expand Down
1 change: 0 additions & 1 deletion src/commonlib/storage/pci_sdhci.c
Expand Up @@ -20,7 +20,6 @@

#include <assert.h>
#include <commonlib/sdhci.h>
#include <console/console.h>
#include <device/pci.h>
#include "sd_mmc.h"
#include "storage.h"
Expand Down
2 changes: 1 addition & 1 deletion src/commonlib/storage/sd_mmc.c
Expand Up @@ -81,7 +81,7 @@ static uint32_t sd_mmc_calculate_transfer_speed(uint32_t csd0)
return freq * mult;
}

static int sd_mmc_go_idle(struct storage_media *media)
int sd_mmc_go_idle(struct storage_media *media)
{
struct sd_mmc_ctrlr *ctrlr = media->ctrlr;

Expand Down
2 changes: 2 additions & 0 deletions src/commonlib/storage/sd_mmc.h
Expand Up @@ -18,6 +18,7 @@
#include <commonlib/sd_mmc_ctrlr.h>
#include <commonlib/storage.h>
#include <stddef.h>
#include <console/console.h>

#define SD_MMC_IO_RETRIES 1000

Expand Down Expand Up @@ -45,6 +46,7 @@
int sd_mmc_enter_standby(struct storage_media *media);
uint64_t sd_mmc_extract_uint32_bits(const uint32_t *array, int start,
int count);
int sd_mmc_go_idle(struct storage_media *media);
int sd_mmc_send_status(struct storage_media *media, ssize_t tries);
int sd_mmc_set_blocklen(struct sd_mmc_ctrlr *ctrlr, int len);

Expand Down
1 change: 0 additions & 1 deletion src/commonlib/storage/sdhci.c
Expand Up @@ -19,7 +19,6 @@

#include <assert.h>
#include "bouncebuf.h"
#include <console/console.h>
#include <commonlib/sd_mmc_ctrlr.h>
#include <commonlib/sdhci.h>
#include <commonlib/storage.h>
Expand Down
1 change: 0 additions & 1 deletion src/commonlib/storage/sdhci_display.c
Expand Up @@ -20,7 +20,6 @@
#include <commonlib/sd_mmc_ctrlr.h>
#include <commonlib/sdhci.h>
#include <commonlib/storage.h>
#include <console/console.h>
#include "sdhci.h"
#include "sd_mmc.h"
#include "storage.h"
Expand Down
1 change: 0 additions & 1 deletion src/commonlib/storage/storage_erase.c
Expand Up @@ -19,7 +19,6 @@
* GNU General Public License for more details.
*/

#include <console/console.h>
#include "sd_mmc.h"
#include "storage.h"

Expand Down
1 change: 0 additions & 1 deletion src/commonlib/storage/storage_write.c
Expand Up @@ -19,7 +19,6 @@
* GNU General Public License for more details.
*/

#include <console/console.h>
#include "sd_mmc.h"
#include "storage.h"
#include <string.h>
Expand Down
60 changes: 0 additions & 60 deletions src/console/early_print.c

This file was deleted.

22 changes: 8 additions & 14 deletions src/console/hw-debug_sink.adb
Expand Up @@ -19,14 +19,19 @@ use type Interfaces.C.int;

package body HW.Debug_Sink is

Sink_Enabled : Boolean;
function console_log_level
(msg_level : Interfaces.C.int)
return Interfaces.C.int;
pragma Import (C, console_log_level, "console_log_level");

Msg_Level_BIOS_DEBUG : constant := 7;

procedure console_tx_byte (chr : Interfaces.C.char);
pragma Import (C, console_tx_byte, "console_tx_byte");

procedure Put (Item : String) is
begin
if Sink_Enabled then
if console_log_level (Msg_Level_BIOS_DEBUG) /= 0 then
for Idx in Item'Range loop
console_tx_byte (Interfaces.C.To_C (Item (Idx)));
end loop;
Expand All @@ -35,7 +40,7 @@ package body HW.Debug_Sink is

procedure Put_Char (Item : Character) is
begin
if Sink_Enabled then
if console_log_level (Msg_Level_BIOS_DEBUG) /= 0 then
console_tx_byte (Interfaces.C.To_C (Item));
end if;
end Put_Char;
Expand All @@ -45,15 +50,4 @@ package body HW.Debug_Sink is
Put_Char (Character'Val (16#0a#));
end New_Line;

----------------------------------------------------------------------------

function console_log_level
(msg_level : Interfaces.C.int)
return Interfaces.C.int;
pragma Import (C, console_log_level, "console_log_level");

Msg_Level_BIOS_DEBUG : constant := 7;

begin
Sink_Enabled := console_log_level (Msg_Level_BIOS_DEBUG) /= 0;
end HW.Debug_Sink;
6 changes: 4 additions & 2 deletions src/console/init.c
Expand Up @@ -35,7 +35,8 @@ static int console_loglevel = CONFIG_DEFAULT_CONSOLE_LOGLEVEL;

static inline int get_log_level(void)
{
if (car_get_var(console_inited) == 0)
if (!IS_ENABLED(CONFIG_LATE_CBMEM_INIT) &&
car_get_var(console_inited) == 0)
return -1;
if (CONSOLE_LEVEL_CONST)
return get_console_loglevel();
Expand Down Expand Up @@ -78,7 +79,8 @@ asmlinkage void console_init(void)

console_hw_init();

car_set_var(console_inited, 1);
if (!IS_ENABLED(CONFIG_LATE_CBMEM_INIT))
car_set_var(console_inited, 1);

printk(BIOS_NOTICE, "\n\ncoreboot-%s%s %s " ENV_STRING " starting...\n",
coreboot_version, coreboot_extra_version, coreboot_build);
Expand Down
2 changes: 1 addition & 1 deletion src/console/printk.c
Expand Up @@ -78,7 +78,7 @@ int do_printk(int msg_level, const char *fmt, ...)
return i;
}

#if IS_ENABLED (CONFIG_VBOOT)
#if IS_ENABLED(CONFIG_VBOOT)
void do_printk_va_list(int msg_level, const char *fmt, va_list args)
{
if (!console_log_level(msg_level))
Expand Down
3 changes: 1 addition & 2 deletions src/console/vsprintf.c
Expand Up @@ -18,8 +18,7 @@
#include <string.h>
#include <trace.h>

struct vsnprintf_context
{
struct vsnprintf_context {
char *str_buf;
size_t buf_limit;
};
Expand Down
51 changes: 29 additions & 22 deletions src/console/vtxprintf.c
Expand Up @@ -15,7 +15,6 @@
* vtxprintf.c, originally from linux/lib/vsprintf.c
*/

#include <console/console.h>
#include <console/vtxprintf.h>
#include <string.h>

Expand All @@ -32,7 +31,7 @@

static int skip_atoi(const char **s)
{
int i=0;
int i = 0;

while (is_digit(**s))
i = i*10 + *((*s)++) - '0';
Expand All @@ -51,8 +50,8 @@ static int number(void (*tx_byte)(unsigned char byte, void *data),
unsigned long long inum, int base, int size, int precision, int type,
void *data)
{
char c,sign,tmp[66];
const char *digits="0123456789abcdefghijklmnopqrstuvwxyz";
char c, sign, tmp[66];
const char *digits = "0123456789abcdefghijklmnopqrstuvwxyz";
int i;
int count = 0;
#ifdef SUPPORT_64BIT_INTS
Expand Down Expand Up @@ -96,20 +95,25 @@ static int number(void (*tx_byte)(unsigned char byte, void *data),
size--;
}
i = 0;
if (num == 0)
tmp[i++]='0';
else while (num != 0){
tmp[i++] = digits[num % base];
num /= base;
if (num == 0) {
tmp[i++] = '0';
} else {
while (num != 0) {
tmp[i++] = digits[num % base];
num /= base;
}
}
if (i > precision)
if (i > precision) {
precision = i;
}
size -= precision;
if (!(type&(ZEROPAD+LEFT)))
if (!(type&(ZEROPAD+LEFT))) {
while (size-- > 0)
call_tx(' '), count++;
if (sign)
}
if (sign) {
call_tx(sign), count++;
}
if (type & SPECIAL) {
if (base == 8)
call_tx('0'), count++;
Expand All @@ -118,9 +122,10 @@ static int number(void (*tx_byte)(unsigned char byte, void *data),
call_tx(digits[33]), count++;
}
}
if (!(type & LEFT))
if (!(type & LEFT)) {
while (size-- > 0)
call_tx(c), count++;
}
while (i < precision--)
call_tx('0'), count++;
while (i-- > 0)
Expand Down Expand Up @@ -148,7 +153,7 @@ int vtxprintf(void (*tx_byte)(unsigned char byte, void *data),

int count;

for (count=0; *fmt ; ++fmt) {
for (count = 0; *fmt ; ++fmt) {
if (*fmt != '%') {
call_tx(*fmt), count++;
continue;
Expand All @@ -168,9 +173,9 @@ int vtxprintf(void (*tx_byte)(unsigned char byte, void *data),

/* get field width */
field_width = -1;
if (is_digit(*fmt))
if (is_digit(*fmt)) {
field_width = skip_atoi(&fmt);
else if (*fmt == '*') {
} else if (*fmt == '*') {
++fmt;
/* it's the next argument */
field_width = va_arg(args, int);
Expand All @@ -184,15 +189,16 @@ int vtxprintf(void (*tx_byte)(unsigned char byte, void *data),
precision = -1;
if (*fmt == '.') {
++fmt;
if (is_digit(*fmt))
if (is_digit(*fmt)) {
precision = skip_atoi(&fmt);
else if (*fmt == '*') {
} else if (*fmt == '*') {
++fmt;
/* it's the next argument */
precision = va_arg(args, int);
}
if (precision < 0)
if (precision < 0) {
precision = 0;
}
}

/* get the conversion qualifier */
Expand Down Expand Up @@ -230,9 +236,10 @@ int vtxprintf(void (*tx_byte)(unsigned char byte, void *data),

len = strnlen(s, (size_t)precision);

if (!(flags & LEFT))
if (!(flags & LEFT)) {
while (len < field_width--)
call_tx(' '), count++;
}
for (i = 0; i < len; ++i)
call_tx(*s++), count++;
while (len < field_width--)
Expand All @@ -254,10 +261,10 @@ int vtxprintf(void (*tx_byte)(unsigned char byte, void *data),
long long *ip = va_arg(args, long long *);
*ip = count;
} else if (qualifier == 'l') {
long * ip = va_arg(args, long *);
long *ip = va_arg(args, long *);
*ip = count;
} else {
int * ip = va_arg(args, int *);
int *ip = va_arg(args, int *);
*ip = count;
}
continue;
Expand Down
2 changes: 1 addition & 1 deletion src/cpu/Kconfig
Expand Up @@ -8,7 +8,7 @@ if ARCH_X86

config CACHE_AS_RAM
bool
default !ROMCC
default y

config NO_CAR_GLOBAL_MIGRATION
bool
Expand Down
2 changes: 1 addition & 1 deletion src/cpu/allwinner/a10/twi.h
Expand Up @@ -31,7 +31,7 @@

/* TWI_STAT values */
enum twi_status {
TWI_STAT_BUS_ERROR = 0x00, /**< Bus error */
TWI_STAT_BUS_ERROR = 0x00, /**< Bus error */
TWI_STAT_TX_START = 0x08, /**< START sent */
TWI_STAT_TX_RSTART = 0x10, /**< Repeated START sent */
TWI_STAT_TX_AW_ACK = 0x18, /**< Sent address+read, ACK */
Expand Down
7 changes: 0 additions & 7 deletions src/cpu/amd/Kconfig
@@ -1,18 +1,11 @@
source src/cpu/amd/socket_754/Kconfig
source src/cpu/amd/socket_939/Kconfig
source src/cpu/amd/socket_940/Kconfig
source src/cpu/amd/socket_AM2/Kconfig
source src/cpu/amd/socket_AM2r2/Kconfig
source src/cpu/amd/socket_AM3/Kconfig
source src/cpu/amd/socket_C32/Kconfig
source src/cpu/amd/socket_FM2/Kconfig
source src/cpu/amd/socket_G34/Kconfig
source src/cpu/amd/socket_ASB2/Kconfig
source src/cpu/amd/socket_F/Kconfig
source src/cpu/amd/socket_F_1207/Kconfig
source src/cpu/amd/socket_S1G1/Kconfig

source src/cpu/amd/model_fxx/Kconfig
source src/cpu/amd/family_10h-family_15h/Kconfig
source src/cpu/amd/geode_lx/Kconfig

Expand Down
6 changes: 0 additions & 6 deletions src/cpu/amd/Makefile.inc
@@ -1,17 +1,11 @@
subdirs-$(CONFIG_CPU_AMD_SOCKET_F) += socket_F
subdirs-$(CONFIG_CPU_AMD_SOCKET_F_1207) += socket_F_1207
subdirs-$(CONFIG_CPU_AMD_SOCKET_754) += socket_754
subdirs-$(CONFIG_CPU_AMD_SOCKET_939) += socket_939
subdirs-$(CONFIG_CPU_AMD_SOCKET_940) += socket_940
subdirs-$(CONFIG_CPU_AMD_SOCKET_AM2) += socket_AM2
subdirs-$(CONFIG_CPU_AMD_SOCKET_AM2R2) += socket_AM2r2
subdirs-$(CONFIG_CPU_AMD_SOCKET_AM3) += socket_AM3
subdirs-$(CONFIG_CPU_AMD_SOCKET_ASB2) += socket_ASB2
subdirs-$(CONFIG_CPU_AMD_SOCKET_C32_NON_AGESA) += socket_C32
subdirs-$(CONFIG_CPU_AMD_SOCKET_FM2_NON_AGESA) += socket_FM2
subdirs-$(CONFIG_CPU_AMD_SOCKET_G34_NON_AGESA) += socket_G34
subdirs-$(CONFIG_CPU_AMD_GEODE_LX) += geode_lx
subdirs-$(CONFIG_CPU_AMD_SOCKET_S1G1) += socket_S1G1

subdirs-$(CONFIG_CPU_AMD_AGESA) += agesa
subdirs-$(CONFIG_CPU_AMD_PI) += pi
2 changes: 0 additions & 2 deletions src/cpu/amd/agesa/family12/model_12_init.c
Expand Up @@ -18,11 +18,9 @@
#include <cpu/amd/mtrr.h>
#include <device/device.h>
#include <string.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/pae.h>
#include <pc80/mc146818rtc.h>
#include <cpu/x86/lapic.h>

#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/mtrr.h>
Expand Down
2 changes: 0 additions & 2 deletions src/cpu/amd/agesa/family14/model_14_init.c
Expand Up @@ -18,11 +18,9 @@
#include <cpu/amd/mtrr.h>
#include <device/device.h>
#include <string.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/pae.h>
#include <pc80/mc146818rtc.h>
#include <cpu/x86/lapic.h>

#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/mtrr.h>
Expand Down
2 changes: 0 additions & 2 deletions src/cpu/amd/agesa/family15tn/model_15_init.c
Expand Up @@ -19,11 +19,9 @@
#include <cpu/amd/mtrr.h>
#include <device/device.h>
#include <string.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/pae.h>
#include <pc80/mc146818rtc.h>
#include <cpu/x86/lapic.h>

#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/mtrr.h>
Expand Down
2 changes: 0 additions & 2 deletions src/cpu/amd/agesa/family16kb/model_16_init.c
Expand Up @@ -18,11 +18,9 @@
#include <cpu/amd/mtrr.h>
#include <device/device.h>
#include <string.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/pae.h>
#include <pc80/mc146818rtc.h>
#include <cpu/x86/lapic.h>

#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/mtrr.h>
Expand Down
2 changes: 1 addition & 1 deletion src/cpu/amd/car/cache_as_ram.inc
Expand Up @@ -380,7 +380,7 @@ fam15_skip_dram_mtrr_setup:
* IMPORTANT: The following calculation _must_ be done at runtime. See
* https://www.coreboot.org/pipermail/coreboot/2010-October/060855.html
*/
movl $copy_and_run, %eax
movl $_program, %eax
andl $(~(CONFIG_XIP_ROM_SIZE - 1)), %eax
orl $MTRR_TYPE_WRBACK, %eax
wrmsr
Expand Down
16 changes: 1 addition & 15 deletions src/cpu/amd/car/post_cache_as_ram.c
Expand Up @@ -31,11 +31,7 @@
#include "cpu/amd/car/disable_cache_as_ram.c"

// For set_sysinfo_in_ram()
#if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AMDK8)
#include "northbridge/amd/amdk8/raminit.h"
#else
#include "northbridge/amd/amdfam10/raminit.h"
#endif

#if CONFIG_RAMTOP <= 0x100000
#error "You need to set CONFIG_RAMTOP greater than 1M"
Expand Down Expand Up @@ -140,17 +136,7 @@ asmlinkage void * post_cache_as_ram(void)
if ((*lower_stack_boundary) != 0xdeadbeef)
printk(BIOS_WARNING, "BSP overran lower stack boundary. Undefined behaviour may result!\n");

if (IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) {
s3resume = acpi_is_wakeup_s3();
} else {
if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME))
s3resume = (acpi_get_sleep_type() == ACPI_S3);
/* For normal boot path, boards with LATE_CBMEM_INIT will do
* cbmem_initialize_empty() late in ramstage.
*/
if (s3resume)
cbmem_recovery(s3resume);
}
s3resume = acpi_is_wakeup_s3();

prepare_romstage_ramstack(s3resume);

Expand Down
2 changes: 0 additions & 2 deletions src/cpu/amd/dualcore/Makefile.inc

This file was deleted.

130 changes: 0 additions & 130 deletions src/cpu/amd/dualcore/amd_sibling.c

This file was deleted.

76 changes: 0 additions & 76 deletions src/cpu/amd/dualcore/dualcore.c

This file was deleted.