diff --git a/payloads/libpayload/drivers/usb/usbmsc.c b/payloads/libpayload/drivers/usb/usbmsc.c
diff --git a/payloads/libpayload/drivers/usb/xhci.c b/payloads/libpayload/drivers/usb/xhci.c
@@ -34,17 +34,17 @@
 #include "xhci_private.h"
 #include "xhci.h"
 
-static void xhci_start (hci_t *controller);
-static void xhci_stop (hci_t *controller);
-static void xhci_reset (hci_t *controller);
-static void xhci_reinit (hci_t *controller);
-static void xhci_shutdown (hci_t *controller);
-static int xhci_bulk (endpoint_t *ep, int size, u8 *data, int finalize);
-static int xhci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq,
+static void xhci_start(hci_t *controller);
+static void xhci_stop(hci_t *controller);
+static void xhci_reset(hci_t *controller);
+static void xhci_reinit(hci_t *controller);
+static void xhci_shutdown(hci_t *controller);
+static int xhci_bulk(endpoint_t *ep, int size, u8 *data, int finalize);
+static int xhci_control(usbdev_t *dev, direction_t dir, int drlen, void *devreq,
 			 int dalen, u8 *data);
-static void* xhci_create_intr_queue (endpoint_t *ep, int reqsize, int reqcount, int reqtiming);
-static void xhci_destroy_intr_queue (endpoint_t *ep, void *queue);
-static u8* xhci_poll_intr_queue (void *queue);
+static void* xhci_create_intr_queue(endpoint_t *ep, int reqsize, int reqcount, int reqtiming);
+static void xhci_destroy_intr_queue(endpoint_t *ep, void *queue);
+static u8* xhci_poll_intr_queue(void *queue);
 
 /*
  * Some structures must not cross page boundaries. To get this,
@@ -151,7 +151,7 @@ xhci_wait_ready(xhci_t *const xhci)
 }
 
 hci_t *
-xhci_init (unsigned long physical_bar)
+xhci_init(unsigned long physical_bar)
 {
 	int i;
 
@@ -167,7 +167,7 @@ xhci_init (unsigned long physical_bar)
 	controller->bulk		= xhci_bulk;
 	controller->control		= xhci_control;
 	controller->set_address		= xhci_set_address;
-	controller->finish_device_config= xhci_finish_device_config;
+	controller->finish_device_config = xhci_finish_device_config;
 	controller->destroy_device	= xhci_destroy_dev;
 	controller->create_intr_queue	= xhci_create_intr_queue;
 	controller->destroy_intr_queue	= xhci_destroy_intr_queue;
@@ -306,7 +306,7 @@ xhci_init (unsigned long physical_bar)
 
 #if CONFIG(LP_USB_PCI)
 hci_t *
-xhci_pci_init (pcidev_t addr)
+xhci_pci_init(pcidev_t addr)
 {
 	u32 reg_addr;
 	hci_t *controller;
@@ -358,7 +358,7 @@ xhci_reset(hci_t *const controller)
 }
 
 static void
-xhci_reinit (hci_t *controller)
+xhci_reinit(hci_t *controller)
 {
 	xhci_t *const xhci = XHCI_INST(controller);
 
@@ -464,7 +464,7 @@ xhci_shutdown(hci_t *const controller)
 }
 
 static void
-xhci_start (hci_t *controller)
+xhci_start(hci_t *controller)
 {
 	xhci_t *const xhci = XHCI_INST(controller);
 
@@ -474,7 +474,7 @@ xhci_start (hci_t *controller)
 }
 
 static void
-xhci_stop (hci_t *controller)
+xhci_stop(hci_t *controller)
 {
 	xhci_t *const xhci = XHCI_INST(controller);
 

diff --git a/payloads/libpayload/drivers/usb/xhci.h b/payloads/libpayload/drivers/usb/xhci.h
@@ -32,9 +32,9 @@
 #include <pci.h>
 #include <usb/usb.h>
 
-hci_t *xhci_pci_init (pcidev_t addr);
-hci_t *xhci_init (unsigned long physical_bar);
+hci_t *xhci_pci_init(pcidev_t addr);
+hci_t *xhci_init(unsigned long physical_bar);
 
-void xhci_rh_init (usbdev_t *dev);
+void xhci_rh_init(usbdev_t *dev);
 
 #endif
diff --git a/payloads/libpayload/drivers/usb/xhci_devconf.c b/payloads/libpayload/drivers/usb/xhci_devconf.c
@@ -124,7 +124,7 @@ xhci_make_inputctx(const size_t ctxsize)
 }
 
 usbdev_t *
-xhci_set_address (hci_t *controller, usb_speed speed, int hubport, int hubaddr)
+xhci_set_address(hci_t *controller, usb_speed speed, int hubport, int hubaddr)
 {
 	xhci_t *const xhci = XHCI_INST(controller);
 	const size_t ctxsize = CTXSIZE(xhci);
@@ -162,7 +162,7 @@ xhci_set_address (hci_t *controller, usb_speed speed, int hubport, int hubaddr)
 	for (i = 0; i < NUM_EPS; i++, dma_buffer += ctxsize)
 		di->ctx.ep[i] = dma_buffer;
 
-	*ic->add = (1 << 0) /* Slot Context */ | (1 << 1) /* EP0 Context */ ;
+	*ic->add = (1 << 0) /* Slot Context */ | (1 << 1) /* EP0 Context */;
 
 	SC_SET(ROUTE,	ic->dev.slot, xhci_gen_route(xhci, hubport, hubaddr));
 	SC_SET(SPEED1,	ic->dev.slot, speed + 1);
@@ -288,7 +288,7 @@ xhci_finish_hub_config(usbdev_t *const dev, inputctx_t *const ic)
 static size_t
 xhci_bound_interval(const endpoint_t *const ep)
 {
-	if (	(ep->dev->speed == LOW_SPEED &&
+	if ((ep->dev->speed == LOW_SPEED &&
 			(ep->type == ISOCHRONOUS ||
 			 ep->type == INTERRUPT)) ||
 		(ep->dev->speed == FULL_SPEED &&

diff --git a/payloads/libpayload/drivers/usb/xhci_private.h b/payloads/libpayload/drivers/usb/xhci_private.h
@@ -40,7 +40,7 @@
 #ifdef XHCI_SPEW_DEBUG
 # define xhci_spew(fmt, args...) xhci_debug(fmt, ##args)
 #else
-# define xhci_spew(fmt, args...) do {} while(0)
+# define xhci_spew(fmt, args...) do {} while (0)
 #endif
 
 #define MASK(startbit, lenbit) (((1<<(lenbit))-1)<<(startbit))
@@ -377,7 +377,7 @@ typedef struct xhci {
 		u32 hccparams;
 		u32 dboff;
 		u32 rtsoff;
-	} __packed *capreg;
+	} __packed * capreg;
 
 	/* opreg is R/W is most places, so volatile access is necessary.
 	   volatile means that the compiler seeks byte writes if possible,
@@ -444,7 +444,7 @@ typedef struct xhci {
 			u32 portli; /* 0x408 + 4 * port */
 			u32 res; /* 0x40C + 4 * port */
 		} __packed prs[];
-	} __packed *opreg;
+	} __packed * opreg;
 
 	/* R/W, volatile, MMIO -> no bitfields */
 	volatile struct hcrreg {
@@ -460,7 +460,7 @@ typedef struct xhci {
 			u32 erdp_lo;
 			u32 erdp_hi;
 		} __packed intrrs[]; // up to 1024, but maximum host specific, given in capreg->MaxIntrs
-	} __packed *hcrreg;
+	} __packed * hcrreg;
 
 	/* R/W, volatile, MMIO -> no bitfields */
 	volatile u32 *dbreg;
@@ -486,7 +486,7 @@ typedef struct xhci {
 
 void *xhci_align(const size_t min_align, const size_t size);
 void xhci_init_cycle_ring(transfer_ring_t *, const size_t ring_size);
-usbdev_t *xhci_set_address (hci_t *, usb_speed speed, int hubport, int hubaddr);
+usbdev_t *xhci_set_address(hci_t *, usb_speed speed, int hubport, int hubaddr);
 int xhci_finish_device_config(usbdev_t *);
 void xhci_destroy_dev(hci_t *, int slot_id);
 
@@ -523,12 +523,12 @@ void xhci_dump_inputctx(const inputctx_t *);
 void xhci_dump_transfer_trb(const trb_t *);
 void xhci_dump_transfer_trbs(const trb_t *first, const trb_t *last);
 #else
-#define xhci_dump_slotctx(args...)		do {} while(0)
-#define xhci_dump_epctx(args...)		do {} while(0)
-#define xhci_dump_devctx(args...)		do {} while(0)
-#define xhci_dump_inputctx(args...)		do {} while(0)
-#define xhci_dump_transfer_trb(args...)		do {} while(0)
-#define xhci_dump_transfer_trbs(args...)	do {} while(0)
+#define xhci_dump_slotctx(args...)		do {} while (0)
+#define xhci_dump_epctx(args...)		do {} while (0)
+#define xhci_dump_devctx(args...)		do {} while (0)
+#define xhci_dump_inputctx(args...)		do {} while (0)
+#define xhci_dump_transfer_trb(args...)		do {} while (0)
+#define xhci_dump_transfer_trbs(args...)	do {} while (0)
 #endif
 
 #endif
diff --git a/payloads/libpayload/drivers/usb/xhci_rh.c b/payloads/libpayload/drivers/usb/xhci_rh.c
@@ -149,7 +149,7 @@ static const generic_hub_ops_t xhci_rh_ops = {
 };
 
 void
-xhci_rh_init (usbdev_t *dev)
+xhci_rh_init(usbdev_t *dev)
 {
 	/* we can set them here because a root hub _really_ shouldn't
 	   appear elsewhere */

diff --git a/spd/lp4x/memory_parts.json b/spd/lp4x/memory_parts.json
@@ -351,6 +351,18 @@
                 "ranksPerChannel": 2,
                 "speedMbps": 4267
             }
+        },
+        {
+            "name": "H54G68CYRBX248",
+            "attribs": {
+                "densityPerChannelGb": 8,
+                "banks": 8,
+                "channelsPerDie": 4,
+                "diesPerPackage": 2,
+                "bitWidthPerChannel": 8,
+                "ranksPerChannel": 2,
+                "speedMbps": 4267
+            }
         }
     ]
 }
diff --git a/spd/lp4x/set-0/parts_spd_manifest.generated.txt b/spd/lp4x/set-0/parts_spd_manifest.generated.txt
@@ -30,3 +30,4 @@ H54G56CYRBX247,spd-3.hex
 K4U6E3S4AB-MGCL,spd-1.hex
 K4UBE3D4AB-MGCL,spd-3.hex
 MT53E2G32D4NQ-046 WT:C,spd-7.hex
+H54G68CYRBX248,spd-2.hex
diff --git a/spd/lp4x/set-1/parts_spd_manifest.generated.txt b/spd/lp4x/set-1/parts_spd_manifest.generated.txt
@@ -30,3 +30,4 @@ H54G56CYRBX247,spd-3.hex
 K4U6E3S4AB-MGCL,spd-1.hex
 K4UBE3D4AB-MGCL,spd-3.hex
 MT53E2G32D4NQ-046 WT:C,spd-10.hex
+H54G68CYRBX248,spd-2.hex
diff --git a/spd/lp5/memory_parts.json b/spd/lp5/memory_parts.json
@@ -109,6 +109,16 @@
                 "ranksPerChannel": 1,
                 "speedMbps": 7500
             }
+        },
+        {
+            "name":  "MT62F2G32D4DS-026 WT:B",
+            "attribs": {
+                "densityPerDieGb": 16,
+                "diesPerPackage": 4,
+                "bitWidthPerChannel": 16,
+                "ranksPerChannel": 2,
+                "speedMbps": 7500
+            }
         }
     ]
 }
diff --git a/spd/lp5/set-0/parts_spd_manifest.generated.txt b/spd/lp5/set-0/parts_spd_manifest.generated.txt
@@ -12,3 +12,4 @@ H58G56AK6BX069,spd-3.hex
 MT62F1G32D4DS-031 WT:B,spd-2.hex
 K3LKCKC0BM-MGCP,spd-6.hex
 MT62F1G32D2DS-026 WT:B,spd-7.hex
+MT62F2G32D4DS-026 WT:B,spd-8.hex
diff --git a/spd/lp5/set-0/spd-8.hex b/spd/lp5/set-0/spd-8.hex
@@ -0,0 +1,32 @@
+23 10 13 0E 16 22 B5 08 00 00 00 00 0A 01 00 00
+00 00 09 00 00 00 00 00 AB 00 90 A8 90 C0 08 60
+04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 C9 00 C5 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/spd/lp5/set-1/parts_spd_manifest.generated.txt b/spd/lp5/set-1/parts_spd_manifest.generated.txt
@@ -7,8 +7,9 @@ H9JCNNNCP3MLYR-N6E,spd-2.hex
 K3LKBKB0BM-MGCP,spd-3.hex
 H9JCNNNBK3MLYR-N6E,spd-1.hex
 MT62F2G32D8DR-031 WT:B,spd-4.hex
-K3LKLKL0EM-MGCN,spd-1.hex
+K3LKLKL0EM-MGCN,spd-5.hex
 H58G56AK6BX069,spd-3.hex
 MT62F1G32D4DS-031 WT:B,spd-2.hex
-K3LKCKC0BM-MGCP,spd-5.hex
-MT62F1G32D2DS-026 WT:B,spd-3.hex
+K3LKCKC0BM-MGCP,spd-6.hex
+MT62F1G32D2DS-026 WT:B,spd-7.hex
+MT62F2G32D4DS-026 WT:B,spd-8.hex
diff --git a/spd/lp5/set-1/spd-1.hex b/spd/lp5/set-1/spd-1.hex
@@ -1,11 +1,11 @@
 23 11 13 0E 85 19 95 18 00 40 00 00 02 02 00 00
-00 00 03 00 00 00 00 00 2C 00 90 A8 90 90 06 C0
+00 00 03 00 00 00 00 00 2B 00 90 A8 90 90 06 C0
 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 C9 00 F4 00 00
+00 00 00 00 00 00 00 00 00 00 00 B9 00 C1 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

diff --git a/spd/lp5/set-1/spd-2.hex b/spd/lp5/set-1/spd-2.hex
@@ -1,11 +1,11 @@
 23 11 13 0E 85 19 B5 18 00 40 00 00 0A 02 00 00
-00 00 03 00 00 00 00 00 2C 00 90 A8 90 90 06 C0
+00 00 03 00 00 00 00 00 2B 00 90 A8 90 90 06 C0
 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 C9 00 F4 00 00
+00 00 00 00 00 00 00 00 00 00 00 B9 00 C1 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

diff --git a/spd/lp5/set-1/spd-3.hex b/spd/lp5/set-1/spd-3.hex
@@ -1,11 +1,11 @@
 23 11 13 0E 86 21 95 18 00 40 00 00 02 02 00 00
-00 00 03 00 00 00 00 00 2C 00 90 A8 90 C0 08 60
+00 00 03 00 00 00 00 00 2B 00 90 A8 90 C0 08 60
 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 C9 00 F4 00 00
+00 00 00 00 00 00 00 00 00 00 00 B9 00 C1 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

diff --git a/spd/lp5/set-1/spd-4.hex b/spd/lp5/set-1/spd-4.hex
@@ -1,11 +1,11 @@
 23 11 13 0E 85 21 F9 18 00 40 00 00 09 02 00 00
-00 00 03 00 00 00 00 00 2C 00 90 A8 90 90 06 C0
+00 00 03 00 00 00 00 00 2B 00 90 A8 90 90 06 C0
 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-00 00 00 00 00 00 00 00 00 00 00 C9 00 F4 00 00
+00 00 00 00 00 00 00 00 00 00 00 B9 00 C1 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

diff --git a/spd/lp5/set-1/spd-5.hex b/spd/lp5/set-1/spd-5.hex
@@ -1,6 +1,6 @@
-23 11 13 0E 86 21 B5 18 00 40 00 00 0A 02 00 00
-00 00 03 00 00 00 00 00 2C 00 90 A8 90 C0 08 60
-04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+23 11 13 0E 85 19 95 18 00 40 00 00 02 02 00 00
+00 00 03 00 00 00 00 00 2C 00 90 A8 90 90 06 C0
+03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

diff --git a/spd/lp5/set-1/spd-6.hex b/spd/lp5/set-1/spd-6.hex
@@ -0,0 +1,32 @@
+23 11 13 0E 86 21 B5 18 00 40 00 00 0A 02 00 00
+00 00 03 00 00 00 00 00 2B 00 90 A8 90 C0 08 60
+04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 B9 00 C1 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/spd/lp5/set-1/spd-8.hex b/spd/lp5/set-1/spd-8.hex
@@ -0,0 +1,32 @@
+23 11 13 0E 86 21 B5 18 00 40 00 00 0A 02 00 00
+00 00 03 00 00 00 00 00 2B 00 90 A8 90 C0 08 60
+04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 C9 00 93 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
+20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/src/arch/arm/libgcc/Makefile.inc b/src/arch/arm/libgcc/Makefile.inc
@@ -1,6 +1,6 @@
 ## SPDX-License-Identifier: GPL-2.0-only
 
-libgcc_files = ashldi3.S lib1funcs.S lshrdi3.S muldi3.S ucmpdi2.S uldivmod.S
+libgcc_files = ashldi3.S lib1funcs.S lshrdi3.S muldi3.S ucmpdi2.S uldivmod.S ldivmod.S
 libgcc_files += udivmoddi4.c umoddi3.c
 
 ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARM),y)

diff --git a/src/arch/arm/libgcc/ldivmod.S b/src/arch/arm/libgcc/ldivmod.S
@@ -0,0 +1,74 @@
+/* SPDX-License-Identifier: ISC OR GPL-2.0-only */
+
+/*
+ * ldivmod.S: signed 64 bit division (quotient and remainder)
+ *
+ * Taken from CrOS EC: third_party/libaeabi-cortexm0/core/cortex-m0/ldivmod.S
+ */
+
+#include <arch/asm.h>
+
+
+@ {long long quotient, long long remainder}
+@ __aeabi_ldivmod(long long numerator, long long denominator)
+@
+@ Divide r1:r0 by r3:r2 and return the quotient in r1:r0 and the remainder in
+@ r3:r2 (all signed)
+@
+
+ENTRY(__aeabi_ldivmod)
+
+	cmp	r1, #0
+	bge	L_num_pos
+
+	push	{r4, lr}
+	movs	r4, #0			@ num = -num
+	rsbs	r0, r0, #0
+	sbcs	r4, r1
+	mov	r1, r4
+
+	cmp	r3, #0
+	bge	L_neg_both
+
+	movs	r4, #0			@ den = -den
+	rsbs	r2, r2, #0
+	sbcs	r4, r3
+	mov	r3, r4
+	bl	__aeabi_uldivmod
+	movs	r4, #0			@ rem = -rem
+	rsbs	r2, r2, #0
+	sbcs	r4, r3
+	mov	r3, r4
+	pop	{r4, pc}
+
+L_neg_both:
+	bl	__aeabi_uldivmod
+	movs	r4, #0			@ quot = -quot
+	rsbs	r0, r0, #0
+	sbcs	r4, r1
+	mov	r1, r4
+	movs	r4, #0			@ rem = -rem
+	rsbs	r2, r2, #0
+	sbcs	r4, r3
+	mov	r3, r4
+	pop	{r4, pc}
+
+L_num_pos:
+	cmp	r3, #0
+	blt	L_den_neg
+	push	{r4, lr}
+	bl	__aeabi_uldivmod	@ offset too big for b / bge
+	pop	{r4, pc}
+
+L_den_neg:
+	push	{r4, lr}
+	movs	r4, #0			@ den = -den
+	rsbs	r2, r2, #0
+	sbcs	r4, r3
+	mov	r3, r4
+	bl	__aeabi_uldivmod
+	movs	r4, #0			@ quot = -quot
+	rsbs	r0, r0, #0
+	sbcs	r4, r1
+	mov	r1, r4
+	pop	{r4, pc}
diff --git a/src/arch/x86/acpi/debug.asl b/src/arch/x86/acpi/debug.asl
@@ -27,12 +27,12 @@ OperationRegion(CREG, SystemIO, 0x3F8, 8)
 */
 Method(DINI)
 {
-	store(0x83, DLCR)
-	store(0x01, CDAT)	/* 115200 baud (low) */
-	store(0x00, CDLM)	/* 115200 baud (high) */
-	store(0x03, DLCR)	/* word=8 stop=1 parity=none */
-	store(0x03, CMCR)	/* DTR=1 RTS=1 Out2=Off Loop=Off */
-	store(0x00, CDLM)	/* turn off interrupts */
+	DLCR = 0x83
+	CDAT = 1	/* 115200 baud (low) */
+	CDLM = 0	/* 115200 baud (high) */
+	DLCR = 3	/* word=8 stop=1 parity=none */
+	CMCR = 3	/* DTR=1 RTS=1 Out2=Off Loop=Off */
+	CDLM = 0	/* turn off interrupts */
 }
 
 /*
@@ -41,9 +41,9 @@ Method(DINI)
 */
 Method(THRE)
 {
-	and(CLSR, 0x20, local0)
+	local0 = CLSR & 0x20
 	while (local0 == 0) {
-		and(CLSR, 0x20, local0)
+		local0 = CLSR & 0x20
 	}
 }
 
@@ -54,7 +54,7 @@ Method(THRE)
 Method(OUTX, 1)
 {
 	THRE()
-	store(Arg0, CDAT)
+	CDAT = Arg0
 }
 
 /*
@@ -75,11 +75,11 @@ Method(OUTC, 1)
 */
 Method(DBGN, 1)
 {
-	and(Arg0, 0x0f, Local0)
-	if (LLess(Local0, 10)) {
-		add(Local0, 0x30, Local0)
+	Local0 = Arg0 & 0x0f
+	if (Local0 < 10) {
+		Local0 += 0x30
 	} else {
-		add(Local0, 0x37, Local0)
+		Local0 += 0x37
 	}
 	OUTC(Local0)
 }
@@ -136,10 +136,10 @@ Method(DBGO, 1)
 		}
 	} else {
 		Name(BDBG, Buffer(80) {})
-		store(Arg0, BDBG)
-		store(0, Local1)
+		BDBG = Arg0
+		Local1 = 0
 		while (One) {
-			store(GETC(BDBG, Local1), Local0)
+			Local0 = GETC(BDBG, Local1)
 			if (Local0 == 0) {
 				return (0)
 			}

diff --git a/src/arch/x86/acpi/globutil.asl b/src/arch/x86/acpi/globutil.asl
@@ -9,7 +9,7 @@ Scope(\_SB) {
 /* string compare functions */
 Method(MIN, 2)
 {
-	if (LLess(Arg0, Arg1)) {
+	if (Arg0 < Arg1) {
 		Return(Arg0)
 	} else {
 		Return(Arg1)
@@ -18,44 +18,44 @@ Method(MIN, 2)
 
 Method(SLEN, 1)
 {
-	Store(Arg0, Local0)
+	Local0 = Arg0
 	Return(Sizeof(Local0))
 }
 
 Method(S2BF, 1, Serialized)
 {
 	Local0 = SLEN(Arg0) + 1
 	Name(BUFF, Buffer(Local0) {})
-	Store(Arg0, BUFF)
+	BUFF = Arg0
 	Return(BUFF)
 }
 
 /* Strong string compare.  Checks both length and content */
 Method(SCMP, 2)
 {
-	Store(S2BF(Arg0), Local0)
-	Store(S2BF(Arg1), Local1)
-	Store(Zero, Local4)
-	Store(SLEN(Arg0), Local5)
-	Store(SLEN(Arg1), Local6)
-	Store(MIN(Local5, Local6), Local7)
+	Local0 = S2BF(Arg0)
+	Local1 = S2BF(Arg1)
+	Local4 = 0
+	Local5 = SLEN(Arg0)
+	Local6 = SLEN(Arg1)
+	Local7 = MIN(Local5, Local6)
 
-	While(LLess(Local4, Local7)) {
-		Store(Derefof(Local0[Local4]), Local2)
-		Store(Derefof(Local1[Local4]), Local3)
+	While(Local4 < Local7) {
+		Local2 = Derefof(Local0[Local4])
+		Local3 = Derefof(Local1[Local4])
 		if (Local2 > Local3) {
 			Return(One)
 		} else {
-			if (LLess(Local2, Local3)) {
+			if (Local2 < Local3) {
 				Return(Ones)
 			}
 		}
 		Local4++
 	}
-	if (LLess(Local4, Local5)) {
+	if (Local4 < Local5) {
 		Return(One)
 	} else {
-		if (LLess(Local4, Local6)) {
+		if (Local4 < Local6) {
 			Return(Ones)
 		} else {
 			Return(Zero)
@@ -69,17 +69,16 @@ Method(SCMP, 2)
 */
 Method(WCMP, 2)
 {
-	Store(S2BF(Arg0), Local0)
-	Store(S2BF(Arg1), Local1)
-	if (LLess(SLEN(Arg0), SLEN(Arg1))) {
+	Local0 = S2BF(Arg0)
+	Local1 = S2BF(Arg1)
+	if (SLEN(Arg0) < SLEN(Arg1)) {
 		Return(0)
 	}
-	Store(Zero, Local2)
-	Store(SLEN(Arg1), Local3)
+	Local2 = 0
+	Local3 = SLEN(Arg1)
 
-	While(LLess(Local2, Local3)) {
-		if (LNotEqual(Derefof(Local0[Local2]),
-			Derefof(Local1[Local2]))) {
+	While(Local2 < Local3) {
+		if (Derefof(Local0[Local2]) != Derefof(Local1[Local2])) {
 			Return(0)
 		}
 		Local2++
@@ -92,9 +91,9 @@ Method(WCMP, 2)
 */
 Method(I2BM, 1)
 {
-	Store(0, Local0)
-	if (LNotEqual(ARG0, 0)) {
-		Store(1, Local1)
+	Local0 = 0
+	if (ARG0 != 0) {
+		Local1 = 1
 		Local0 = Local1 << ARG0
 	}
 	Return(Local0)

diff --git a/src/commonlib/Makefile.inc b/src/commonlib/Makefile.inc
@@ -21,6 +21,9 @@ ramstage-y += region.c
 smm-y += region.c
 postcar-y += region.c
 
+romstage-y += rational.c
+ramstage-y += rational.c
+
 ramstage-$(CONFIG_PLATFORM_USES_FSP1_1) += fsp_relocate.c
 ifeq ($(CONFIG_FSP_M_XIP),)
 romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += fsp_relocate.c

diff --git a/src/commonlib/bsd/include/commonlib/bsd/compiler.h b/src/commonlib/bsd/include/commonlib/bsd/compiler.h
@@ -15,19 +15,25 @@
 #define __aligned(x) __attribute__((__aligned__(x)))
 #endif
 
-/* Because there may be variables/parameters whose name contains "__unused" in
-   header files of libc, namely musl, names consistent with the ones in the
-   Linux kernel may be a better choice. */
+/*
+ * Because there may be variables/parameters whose name contains "__unused" in
+ * header files of libc, namely musl, names consistent with the ones in the
+ * Linux kernel may be a better choice.
+ */
 
-/* This is used to mark identifiers unused in all conditions, e.g. a parameter
-   completely unused in all code branch, only present to fit an API. */
+/*
+ * This is used to mark identifiers unused in all conditions, e.g. a parameter
+ * completely unused in all code branch, only present to fit an API.
+ */
 #ifndef __always_unused
 #define __always_unused __attribute__((__unused__))
 #endif
 
-/* This is used to mark identifiers unused in some conditions, e.g. a parameter
-   only unused in some code branches, a global variable only accessed with code
-   being conditionally preprocessed, etc. */
+/*
+ * This is used to mark identifiers unused in some conditions, e.g. a parameter
+ * only unused in some code branches, a global variable only accessed with code
+ * being conditionally preprocessed, etc.
+ */
 #ifndef __maybe_unused
 #define __maybe_unused __attribute__((__unused__))
 #endif
@@ -52,13 +58,15 @@
 #define __fallthrough __attribute__((__fallthrough__))
 #endif
 
-/* This evaluates to the type of the first expression, unless that is constant
-   in which case it evaluates to the type of the second. This is useful when
-   assigning macro parameters to temporary variables, because that would
-   normally circumvent the special loosened type promotion rules for integer
-   literals. By using this macro, the promotion can happen at the time the
-   literal is assigned to the temporary variable. If the literal doesn't fit in
-   the chosen type, -Werror=overflow will catch it, so this should be safe. */
+/*
+ * This evaluates to the type of the first expression, unless that is constant
+ * in which case it evaluates to the type of the second. This is useful when
+ * assigning macro parameters to temporary variables, because that would
+ * normally circumvent the special loosened type promotion rules for integer
+ * literals. By using this macro, the promotion can happen at the time the
+ * literal is assigned to the temporary variable. If the literal doesn't fit in
+ * the chosen type, -Werror=overflow will catch it, so this should be safe.
+ */
 #define __TYPEOF_UNLESS_CONST(expr, fallback_expr) __typeof__( \
 	__builtin_choose_expr(__builtin_constant_p(expr), fallback_expr, expr))
 

diff --git a/src/commonlib/bsd/include/commonlib/bsd/elog.h b/src/commonlib/bsd/include/commonlib/bsd/elog.h
@@ -204,9 +204,9 @@ struct elog_event_data_wake {
 } __packed;
 
 /* ChromeOS related events */
-#define ELOG_TYPE_CROS_DEVELOPER_MODE     0xa0
-#define ELOG_TYPE_CROS_RECOVERY_MODE      0xa1
-#define  ELOG_CROS_RECOVERY_MODE_BUTTON    0x02
+#define ELOG_DEPRECATED_TYPE_CROS_DEVELOPER_MODE     0xa0
+#define ELOG_DEPRECATED_TYPE_CROS_RECOVERY_MODE      0xa1
+#define  ELOG_DEPRECATED_CROS_RECOVERY_MODE_BUTTON    0x02
 
 /* Management Engine Events */
 #define ELOG_TYPE_MANAGEMENT_ENGINE      0xa2
@@ -306,14 +306,19 @@ struct elog_event_mem_cache_update {
 #define ELOG_TYPE_MI_HR                   0xb5
 
 /* ChromeOS diagnostics-related events */
-#define ELOG_TYPE_CROS_DIAGNOSTICS        0xb6
-#define  ELOG_CROS_LAUNCH_DIAGNOSTICS      0x01
+#define ELOG_DEPRECATED_TYPE_CROS_DIAGNOSTICS        0xb6
+#define  ELOG_DEPRECATED_CROS_LAUNCH_DIAGNOSTICS      0x01
 
 struct elog_event_extended_event {
 	uint8_t event_type;
 	uint32_t event_complement;
 } __packed;
 
+/*
+ * Firmware boot related information retrieved from vboot and store as
+ * per `union vb2_fw_boot_info` data structure.
+ */
+#define ELOG_TYPE_FW_VBOOT_INFO        0xb7
 
 /* Only the 7-LSB are used for size */
 #define ELOG_MAX_EVENT_SIZE                    0x7F

diff --git a/src/commonlib/include/commonlib/rational.h b/src/commonlib/include/commonlib/rational.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef _COMMONLIB_RATIONAL_H_
+#define _COMMONLIB_RATIONAL_H_
+
+#include <stddef.h>
+
+/*
+ * Calculate the best rational approximation for a given fraction,
+ * with the restriction of maximum numerator and denominator.
+ * For example, to find the approximation of 3.1415 with 5 bit denominator
+ * and 8 bit numerator fields:
+ *
+ * rational_best_approximation(31415, 10000,
+ *			       (1 << 8) - 1, (1 << 5) - 1, &n, &d);
+ */
+void rational_best_approximation(
+	unsigned long numerator, unsigned long denominator,
+	unsigned long max_numerator, unsigned long max_denominator,
+	unsigned long *best_numerator, unsigned long *best_denominator);
+
+#endif /* _COMMONLIB_RATIONAL_H_ */
diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h
@@ -199,6 +199,14 @@ static const struct timestamp_id_to_name {
 	TS_NAME_DEF(TS_BOOTBLOCK_END, 0, "end of bootblock"),
 	TS_NAME_DEF(TS_COPYROM_START, TS_COPYROM_END, "starting to load romstage"),
 	TS_NAME_DEF(TS_COPYROM_END, 0, "finished loading romstage"),
+	/*
+	 * "ignore for x86": On platforms with memory-mapped flash, it's
+	 * impossible to separate loading times from decompression times because
+	 * the flash accesses happen in the background as the decompression is
+	 * running. So it makes more sense to consider the total loading +
+	 * decompression time by looking at the timestamps before and after the
+	 * decompression timestamps.
+	 */
 	TS_NAME_DEF(TS_ULZMA_START, TS_ULZMA_END, "starting LZMA decompress (ignore for x86)"),
 	TS_NAME_DEF(TS_ULZMA_END, 0, "finished LZMA decompress (ignore for x86)"),
 	TS_NAME_DEF(TS_ULZ4F_START, TS_ULZ4F_END, "starting LZ4 decompress (ignore for x86)"),

diff --git a/src/commonlib/rational.c b/src/commonlib/rational.c
@@ -0,0 +1,95 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Helper functions for rational numbers.
+ *
+ * Copyright (C) 2009 emlix GmbH, Oskar Schirmer <oskar@scara.com>
+ * Copyright (C) 2019 Trent Piepho <tpiepho@gmail.com>
+ */
+
+#include <commonlib/helpers.h>
+#include <commonlib/rational.h>
+#include <limits.h>
+
+/*
+ * For theoretical background, see:
+ * https://en.wikipedia.org/wiki/Continued_fraction
+ */
+void rational_best_approximation(
+	unsigned long numerator, unsigned long denominator,
+	unsigned long max_numerator, unsigned long max_denominator,
+	unsigned long *best_numerator, unsigned long *best_denominator)
+{
+	/*
+	 * n/d is the starting rational, where both n and d will
+	 * decrease in each iteration using the Euclidean algorithm.
+	 *
+	 * dp is the value of d from the prior iteration.
+	 *
+	 * n2/d2, n1/d1, and n0/d0 are our successively more accurate
+	 * approximations of the rational.  They are, respectively,
+	 * the current, previous, and two prior iterations of it.
+	 *
+	 * a is current term of the continued fraction.
+	 */
+	unsigned long n, d, n0, d0, n1, d1, n2, d2;
+	n = numerator;
+	d = denominator;
+	n0 = d1 = 0;
+	n1 = d0 = 1;
+
+	for (;;) {
+		unsigned long dp, a;
+
+		if (d == 0)
+			break;
+		/*
+		 * Find next term in continued fraction, 'a', via
+		 * Euclidean algorithm.
+		 */
+		dp = d;
+		a = n / d;
+		d = n % d;
+		n = dp;
+
+		/*
+		 * Calculate the current rational approximation (aka
+		 * convergent), n2/d2, using the term just found and
+		 * the two prior approximations.
+		 */
+		n2 = n0 + a * n1;
+		d2 = d0 + a * d1;
+
+		/*
+		 * If the current convergent exceeds the maximum, then
+		 * return either the previous convergent or the
+		 * largest semi-convergent, the final term of which is
+		 * found below as 't'.
+		 */
+		if ((n2 > max_numerator) || (d2 > max_denominator)) {
+			unsigned long t = ULONG_MAX;
+
+			if (d1)
+				t = (max_denominator - d0) / d1;
+			if (n1)
+				t = MIN(t, (max_numerator - n0) / n1);
+
+			/*
+			 * This tests if the semi-convergent is closer than the previous
+			 * convergent.  If d1 is zero there is no previous convergent as
+			 * this is the 1st iteration, so always choose the semi-convergent.
+			 */
+			if (!d1 || 2u * t > a || (2u * t == a && d0 * dp > d1 * d)) {
+				n1 = n0 + t * n1;
+				d1 = d0 + t * d1;
+			}
+			break;
+		}
+		n0 = n1;
+		n1 = n2;
+		d0 = d1;
+		d1 = d2;
+	}
+
+	*best_numerator = n1;
+	*best_denominator = d1;
+}
diff --git a/src/device/Kconfig b/src/device/Kconfig
@@ -420,7 +420,7 @@ endif # FRAMEBUFFER_SET_VESA_MODE
 config WANT_LINEAR_FRAMEBUFFER
 	bool
 	default y if CHROMEOS
-	default y if PAYLOAD_TIANOCORE
+	default y if PAYLOAD_EDK2
 	default y if COREDOOM_SECONDARY_PAYLOAD
 
 choice

diff --git a/src/device/device_util.c b/src/device/device_util.c
@@ -522,7 +522,7 @@ void report_resource_stored(struct device *dev, const struct resource *resource,
 		snprintf(buf, sizeof(buf),
 			 "bus %02x ", dev->link_list->secondary);
 	}
-	printk(BIOS_DEBUG, "%s %02lx <- [0x%010llx - 0x%010llx] size 0x%08llx "
+	printk(BIOS_DEBUG, "%s %02lx <- [0x%016llx - 0x%016llx] size 0x%08llx "
 	       "gran 0x%02x %s%s%s\n", dev_path(dev), resource->index,
 		base, end, resource->size, resource->gran, buf,
 		resource_type(resource), comment);
@@ -586,6 +586,10 @@ void search_global_resources(unsigned long type_mask, unsigned long type,
 			if (res->flags & IORESOURCE_SUBTRACTIVE)
 				continue;
 
+			/* If the resource is not assigned ignore it. */
+			if (!(res->flags & IORESOURCE_ASSIGNED))
+				continue;
+
 			search(gp, curdev, res);
 		}
 	}
@@ -800,7 +804,7 @@ void show_one_resource(int debug_level, struct device *dev,
 	end = resource_end(resource);
 	buf[0] = '\0';
 
-	printk(debug_level, "%s %02lx <- [0x%010llx - 0x%010llx] "
+	printk(debug_level, "%s %02lx <- [0x%016llx - 0x%016llx] "
 		  "size 0x%08llx gran 0x%02x %s%s%s\n", dev_path(dev),
 		  resource->index, base, end, resource->size, resource->gran,
 		  buf, resource_type(resource), comment);

diff --git a/src/device/i2c_bus.c b/src/device/i2c_bus.c
@@ -9,7 +9,7 @@
 bool i2c_dev_detect(struct device *dev, unsigned int addr)
 {
 	struct i2c_msg seg = { .flags = 0, .slave = addr, .buf = NULL, .len = 0 };
-	return dev->ops->ops_i2c_bus->transfer(dev, &seg, 0) == 0;
+	return dev->ops->ops_i2c_bus->transfer(dev, &seg, 1) == 0;
 }
 
 struct bus *i2c_link(const struct device *const dev)

diff --git a/src/device/pci_device.c b/src/device/pci_device.c
@@ -6,6 +6,7 @@
  */
 
 #include <acpi/acpi.h>
+#include <assert.h>
 #include <device/pci_ops.h>
 #include <bootmode.h>
 #include <console/console.h>
@@ -1298,6 +1299,29 @@ unsigned int pci_match_simple_dev(struct device *dev, pci_devfn_t sdev)
 			dev->path.pci.devfn == PCI_DEV2DEVFN(sdev);
 }
 
+/**
+ * Test whether a capability is available along the whole path from the given
+ * device to the host bridge.
+ *
+ * @param dev Pointer to the device structure.
+ * @param cap PCI_CAP_LIST_ID of the PCI capability we're looking for.
+ * @return The next matching capability of the given device, if it is available
+ * along the whole path, or zero if not.
+ */
+uint16_t pci_find_cap_recursive(const struct device *dev, uint16_t cap)
+{
+	assert(dev->bus);
+	uint16_t pos = pci_find_capability(dev, cap);
+	const struct device *bridge = dev->bus->dev;
+	while (bridge && (bridge->path.type == DEVICE_PATH_PCI)) {
+		assert(bridge->bus);
+		if (!pci_find_capability(bridge, cap))
+			return 0;
+		bridge = bridge->bus->dev;
+	}
+	return pos;
+}
+
 /**
  * PCI devices that are marked as "hidden" do not get probed. However, the same
  * initialization logic is still performed as if it were. This is useful when

diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c
@@ -15,8 +15,11 @@ static unsigned int pciexp_get_ext_cap_offset(const struct device *dev, unsigned
 {
 	unsigned int this_cap_offset = offset;
 	unsigned int next_cap_offset, this_cap, cafe;
-	do {
+	while (this_cap_offset != 0) {
 		this_cap = pci_read_config32(dev, this_cap_offset);
+		/* Bail out when this request is unsupported */
+		if (this_cap == 0xffffffff)
+			break;
 		cafe = pci_read_config32(dev, this_cap_offset + 4);
 		if ((this_cap & 0xffff) == cap) {
 			return this_cap_offset;
@@ -26,7 +29,7 @@ static unsigned int pciexp_get_ext_cap_offset(const struct device *dev, unsigned
 			next_cap_offset = this_cap >> 20;
 			this_cap_offset = next_cap_offset;
 		}
-	} while (next_cap_offset != 0);
+	}
 
 	return 0;
 }
@@ -185,7 +188,7 @@ static void pciexp_enable_ltr(struct device *dev)
 	unsigned int parent_cap = 0;
 	if (!dev->ops->ops_pci || !dev->ops->ops_pci->get_ltr_max_latencies) {
 		parent = dev->bus->dev;
-		parent_cap = pci_find_capability(dev, PCI_CAP_ID_PCIE);
+		parent_cap = pci_find_capability(parent, PCI_CAP_ID_PCIE);
 		if (!parent_cap)
 			return;
 	}

diff --git a/src/drivers/elog/elog.c b/src/drivers/elog/elog.c
@@ -168,7 +168,7 @@ static void elog_debug_dump_buffer(const char *msg)
 	if (!CONFIG(ELOG_DEBUG))
 		return;
 
-	elog_debug(msg);
+	elog_debug("%s", msg);
 
 	rdev = mirror_dev_get();
 

diff --git a/src/drivers/i2c/at24rf08c/lenovo.h b/src/drivers/i2c/at24rf08c/lenovo.h
@@ -1 +1,3 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 const char *lenovo_mainboard_partnumber(void);
diff --git a/src/drivers/i2c/designware/dw_i2c.c b/src/drivers/i2c/designware/dw_i2c.c
@@ -467,7 +467,7 @@ static enum cb_err dw_i2c_transfer(unsigned int bus, const struct i2c_msg *msg,
 	size_t start;
 	uint16_t addr;
 
-	if (!msg)
+	if (count == 0 || !msg)
 		return -1;
 
 	/* Break up the transfers at the differing slave address boundary. */

diff --git a/src/drivers/i2c/ptn3460/chip.h b/src/drivers/i2c/ptn3460/chip.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 struct drivers_i2c_ptn3460_config {
 
 };
diff --git a/src/drivers/intel/fsp2_0/ppi/Kconfig b/src/drivers/intel/fsp2_0/ppi/Kconfig
@@ -14,15 +14,15 @@ config MP_SERVICES_PPI_V1
 	select MP_SERVICES_PPI
 	help
 	  This option provides EFI_PEI_MP_SERVICES_PPI structure definitions
-	  along with all APIs as per EDK2 specification.
+	  along with all APIs as per edk2 specification.
 
 config MP_SERVICES_PPI_V2
 	bool
 	default n
 	select MP_SERVICES_PPI
 	help
 	  This option provides EDKII_PEI_MP_SERVICES2_PPI structure definitions
-	  along with all APIs as per EDK2 specification. MP services2 PPI is slight
+	  along with all APIs as per edk2 specification. MP services2 PPI is slight
 	  modification over MP services1 PPIs. A new API StartupAllCPUs have been
 	  added to allow running a task on BSP and all APs. Also the EFI_PEI_SERVICES
 	  parameter has been removed from all MP PPI APIs.
diff --git a/src/drivers/intel/fsp2_0/ppi/mp_service1.c b/src/drivers/intel/fsp2_0/ppi/mp_service1.c
@@ -58,7 +58,7 @@ static efi_return_status_t mps1_identify_processor(const
 	return mp_identify_processor(processor_number);
 }
 
-/* EDK2 UEFIPKG Open Source MP Service PPI to be installed */
+/* edk2 UEFIPKG Open Source MP Service PPI to be installed */
 
 static efi_pei_mp_services_ppi mp_service1_ppi = {
 	mps1_get_number_of_processors,

diff --git a/src/drivers/intel/fsp2_0/ppi/mp_service2.c b/src/drivers/intel/fsp2_0/ppi/mp_service2.c
@@ -67,7 +67,7 @@ static efi_return_status_t mps2_identify_processor(
 	return mp_identify_processor(processor_number);
 }
 
-/* EDK2 UEFIPKG Open Source MP Services 2 PPI to be installed */
+/* edk2 UEFIPKG Open Source MP Services 2 PPI to be installed */
 
 static efi_pei_mp_services_ppi mp_service2_ppi = {
 	mps2_get_number_of_processors,

diff --git a/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c b/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c
@@ -96,7 +96,7 @@ efi_return_status_t mp_startup_all_cpus(efi_ap_procedure procedure,
 	/*
 	 * Run on APs Serially
 	 *
-	 * FIXME: As per MP service specification, EDK2 is allowed to specify the mode
+	 * FIXME: As per MP service specification, edk2 is allowed to specify the mode
 	 * in which a 'func' routine should be executed on APs (i.e. execute serially
 	 * or concurrently).
 	 *

diff --git a/src/drivers/intel/fsp2_0/util.c b/src/drivers/intel/fsp2_0/util.c
@@ -33,7 +33,7 @@ static bool looks_like_fsp_header(struct fsp_header *hdr)
 		return false;
 	}
 
-	/* It is possible to build FSP with any version of EDK2 which could have introduced new
+	/* It is possible to build FSP with any version of edk2 which could have introduced new
 	   fields in FSP_INFO_HEADER. The new fields will be ignored based on the reported FSP
 	   version. This check ensures that the reported header length is at least what the
 	   reported FSP version requires so that we do not access any out-of-bound bytes. */

diff --git a/src/drivers/intel/gma/edid.h b/src/drivers/intel/gma/edid.h
@@ -1,2 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 void intel_gmbus_read_edid(u8 *gmbus_mmio, u8 bus, u8 slave, u8 *edid, u32 edid_size);
 void intel_gmbus_stop(u8 *gmbus_mmio);
diff --git a/src/drivers/nxp/uwb/Kconfig b/src/drivers/nxp/uwb/Kconfig
@@ -0,0 +1,30 @@
+config DRIVERS_NXP_UWB_SR1XX
+	bool "NXP UWB SR1xx driver"
+	help
+	  Enable support for a NXP UWB SR1xx (e.g., SR150) chip.
+
+	  A configuration should be added to device tree like below:
+	  device ref gspi0 on
+	          chip drivers/nxp/uwb
+	                  # The ACPI name of the device.  Note it will be
+	                  # truncated to 4 characters if a longer name is given.
+	                  register "name" = ""UWB0""
+
+	                  # Description of the module.
+	                  register "desc" = ""NXP UWB Module""
+
+	                  # SPI bus speed (in Hz).
+	                  register "speed" = "1000000"
+
+	                  # The GPIO connected to SENSORINT.
+	                  register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_HIGH(GPP_F21)"
+
+	                  # The GPIO connected to CHIP_EN.
+	                  register "ce_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A12)"
+
+	                  # The GPIO connected to WAKEUP.
+	                  register "ri_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A7)"
+
+	                  device spi 0 on end
+	          end
+	  end
diff --git a/src/drivers/nxp/uwb/Makefile.inc b/src/drivers/nxp/uwb/Makefile.inc
@@ -0,0 +1 @@
+ramstage-$(CONFIG_DRIVER_NXP_UWB_SR1XX) += uwb.c
diff --git a/src/drivers/nxp/uwb/chip.h b/src/drivers/nxp/uwb/chip.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __NXP_UWB_CHIP_H__
+#define __NXP_UWB_CHIP_H__
+
+#include <acpi/acpi_device.h>
+
+struct drivers_nxp_uwb_config {
+	/* ACPI Device Name */
+	const char *name;
+
+	/* Device Description */
+	const char *desc;
+
+	/* ACPI _UID */
+	unsigned int uid;
+
+	/* Bus speed in Hz (default 1MHz) */
+	unsigned int speed;
+
+	/* Use GPIO based interrupt instead of PIRQ */
+	struct acpi_gpio irq_gpio;
+	struct acpi_gpio ce_gpio;
+	struct acpi_gpio ri_gpio;
+};
+
+#endif /* __NXP_UWB_CHIP_H__ */
diff --git a/src/drivers/nxp/uwb/uwb.c b/src/drivers/nxp/uwb/uwb.c
@@ -0,0 +1,138 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi_device.h>
+#include <acpi/acpigen.h>
+#include <console/console.h>
+#include <device/device.h>
+#include <device/path.h>
+#include <device/spi.h>
+#include <spi-generic.h>
+#include <string.h>
+#include "chip.h"
+
+static int spi_acpi_get_bus(const struct device *dev)
+{
+	struct device *spi_dev;
+	struct device_operations *ops;
+
+	if (!dev->bus || !dev->bus->dev)
+		return -1;
+
+	spi_dev = dev->bus->dev;
+	ops = spi_dev->ops;
+
+	if (ops && ops->ops_spi_bus && ops->ops_spi_bus->dev_to_bus)
+		return ops->ops_spi_bus->dev_to_bus(spi_dev);
+
+	return -1;
+}
+
+static int write_gpio(struct acpi_gpio *gpio, int *curr_index)
+{
+	int ret = -1;
+
+	if (gpio->pin_count == 0)
+		return ret;
+
+	acpi_device_write_gpio(gpio);
+	ret = *curr_index;
+	(*curr_index)++;
+
+	return ret;
+}
+
+static void nxp_uwb_fill_ssdt(const struct device *dev)
+{
+	struct drivers_nxp_uwb_config *config = dev->chip_info;
+	const char *scope = acpi_device_scope(dev);
+	const char *path = acpi_device_path(dev);
+	struct acpi_spi spi = {
+		.device_select = dev->path.spi.cs,
+		.speed = config->speed ? : 1 * MHz,
+		.resource = scope,
+		.device_select_polarity = SPI_POLARITY_LOW,
+		.wire_mode = SPI_4_WIRE_MODE,
+		.data_bit_length = 8,
+		.clock_phase = SPI_CLOCK_PHASE_FIRST,
+		.clock_polarity = SPI_POLARITY_LOW,
+	};
+	int curr_index = 0;
+	int irq_gpio_index = -1;
+	int ce_gpio_index = -1;
+	int ri_gpio_index = -1;
+
+	if (!scope)
+		return;
+
+	if (spi_acpi_get_bus(dev) == -1) {
+		printk(BIOS_ERR, "%s: Cannot get bus for device.\n",
+		       dev_path(dev));
+		return;
+	}
+
+	/* Device */
+	acpigen_write_scope(scope);
+	acpigen_write_device(acpi_device_name(dev));
+	acpigen_write_name_string("_HID", ACPI_DT_NAMESPACE_HID);
+	acpigen_write_name_integer("_UID", config->uid);
+	if (config->desc)
+		acpigen_write_name_string("_DDN", config->desc);
+	acpigen_write_STA(acpi_device_status(dev));
+
+	/* Resources */
+	acpigen_write_name("_CRS");
+	acpigen_write_resourcetemplate_header();
+	acpi_device_write_spi(&spi);
+	irq_gpio_index = write_gpio(&config->irq_gpio, &curr_index);
+	ce_gpio_index = write_gpio(&config->ce_gpio, &curr_index);
+	ri_gpio_index = write_gpio(&config->ri_gpio, &curr_index);
+	acpigen_write_resourcetemplate_footer();
+
+	struct acpi_dp *dsd = acpi_dp_new_table("_DSD");
+	acpi_dp_add_string(dsd, "compatible", "nxp,sr1xx");
+	acpi_dp_add_gpio(dsd, "nxp,sr1xx-irq-gpios", path, irq_gpio_index, 0,
+			 config->irq_gpio.active_low);
+
+	acpi_dp_add_gpio(dsd, "nxp,sr1xx-ce-gpios", path, ce_gpio_index, 0,
+			 config->ce_gpio.active_low);
+
+	acpi_dp_add_gpio(dsd, "nxp,sr1xx-ri-gpios", path, ri_gpio_index, 0,
+			 config->ri_gpio.active_low);
+	acpi_dp_write(dsd);
+
+	acpigen_write_device_end();
+	acpigen_write_scope_end();
+
+	printk(BIOS_INFO, "%s: %s at %s\n", path,
+	       config->desc ? : dev->chip_ops->name, dev_path(dev));
+}
+
+static const char *nxp_uwb_name(const struct device *dev)
+{
+	struct drivers_nxp_uwb_config *config = dev->chip_info;
+	static char name[ACPI_NAME_BUFFER_SIZE];
+
+	if (config->name)
+		snprintf(name, sizeof(name), "%s", config->name);
+	else
+		snprintf(name, sizeof(name), "UWB%1X", spi_acpi_get_bus(dev));
+	name[4] = '\0';
+	return name;
+}
+
+static struct device_operations nxp_uwb_ops = {
+	.read_resources		= noop_read_resources,
+	.set_resources		= noop_set_resources,
+	.acpi_name		= nxp_uwb_name,
+	.acpi_fill_ssdt		= nxp_uwb_fill_ssdt,
+};
+
+static void nxb_uwb_enable(struct device *dev)
+{
+	dev->ops = &nxp_uwb_ops;
+}
+
+struct chip_operations drivers_nxp_uwb_ops = {
+	CHIP_NAME("NXP UWB Device")
+	.enable_dev = nxb_uwb_enable
+};
diff --git a/src/drivers/smmstore/Kconfig b/src/drivers/smmstore/Kconfig
@@ -3,13 +3,13 @@
 config SMMSTORE
 	bool "Support for flash based, SMM mediated data store"
 	depends on BOOT_DEVICE_SUPPORTS_WRITES && HAVE_SMI_HANDLER
-	default y if PAYLOAD_TIANOCORE
+	default y if PAYLOAD_EDK2
 	select SPI_FLASH_SMM if BOOT_DEVICE_SPI_FLASH_RW_NOMMAP
 
 config SMMSTORE_V2
 	bool "Use version 2 of SMMSTORE API"
 	depends on SMMSTORE
-	default y if TIANOCORE_UEFIPAYLOAD
+	default y if PAYLOAD_EDK2
 	default n
 	help
 	  Version 2 of SMMSTORE allows secure communication with SMM and

diff --git a/src/drivers/smmstore/store.c b/src/drivers/smmstore/store.c
@@ -311,7 +311,7 @@ int smmstore_get_info(struct smmstore_params_info *out)
 	out->block_size = SMM_BLOCK_SIZE;
 	out->num_blocks = region_device_sz(&store) / SMM_BLOCK_SIZE;
 
-	/* FIXME: Broken EDK2 always assumes memory mapped Firmware Block Volumes */
+	/* FIXME: Broken edk2 always assumes memory mapped Firmware Block Volumes */
 	out->mmap_addr = (uintptr_t)rdev_mmap_full(&store);
 
 	printk(BIOS_DEBUG, "smm store: %d # blocks with size 0x%x\n",

diff --git a/src/drivers/tpm/Kconfig b/src/drivers/tpm/Kconfig
@@ -12,7 +12,7 @@ config TPM_PPI
 	depends on TPM
 	depends on HAVE_ACPI_TABLES
 	depends on !CHROMEOS
-	default y if PAYLOAD_TIANOCORE
+	default y if PAYLOAD_EDK2
 	help
 	  This driver automatically generates ACPI tables for the Physical
 	  Presence Interface defined by the TCG. If not activated only a stub

diff --git a/src/drivers/wifi/generic/acpi.c b/src/drivers/wifi/generic/acpi.c
@@ -517,21 +517,19 @@ static void wifi_ssdt_write_properties(const struct device *dev, const char *sco
 	/* Scope */
 	acpigen_write_scope(scope);
 
-	if (dev->path.type == DEVICE_PATH_GENERIC) {
-		if (config) {
-			/* Wake capabilities */
-			acpigen_write_PRW(config->wake, ACPI_S3);
-
-			/* Add _DSD for DmaProperty property. */
-			if (config->is_untrusted) {
-				struct acpi_dp *dsd, *pkg;
-
-				dsd = acpi_dp_new_table("_DSD");
-				pkg = acpi_dp_new_table(ACPI_DSD_DMA_PROPERTY_UUID);
-				acpi_dp_add_integer(pkg, "DmaProperty", 1);
-				acpi_dp_add_package(dsd, pkg);
-				acpi_dp_write(dsd);
-			}
+	if (config) {
+		/* Wake capabilities */
+		acpigen_write_PRW(config->wake, ACPI_S3);
+
+		/* Add _DSD for DmaProperty property. */
+		if (config->is_untrusted) {
+			struct acpi_dp *dsd, *pkg;
+
+			dsd = acpi_dp_new_table("_DSD");
+			pkg = acpi_dp_new_table(ACPI_DSD_DMA_PROPERTY_UUID);
+			acpi_dp_add_integer(pkg, "DmaProperty", 1);
+			acpi_dp_add_package(dsd, pkg);
+			acpi_dp_write(dsd);
 		}
 	}
 
@@ -603,9 +601,7 @@ void wifi_pcie_fill_ssdt(const struct device *dev)
 		return;
 
 	wifi_ssdt_write_device(dev, path);
-	const struct device *child = dev->link_list->children;
-	if (child && child->path.type == DEVICE_PATH_GENERIC)
-		wifi_ssdt_write_properties(child, path);
+	wifi_ssdt_write_properties(dev, path);
 }
 
 const char *wifi_pcie_acpi_name(const struct device *dev)

diff --git a/src/drivers/wifi/generic/generic.c b/src/drivers/wifi/generic/generic.c
@@ -21,7 +21,6 @@ struct device_operations wifi_pcie_ops = {
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= wifi_pci_dev_init,
 	.ops_pci		= &pci_dev_ops_pci,
-	.scan_bus		= scan_static_bus,
 #if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name		= wifi_pcie_acpi_name,
 	.acpi_fill_ssdt		= wifi_pcie_fill_ssdt,
@@ -42,11 +41,6 @@ struct device_operations wifi_cnvi_ops = {
 #endif
 };
 
-struct device_operations wifi_generic_ops = {
-	.read_resources		= noop_read_resources,
-	.set_resources		= noop_set_resources,
-};
-
 static bool is_cnvi(const struct device *dev)
 {
 	return dev && dev->path.type != DEVICE_PATH_PCI;
@@ -66,11 +60,10 @@ bool wifi_generic_cnvi_ddr_rfim_enabled(const struct device *dev)
 static void wifi_generic_enable(struct device *dev)
 {
 #if !DEVTREE_EARLY
-	const struct device *parent = dev->bus->dev;
-	if (parent && parent->ops == &wifi_pcie_ops)
-		dev->ops = &wifi_generic_ops;
-	else
+	if (is_cnvi(dev))
 		dev->ops = &wifi_cnvi_ops;
+	else
+		dev->ops = &wifi_pcie_ops;
 #endif
 }
 

diff --git a/src/include/asan.h b/src/include/asan.h
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0 */
+/* SPDX-License-Identifier: GPL-2.0-only */
 
 #ifndef __ASAN_H
 #define __ASAN_H

diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef COREBOOT_TABLES_H
 #define COREBOOT_TABLES_H
 

diff --git a/src/include/boot/tables.h b/src/include/boot/tables.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef BOOT_TABLES_H
 #define BOOT_TABLES_H
 

diff --git a/src/include/console/qemu_debugcon.h b/src/include/console/qemu_debugcon.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef _QEMU_DEBUGCON_H_
 #define _QEMU_DEBUGCON_H_
 

diff --git a/src/include/console/spkmodem.h b/src/include/console/spkmodem.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef SPKMODEM_H
 #define SPKMODEM_H 1
 

diff --git a/src/include/console/system76_ec.h b/src/include/console/system76_ec.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef CONSOLE_SYSTEM76_EC_H
 #define CONSOLE_SYSTEM76_EC_H 1
 

diff --git a/src/include/cpu/amd/microcode.h b/src/include/cpu/amd/microcode.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef CPU_AMD_MICROCODE_H
 #define CPU_AMD_MICROCODE_H
 

diff --git a/src/include/cpu/amd/mtrr.h b/src/include/cpu/amd/mtrr.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef CPU_AMD_MTRR_H
 #define CPU_AMD_MTRR_H
 

diff --git a/src/include/cpu/cpu.h b/src/include/cpu/cpu.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef CPU_CPU_H
 #define CPU_CPU_H
 

diff --git a/src/include/cpu/intel/hyperthreading.h b/src/include/cpu/intel/hyperthreading.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef CPU_INTEL_HYPERTHREADING_H
 #define CPU_INTEL_HYPERTHREADING_H
 

diff --git a/src/include/cpu/power/scom.h b/src/include/cpu/power/scom.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
 #ifndef CPU_PPC64_SCOM_H
 #define CPU_PPC64_SCOM_H
 

diff --git a/src/include/cpu/power/spr.h b/src/include/cpu/power/spr.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
 #ifndef CPU_PPC64_SPR_H
 #define CPU_PPC64_SPR_H
 

diff --git a/src/include/cpu/x86/bist.h b/src/include/cpu/x86/bist.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef CPU_X86_BIST_H
 #define CPU_X86_BIST_H
 

diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef CPU_X86_LAPIC_H
 #define CPU_X86_LAPIC_H
 

diff --git a/src/include/cpu/x86/lapic_def.h b/src/include/cpu/x86/lapic_def.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef CPU_X86_LAPIC_DEF_H
 #define CPU_X86_LAPIC_DEF_H
 

diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef CPU_X86_MSR_H
 #define CPU_X86_MSR_H
 

diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef CPU_X86_MTRR_H
 #define CPU_X86_MTRR_H
 

diff --git a/src/include/cpu/x86/post_code.h b/src/include/cpu/x86/post_code.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef __X86_POST_CODE_H__
 #define __X86_POST_CODE_H__
 

diff --git a/src/include/cpu/x86/tsc.h b/src/include/cpu/x86/tsc.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef CPU_X86_TSC_H
 #define CPU_X86_TSC_H
 

diff --git a/src/include/ctype.h b/src/include/ctype.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef CTYPE_H
 #define CTYPE_H
 

diff --git a/src/include/delay.h b/src/include/delay.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef DELAY_H
 #define DELAY_H
 

diff --git a/src/include/device/cardbus.h b/src/include/device/cardbus.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 /* (c) 2005 Linux Networx GPL see COPYING for details */
 
 #ifndef DEVICE_CARDBUS_H

diff --git a/src/include/device/device.h b/src/include/device/device.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef DEVICE_H
 
 #define DEVICE_H

diff --git a/src/include/device/path.h b/src/include/device/path.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef DEVICE_PATH_H
 #define DEVICE_PATH_H
 

diff --git a/src/include/device/pci.h b/src/include/device/pci.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 /*
  *	PCI defines and function prototypes
  *	Copyright 1994, Drew Eckhardt
@@ -95,6 +97,7 @@ void pci_dev_set_subsystem(struct device *dev, unsigned int vendor,
 	unsigned int device);
 void pci_dev_init(struct device *dev);
 unsigned int pci_match_simple_dev(struct device *dev, pci_devfn_t sdev);
+uint16_t pci_find_cap_recursive(const struct device *dev, uint16_t cap);
 
 const char *pin_to_str(int pin);
 int get_pci_irq_pins(struct device *dev, struct device **parent_bdg);

diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef PCI_DEF_H
 #define PCI_DEF_H
 

diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
@@ -2976,57 +2976,57 @@
 #define PCI_DID_INTEL_MCC_ESPI_3			0x4b06
 #define PCI_DID_INTEL_MCC_ESPI_4			0x4b07
 #define PCI_DID_INTEL_JSP_SUPER_ESPI			0x4d87
-#define PCI_DID_INTEL_ADP_P_ESPI_0			0x7a00
-#define PCI_DID_INTEL_ADP_P_ESPI_1			0x7a01
-#define PCI_DID_INTEL_ADP_P_ESPI_2			0x7a02
-#define PCI_DID_INTEL_ADP_P_ESPI_3			0x7a03
-#define PCI_DID_INTEL_ADP_P_ESPI_4			0x7a04
-#define PCI_DID_INTEL_ADP_P_ESPI_5			0x7a05
-#define PCI_DID_INTEL_ADP_P_ESPI_6			0x7a06
-#define PCI_DID_INTEL_ADP_P_ESPI_7			0x7a07
-#define PCI_DID_INTEL_ADP_P_ESPI_8			0x7a08
-#define PCI_DID_INTEL_ADP_P_ESPI_9			0x7a09
-#define PCI_DID_INTEL_ADP_P_ESPI_10			0x7a0a
-#define PCI_DID_INTEL_ADP_P_ESPI_11			0x7a0b
-#define PCI_DID_INTEL_ADP_P_ESPI_12			0x7a0c
-#define PCI_DID_INTEL_ADP_P_ESPI_13			0x7a0d
-#define PCI_DID_INTEL_ADP_P_ESPI_14			0x7a0e
-#define PCI_DID_INTEL_ADP_P_ESPI_15			0x7a0f
-#define PCI_DID_INTEL_ADP_P_ESPI_16			0x7a10
-#define PCI_DID_INTEL_ADP_P_ESPI_17			0x7a11
-#define PCI_DID_INTEL_ADP_P_ESPI_18			0x7a12
-#define PCI_DID_INTEL_ADP_P_ESPI_19			0x7a13
-#define PCI_DID_INTEL_ADP_P_ESPI_20			0x7a14
-#define PCI_DID_INTEL_ADP_P_ESPI_21			0x7a15
-#define PCI_DID_INTEL_ADP_P_ESPI_22			0x7a16
-#define PCI_DID_INTEL_ADP_P_ESPI_23			0x7a17
-#define PCI_DID_INTEL_ADP_P_ESPI_24			0x7a18
-#define PCI_DID_INTEL_ADP_P_ESPI_25			0x7a19
-#define PCI_DID_INTEL_ADP_P_ESPI_26			0x7a1a
-#define PCI_DID_INTEL_ADP_P_ESPI_27			0x7a1b
-#define PCI_DID_INTEL_ADP_P_ESPI_28			0x7a1c
-#define PCI_DID_INTEL_ADP_P_ESPI_29			0x7a1d
-#define PCI_DID_INTEL_ADP_P_ESPI_30			0x7a1e
-#define PCI_DID_INTEL_ADP_P_ESPI_31			0x7a1f
+#define PCI_DID_INTEL_RPP_S_ESPI_0			0x7a00
+#define PCI_DID_INTEL_RPP_S_ESPI_1			0x7a01
+#define PCI_DID_INTEL_RPP_S_ESPI_2			0x7a02
+#define PCI_DID_INTEL_RPP_S_ESPI_3			0x7a03
+#define PCI_DID_INTEL_RPP_S_ESPI_4			0x7a04
+#define PCI_DID_INTEL_RPP_S_ESPI_5			0x7a05
+#define PCI_DID_INTEL_RPP_S_ESPI_6			0x7a06
+#define PCI_DID_INTEL_RPP_S_ESPI_7			0x7a07
+#define PCI_DID_INTEL_RPP_S_ESPI_8			0x7a08
+#define PCI_DID_INTEL_RPP_S_ESPI_9			0x7a09
+#define PCI_DID_INTEL_RPP_S_ESPI_10			0x7a0a
+#define PCI_DID_INTEL_RPP_S_ESPI_11			0x7a0b
+#define PCI_DID_INTEL_RPP_S_ESPI_HM770			0x7a0c
+#define PCI_DID_INTEL_RPP_S_ESPI_WM790			0x7a0d
+#define PCI_DID_INTEL_RPP_S_ESPI_14			0x7a0e
+#define PCI_DID_INTEL_RPP_S_ESPI_15			0x7a0f
+#define PCI_DID_INTEL_RPP_S_ESPI_16			0x7a10
+#define PCI_DID_INTEL_RPP_S_ESPI_17			0x7a11
+#define PCI_DID_INTEL_RPP_S_ESPI_18			0x7a12
+#define PCI_DID_INTEL_RPP_S_ESPI_19			0x7a13
+#define PCI_DID_INTEL_RPP_S_ESPI_20			0x7a14
+#define PCI_DID_INTEL_RPP_S_ESPI_21			0x7a15
+#define PCI_DID_INTEL_RPP_S_ESPI_22			0x7a16
+#define PCI_DID_INTEL_RPP_S_ESPI_23			0x7a17
+#define PCI_DID_INTEL_RPP_S_ESPI_24			0x7a18
+#define PCI_DID_INTEL_RPP_S_ESPI_25			0x7a19
+#define PCI_DID_INTEL_RPP_S_ESPI_26			0x7a1a
+#define PCI_DID_INTEL_RPP_S_ESPI_27			0x7a1b
+#define PCI_DID_INTEL_RPP_S_ESPI_28			0x7a1c
+#define PCI_DID_INTEL_RPP_S_ESPI_29			0x7a1d
+#define PCI_DID_INTEL_RPP_S_ESPI_30			0x7a1e
+#define PCI_DID_INTEL_RPP_S_ESPI_31			0x7a1f
 #define PCI_DID_INTEL_ADP_S_ESPI_0			0x7a80
 #define PCI_DID_INTEL_ADP_S_ESPI_1			0x7a81
 #define PCI_DID_INTEL_ADP_S_ESPI_2			0x7a82
-#define PCI_DID_INTEL_ADP_S_ESPI_3			0x7a83
-#define PCI_DID_INTEL_ADP_S_ESPI_4			0x7a84
-#define PCI_DID_INTEL_ADP_S_ESPI_5			0x7a85
-#define PCI_DID_INTEL_ADP_S_ESPI_6			0x7a86
-#define PCI_DID_INTEL_ADP_S_ESPI_7			0x7a87
-#define PCI_DID_INTEL_ADP_S_ESPI_8			0x7a88
+#define PCI_DID_INTEL_ADP_S_ESPI_Q670			0x7a83
+#define PCI_DID_INTEL_ADP_S_ESPI_Z690			0x7a84
+#define PCI_DID_INTEL_ADP_S_ESPI_H670			0x7a85
+#define PCI_DID_INTEL_ADP_S_ESPI_B660			0x7a86
+#define PCI_DID_INTEL_ADP_S_ESPI_H610			0x7a87
+#define PCI_DID_INTEL_ADP_S_ESPI_W680			0x7a88
 #define PCI_DID_INTEL_ADP_S_ESPI_9			0x7a89
-#define PCI_DID_INTEL_ADP_S_ESPI_10			0x7a8a
+#define PCI_DID_INTEL_ADP_S_ESPI_W685			0x7a8a
 #define PCI_DID_INTEL_ADP_S_ESPI_11			0x7a8b
-#define PCI_DID_INTEL_ADP_S_ESPI_12			0x7a8c
-#define PCI_DID_INTEL_ADP_S_ESPI_13			0x7a8d
+#define PCI_DID_INTEL_ADP_S_ESPI_HM670			0x7a8c
+#define PCI_DID_INTEL_ADP_S_ESPI_WM690			0x7a8d
 #define PCI_DID_INTEL_ADP_S_ESPI_14			0x7a8e
 #define PCI_DID_INTEL_ADP_S_ESPI_15			0x7a8f
-#define PCI_DID_INTEL_ADP_S_ESPI_16			0x7a90
-#define PCI_DID_INTEL_ADP_S_ESPI_17			0x7a91
-#define PCI_DID_INTEL_ADP_S_ESPI_18			0x7a92
+#define PCI_DID_INTEL_ADP_S_ESPI_R680E			0x7a90
+#define PCI_DID_INTEL_ADP_S_ESPI_Q670E			0x7a91
+#define PCI_DID_INTEL_ADP_S_ESPI_H610E			0x7a92
 #define PCI_DID_INTEL_ADP_S_ESPI_19			0x7a93
 #define PCI_DID_INTEL_ADP_S_ESPI_20			0x7a94
 #define PCI_DID_INTEL_ADP_S_ESPI_21			0x7a95
@@ -3040,17 +3040,6 @@
 #define PCI_DID_INTEL_ADP_S_ESPI_29			0x7a9d
 #define PCI_DID_INTEL_ADP_S_ESPI_30			0x7a9e
 #define PCI_DID_INTEL_ADP_S_ESPI_31			0x7a9f
-#define PCI_DID_INTEL_ADP_S_H610			0x7a87
-#define PCI_DID_INTEL_ADP_S_B660			0x7a86
-#define PCI_DID_INTEL_ADP_S_H670			0x7a85
-#define PCI_DID_INTEL_ADP_S_Q670			0x7a83
-#define PCI_DID_INTEL_ADP_S_Z690			0x7a84
-#define PCI_DID_INTEL_ADP_S_W680			0x7a88
-#define PCI_DID_INTEL_ADP_S_W685			0x7a8a
-#define PCI_DID_INTEL_ADP_S_WM690			0x7a8d
-#define PCI_DID_INTEL_ADP_S_HM670			0x7a8c
-#define PCI_DID_INTEL_ADP_S_WM790			0x7a0d
-#define PCI_DID_INTEL_ADP_S_HM770			0x7a0c
 #define PCI_DID_INTEL_ADP_M_N_ESPI_0			0x5480
 #define PCI_DID_INTEL_ADP_M_N_ESPI_1			0x5481
 #define PCI_DID_INTEL_ADP_M_N_ESPI_2			0x5482

diff --git a/src/include/device/pci_rom.h b/src/include/device/pci_rom.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef PCI_ROM_H
 #define PCI_ROM_H
 

diff --git a/src/include/device/pciexp.h b/src/include/device/pciexp.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef DEVICE_PCIEXP_H
 #define DEVICE_PCIEXP_H
 /* (c) 2005 Linux Networx GPL see COPYING for details */

diff --git a/src/include/device/pcix.h b/src/include/device/pcix.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef DEVICE_PCIX_H
 #define DEVICE_PCIX_H
 /* (c) 2005 Linux Networx GPL see COPYING for details */

diff --git a/src/include/device/pnp.h b/src/include/device/pnp.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef DEVICE_PNP_H
 #define DEVICE_PNP_H
 

diff --git a/src/include/device/pnp_def.h b/src/include/device/pnp_def.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef DEVICE_PNP_DEF_H
 #define DEVICE_PNP_DEF_H
 

diff --git a/src/include/device/resource.h b/src/include/device/resource.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef DEVICE_RESOURCE_H
 #define DEVICE_RESOURCE_H
 

diff --git a/src/include/device/smbus.h b/src/include/device/smbus.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef DEVICE_SMBUS_H
 #define DEVICE_SMBUS_H
 

diff --git a/src/include/device/smbus_def.h b/src/include/device/smbus_def.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef DEVICE_SMBUS_DEF_H
 #define DEVICE_SMBUS_DEF_H
 

diff --git a/src/include/fallback.h b/src/include/fallback.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef FALLBACK_H
 #define FALLBACK_H
 

diff --git a/src/include/imd_private.h b/src/include/imd_private.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef _IMD_PRIVATE_H_
 #define _IMD_PRIVATE_H_
 

diff --git a/src/include/ip_checksum.h b/src/include/ip_checksum.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef IP_CHECKSUM_H
 #define IP_CHECKSUM_H
 unsigned long compute_ip_checksum(const void *addr, unsigned long length);

diff --git a/src/include/limits.h b/src/include/limits.h
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0 */
+/* SPDX-License-Identifier: GPL-2.0-only */
 
 #ifndef LIMITS_H
 #define LIMITS_H

diff --git a/src/include/main_decl.h b/src/include/main_decl.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef _MAIN_DECL_H_
 #define _MAIN_DECL_H_
 

diff --git a/src/include/pc80/isa-dma.h b/src/include/pc80/isa-dma.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef PC80_ISA_DMA_H
 #define PC80_ISA_DMA_H
 

diff --git a/src/include/pc80/keyboard.h b/src/include/pc80/keyboard.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef PC80_KEYBOARD_H
 #define PC80_KEYBOARD_H
 

diff --git a/src/include/reset.h b/src/include/reset.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef RESET_H
 #define RESET_H
 

diff --git a/src/include/smmstore.h b/src/include/smmstore.h
@@ -53,7 +53,7 @@ struct smmstore_params_init {
 
 /*
  * Returns the number of blocks the SMMSTORE supports and their size.
- * For EDK2 this should be at least two blocks with 64 KiB each.
+ * For edk2 this should be at least two blocks with 64 KiB each.
  * The mmap_addr is set the memory mapped physical address of the SMMSTORE.
  */
 struct smmstore_params_info {

diff --git a/src/include/smp/atomic.h b/src/include/smp/atomic.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef SMP_ATOMIC_H
 #define SMP_ATOMIC_H
 

diff --git a/src/include/smp/node.h b/src/include/smp/node.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef _SMP_NODE_H_
 #define _SMP_NODE_H_
 

diff --git a/src/include/smp/spinlock.h b/src/include/smp/spinlock.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef SMP_SPINLOCK_H
 #define SMP_SPINLOCK_H
 

diff --git a/src/include/stddef.h b/src/include/stddef.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef STDDEF_H
 #define STDDEF_H
 

diff --git a/src/include/stdlib.h b/src/include/stdlib.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef STDLIB_H
 #define STDLIB_H
 

diff --git a/src/include/swab.h b/src/include/swab.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 /*
  * linux/byteorder/swab.h
  * Byte-swapping, independently from CPU endianness

diff --git a/src/include/sys/types.h b/src/include/sys/types.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef __SYS_TYPES_H__
 #define __SYS_TYPES_H__
 

diff --git a/src/include/timer.h b/src/include/timer.h
@@ -17,7 +17,7 @@
  * outside of the core timer code is not supported. */
 
 struct mono_time {
-	long microseconds;
+	uint64_t microseconds;
 };
 
 /* A timeout_callback structure is used for the book keeping for scheduling

diff --git a/src/include/vbe.h b/src/include/vbe.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
 /******************************************************************************
  * Copyright (c) 2004, 2008 IBM Corporation
  * Copyright (c) 2009 Pattrick Hueper <phueper@hueper.net>

diff --git a/src/include/version.h b/src/include/version.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef VERSION_H
 #define VERSION_H
 

diff --git a/src/include/watchdog.h b/src/include/watchdog.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #ifndef WATCHDOG_H
 #define WATCHDOG_H
 

diff --git a/src/lib/cb.ads b/src/lib/cb.ads
@@ -1,2 +1,4 @@
+-- SPDX-License-Identifier: GPL-2.0-or-later
+
 package CB is
 end CB;
diff --git a/src/lib/compute_ip_checksum.c b/src/lib/compute_ip_checksum.c
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #include <stdint.h>
 #include <ip_checksum.h>
 

diff --git a/src/lib/delay.c b/src/lib/delay.c
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #include <delay.h>
 void mdelay(unsigned int msecs)
 {

diff --git a/src/lib/fallback_boot.c b/src/lib/fallback_boot.c
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #include <fallback.h>
 #include <watchdog.h>
 

diff --git a/src/lib/gcov-io.c b/src/lib/gcov-io.c
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-3.0-only WITH GCC-exception-3.1 */
+
 /* File format for coverage information
    Copyright (C) 1996, 1997, 1998, 2000, 2002, 2003, 2004, 2005, 2007,
    2008  Free Software Foundation, Inc.

diff --git a/src/lib/gcov-io.h b/src/lib/gcov-io.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-3.0-only WITH GCC-exception-3.1 */
+
 /* File format for coverage information
    Copyright (C) 1996, 1997, 1998, 2000, 2002,
    2003, 2004, 2005, 2008, 2009 Free Software Foundation, Inc.

diff --git a/src/lib/gcov-iov.h b/src/lib/gcov-iov.h
@@ -1,3 +1,7 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update this license if any licensable material is added. */
+
 /* Generated automatically by the program `build/gcov-iov'
    from `4.7.2 (4 7) and  (*)'.  */
 

diff --git a/src/lib/libgcov.c b/src/lib/libgcov.c
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-3.0-only WITH GCC-exception-3.1 */
+
 /* Routines required for instrumenting a program.  */
 /* Compile this one with gcc.  */
 /* Copyright (C) 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,

diff --git a/src/lib/lzma.c b/src/lib/lzma.c
@@ -1,8 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
 /*
  * coreboot interface to memory-saving variant of LZMA decoder
  *
  * Copyright (C) 2006 Carl-Daniel Hailfinger
- * Released under the GNU GPL v2 or later
  *
  * Parts of this file are based on C/7zip/Compress/LZMA_C/LzmaTest.c from the
  * LZMA SDK 4.42, which is written and distributed to public domain by Igor

diff --git a/src/lib/malloc.c b/src/lib/malloc.c
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #include <console/console.h>
 #include <stdlib.h>
 #include <string.h>

diff --git a/src/lib/memchr.c b/src/lib/memchr.c
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #include <string.h>
 void *memchr(const void *s, int c, size_t n)
 {

diff --git a/src/lib/memcmp.c b/src/lib/memcmp.c
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #include <string.h>
 
 int memcmp(const void *src1, const void *src2, size_t bytes)

diff --git a/src/lib/memcpy.c b/src/lib/memcpy.c
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #include <string.h>
 void *memcpy(void *vdest, const void *vsrc, size_t bytes)
 {

diff --git a/src/lib/memmove.c b/src/lib/memmove.c
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #include <string.h>
 void *memmove(void *vdest, const void *vsrc, size_t count)
 {

diff --git a/src/lib/memset.c b/src/lib/memset.c
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #include <string.h>
 
 void *memset(void *s, int c, size_t n)

diff --git a/src/lib/ramtest.c b/src/lib/ramtest.c
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #include <stdint.h>
 #include <lib.h>
 #include <console/console.h>

diff --git a/src/lib/rmodule.ld b/src/lib/rmodule.ld
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 /*
  * This linker script is used to link rmodules (relocatable modules).  It
  * links at zero so that relocation fixups are easy when placing the binaries

diff --git a/src/lib/string.c b/src/lib/string.c
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #include <assert.h>
 #include <ctype.h>
 #include <string.h>

diff --git a/src/lib/version.c b/src/lib/version.c
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #include <version.h>
 #include <build.h>
 

diff --git a/src/mainboard/51nb/x210/dsdt.asl b/src/mainboard/51nb/x210/dsdt.asl
@@ -8,7 +8,7 @@ DefinitionBlock(
 	ACPI_DSDT_REV_2,
 	OEM_ID,
 	ACPI_TABLE_CREATOR,
-	0x20110725	// OEM revision
+	0x20110725
 )
 {
 	#include <acpi/dsdt_top.asl>

diff --git a/src/mainboard/acer/g43t-am3/acpi/ec.asl b/src/mainboard/acer/g43t-am3/acpi/ec.asl
@@ -1 +1,5 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
+
 /* dummy */
diff --git a/src/mainboard/amd/bilby/dsdt.asl b/src/mainboard/amd/bilby/dsdt.asl
@@ -14,8 +14,6 @@ DefinitionBlock (
 	)
 {	/* Start of ASL file */
 	#include <acpi/dsdt_top.asl>
-
-	/* global NVS and variables */
 	#include <globalnvs.asl>
 
 	/* PCI IRQ mapping for the Southbridge */

diff --git a/src/mainboard/amd/chausie/Kconfig b/src/mainboard/amd/chausie/Kconfig
@@ -6,7 +6,7 @@ config BOARD_SPECIFIC_OPTIONS
 	def_bool y
 	select BOARD_ROMSIZE_KB_16384
 	select EC_ACPI
-	select SOC_AMD_SABRINA
+	select SOC_AMD_MENDOCINO
 	select SOC_AMD_COMMON_BLOCK_USE_ESPI
 	select AMD_SOC_CONSOLE_UART
 	select MAINBOARD_HAS_CHROMEOS
@@ -36,7 +36,7 @@ config CHAUSIE_HAVE_MCHP_FW
 	default n
 
 config CHAUSIE_MCHP_SIG_FILE
-	string
+	string "Microchip EC signature file"
 	depends on CHAUSIE_HAVE_MCHP_FW
 	default "3rdparty/blobs/mainboard/amd/chausie/EC_chausie_sig.bin"
 	help
@@ -45,7 +45,7 @@ config CHAUSIE_MCHP_SIG_FILE
 	  is located
 
 config CHAUSIE_MCHP_FW_FILE
-	string
+	string "Microchip EC firmware file"
 	depends on CHAUSIE_HAVE_MCHP_FW
 	default "3rdparty/blobs/mainboard/amd/chausie/EC_chausie.bin"
 	help
@@ -74,7 +74,7 @@ config RO_REGION_ONLY
 	string
 	depends on VBOOT_SLOTS_RW_AB || VBOOT_SLOTS_RW_A
 	# Add the EFS and EC to the RO region only
-	# This is a chausie-specific override of soc/amd/sabrina/Kconfig
+	# This is a chausie-specific override of soc/amd/mendocino/Kconfig
 	default "apu/amdfw apu/ecfw"
 
 config CHROMEOS

diff --git a/src/mainboard/amd/chausie/devicetree.cb b/src/mainboard/amd/chausie/devicetree.cb
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
-chip soc/amd/sabrina
+chip soc/amd/mendocino
 	register "common_config.espi_config" = "{
 		.std_io_decode_bitmap = ESPI_DECODE_IO_0x80_EN | ESPI_DECODE_IO_0X2E_0X2F_EN | ESPI_DECODE_IO_0X60_0X64_EN,
 		.generic_io_range[0] = {

diff --git a/src/mainboard/amd/gardenia/dsdt.asl b/src/mainboard/amd/gardenia/dsdt.asl
@@ -14,8 +14,6 @@ DefinitionBlock (
 	)
 {	/* Start of ASL file */
 	#include <acpi/dsdt_top.asl>
-
-	/* global NVS and variables */
 	#include <globalnvs.asl>
 
 	/* Describe the USB Overcurrent pins */

diff --git a/src/mainboard/amd/inagua/acpi/superio.asl b/src/mainboard/amd/inagua/acpi/superio.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/amd/mandolin/dsdt.asl b/src/mainboard/amd/mandolin/dsdt.asl
@@ -14,8 +14,6 @@ DefinitionBlock (
 	)
 {	/* Start of ASL file */
 	#include <acpi/dsdt_top.asl>
-
-	/* global NVS and variables */
 	#include <globalnvs.asl>
 
 	/* PCI IRQ mapping for the Southbridge */

diff --git a/src/mainboard/amd/olivehill/acpi/superio.asl b/src/mainboard/amd/olivehill/acpi/superio.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/amd/olivehill/acpi/thermal.asl b/src/mainboard/amd/olivehill/acpi/thermal.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/amd/padmelon/dsdt.asl b/src/mainboard/amd/padmelon/dsdt.asl
@@ -12,8 +12,6 @@ DefinitionBlock (
 	)
 {	/* Start of ASL file */
 	#include <acpi/dsdt_top.asl>
-
-	/* global NVS and variables */
 	#include <globalnvs.asl>
 
 	/* Describe the USB Overcurrent pins */

diff --git a/src/mainboard/amd/padmelon/romstage.c b/src/mainboard/amd/padmelon/romstage.c
@@ -1,3 +1,7 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
+
 /*
  * This is a placeholder, if there ever is something platform specific to
  * add to romstage, do it here.

diff --git a/src/mainboard/amd/parmer/acpi/sata.asl b/src/mainboard/amd/parmer/acpi/sata.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/amd/parmer/acpi/superio.asl b/src/mainboard/amd/parmer/acpi/superio.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/amd/parmer/acpi/thermal.asl b/src/mainboard/amd/parmer/acpi/thermal.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/amd/south_station/acpi/superio.asl b/src/mainboard/amd/south_station/acpi/superio.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/amd/thatcher/acpi/sata.asl b/src/mainboard/amd/thatcher/acpi/sata.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/amd/thatcher/acpi/superio.asl b/src/mainboard/amd/thatcher/acpi/superio.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/amd/thatcher/acpi/thermal.asl b/src/mainboard/amd/thatcher/acpi/thermal.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/amd/union_station/acpi/superio.asl b/src/mainboard/amd/union_station/acpi/superio.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/apple/macbook21/acpi/superio.asl b/src/mainboard/apple/macbook21/acpi/superio.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/apple/macbookair4_2/acpi/superio.asl b/src/mainboard/apple/macbookair4_2/acpi/superio.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asrock/b75pro3-m/acpi/ec.asl b/src/mainboard/asrock/b75pro3-m/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asrock/b85m_pro4/acpi/ec.asl b/src/mainboard/asrock/b85m_pro4/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asrock/g41c-gs/acpi/ec.asl b/src/mainboard/asrock/g41c-gs/acpi/ec.asl
@@ -1 +1,5 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
+
 /* dummy */
diff --git a/src/mainboard/asrock/g41c-gs/acpi/superio.asl b/src/mainboard/asrock/g41c-gs/acpi/superio.asl
@@ -1 +1,5 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
+
 /* dummy */
diff --git a/src/mainboard/asrock/h110m/acpi/ec.asl b/src/mainboard/asrock/h110m/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asrock/h110m/acpi/mainboard.asl b/src/mainboard/asrock/h110m/acpi/mainboard.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asrock/h110m/acpi/superio.asl b/src/mainboard/asrock/h110m/acpi/superio.asl
@@ -1 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
 
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asrock/h110m/dsdt.asl b/src/mainboard/asrock/h110m/dsdt.asl
@@ -7,7 +7,7 @@ DefinitionBlock(
 	ACPI_DSDT_REV_2,
 	OEM_ID,
 	ACPI_TABLE_CREATOR,
-	0x20110725	// OEM revision
+	0x20110725
 )
 {
 	#include <acpi/dsdt_top.asl>

diff --git a/src/mainboard/asrock/h77pro4-m/acpi/ec.asl b/src/mainboard/asrock/h77pro4-m/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asrock/h81m-hds/acpi/ec.asl b/src/mainboard/asrock/h81m-hds/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asrock/imb-a180/acpi/superio.asl b/src/mainboard/asrock/imb-a180/acpi/superio.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asrock/imb-a180/acpi/thermal.asl b/src/mainboard/asrock/imb-a180/acpi/thermal.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asus/a88xm-e/acpi/sata.asl b/src/mainboard/asus/a88xm-e/acpi/sata.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asus/a88xm-e/acpi/si.asl b/src/mainboard/asus/a88xm-e/acpi/si.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asus/a88xm-e/acpi/superio.asl b/src/mainboard/asus/a88xm-e/acpi/superio.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asus/a88xm-e/acpi/thermal.asl b/src/mainboard/asus/a88xm-e/acpi/thermal.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asus/f2a85-m/acpi/sata.asl b/src/mainboard/asus/f2a85-m/acpi/sata.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asus/f2a85-m/acpi/superio.asl b/src/mainboard/asus/f2a85-m/acpi/superio.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asus/f2a85-m/acpi/thermal.asl b/src/mainboard/asus/f2a85-m/acpi/thermal.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asus/h61-series/acpi/ec.asl b/src/mainboard/asus/h61-series/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asus/h61-series/hda_verb.c b/src/mainboard/asus/h61-series/hda_verb.c
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asus/maximus_iv_gene-z/acpi/ec.asl b/src/mainboard/asus/maximus_iv_gene-z/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asus/p2b/irq_tables.c b/src/mainboard/asus/p2b/irq_tables.c
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asus/p5gc-mx/acpi/ec.asl b/src/mainboard/asus/p5gc-mx/acpi/ec.asl
@@ -1 +1,5 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
+
 /* dummy */
diff --git a/src/mainboard/asus/p5gc-mx/acpi/superio.asl b/src/mainboard/asus/p5gc-mx/acpi/superio.asl
@@ -1 +1,5 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
+
 /* dummy */
diff --git a/src/mainboard/asus/p5qc/acpi/ec.asl b/src/mainboard/asus/p5qc/acpi/ec.asl
@@ -1 +1,5 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
+
 /* dummy */
diff --git a/src/mainboard/asus/p5qc/acpi/superio.asl b/src/mainboard/asus/p5qc/acpi/superio.asl
@@ -1 +1,5 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
+
 /* TODO */
diff --git a/src/mainboard/asus/p5ql-em/acpi/ec.asl b/src/mainboard/asus/p5ql-em/acpi/ec.asl
@@ -1 +1,5 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
+
 /* dummy */
diff --git a/src/mainboard/asus/p5ql-em/acpi/superio.asl b/src/mainboard/asus/p5ql-em/acpi/superio.asl
@@ -1 +1,5 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
+
 /* TODO */
diff --git a/src/mainboard/asus/p5qpl-am/acpi/ec.asl b/src/mainboard/asus/p5qpl-am/acpi/ec.asl
@@ -1 +1,5 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
+
 /* dummy */
diff --git a/src/mainboard/asus/p8x7x-series/acpi/ec.asl b/src/mainboard/asus/p8x7x-series/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/asus/p8x7x-series/acpi/superio.asl b/src/mainboard/asus/p8x7x-series/acpi/superio.asl
@@ -1 +1,3 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 #include <drivers/pc80/pc/ps2_controller.asl>
diff --git a/src/mainboard/asus/p8x7x-series/hda_verb.c b/src/mainboard/asus/p8x7x-series/hda_verb.c
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/bap/ode_e20XX/acpi/sata.asl b/src/mainboard/bap/ode_e20XX/acpi/sata.asl
@@ -1 +1,5 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
+
 /* No SATA functionality */
diff --git a/src/mainboard/bap/ode_e20XX/acpi/thermal.asl b/src/mainboard/bap/ode_e20XX/acpi/thermal.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/biostar/a68n_5200/acpi/superio.asl b/src/mainboard/biostar/a68n_5200/acpi/superio.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/biostar/a68n_5200/acpi/thermal.asl b/src/mainboard/biostar/a68n_5200/acpi/thermal.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/biostar/am1ml/acpi/thermal.asl b/src/mainboard/biostar/am1ml/acpi/thermal.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/biostar/th61-itx/acpi/ec.asl b/src/mainboard/biostar/th61-itx/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/biostar/th61-itx/acpi/superio.asl b/src/mainboard/biostar/th61-itx/acpi/superio.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/bostentech/gbyt4/acpi/ec.asl b/src/mainboard/bostentech/gbyt4/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/bostentech/gbyt4/acpi/superio.asl b/src/mainboard/bostentech/gbyt4/acpi/superio.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/bostentech/gbyt4/dsdt.asl b/src/mainboard/bostentech/gbyt4/dsdt.asl
@@ -7,7 +7,7 @@ DefinitionBlock(
 	ACPI_DSDT_REV_2,
 	OEM_ID,
 	ACPI_TABLE_CREATOR,
-	0x20110725	// OEM revision
+	0x20110725
 )
 {
 	#include <acpi/dsdt_top.asl>

diff --git a/src/mainboard/clevo/kbl-u/acpi/ec.asl b/src/mainboard/clevo/kbl-u/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/dell/snb_ivb_workstations/acpi/ec.asl b/src/mainboard/dell/snb_ivb_workstations/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/dell/snb_ivb_workstations/hda_verb.c b/src/mainboard/dell/snb_ivb_workstations/hda_verb.c
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/emulation/qemu-i440fx/acpi.h b/src/mainboard/emulation/qemu-i440fx/acpi.h
@@ -1,2 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
 unsigned long northbridge_write_acpi_tables(struct device *device,
 					    unsigned long start);
diff --git a/src/mainboard/facebook/fbg1701/acpi/ec.asl b/src/mainboard/facebook/fbg1701/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/facebook/fbg1701/dsdt.asl b/src/mainboard/facebook/fbg1701/dsdt.asl
@@ -10,15 +10,12 @@ DefinitionBlock(
 	ACPI_DSDT_REV_2,
 	OEM_ID,
 	ACPI_TABLE_CREATOR,
-	0x20110725	/* OEM revision */
+	0x20110725
 )
 {
 	#include <acpi/dsdt_top.asl>
 	#include <acpi/platform.asl>
-
-	/* global NVS and variables */
 	#include <acpi/globalnvs.asl>
-
 	#include <cpu/intel/common/acpi/cpu.asl>
 
 	Scope (\_SB) {
@@ -30,6 +27,5 @@ DefinitionBlock(
 
 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 
-	/* Mainboard specific */
 	#include "acpi/mainboard.asl"
 }
diff --git a/src/mainboard/facebook/monolith/dsdt.asl b/src/mainboard/facebook/monolith/dsdt.asl
@@ -7,7 +7,7 @@ DefinitionBlock(
 	ACPI_DSDT_REV_2,
 	OEM_ID,
 	ACPI_TABLE_CREATOR,
-	0x20110725	// OEM revision
+	0x20110725
 )
 {
 	#include <acpi/dsdt_top.asl>

diff --git a/src/mainboard/foxconn/d41s/acpi/ec.asl b/src/mainboard/foxconn/d41s/acpi/ec.asl
@@ -1 +1,5 @@
-/* Dummy file - No license required. */
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
+
+/* Dummy file */
diff --git a/src/mainboard/foxconn/g41s-k/acpi/ec.asl b/src/mainboard/foxconn/g41s-k/acpi/ec.asl
@@ -1 +1,5 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
+
 /* dummy */
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/superio.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/superio.asl
@@ -1 +1,5 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
+
 /* dummy */
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/acpi/ec.asl b/src/mainboard/gigabyte/ga-b75m-d3h/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/acpi/superio.asl b/src/mainboard/gigabyte/ga-b75m-d3h/acpi/superio.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/gigabyte/ga-d510ud/acpi/ec.asl b/src/mainboard/gigabyte/ga-d510ud/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/acpi/ec.asl b/src/mainboard/gigabyte/ga-g41m-es2l/acpi/ec.asl
@@ -1 +1,5 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
+
 /* dummy */
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/acpi/superio.asl b/src/mainboard/gigabyte/ga-g41m-es2l/acpi/superio.asl
@@ -1 +1,5 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
+
 /* dummy */
diff --git a/src/mainboard/gigabyte/ga-h61m-series/acpi/ec.asl b/src/mainboard/gigabyte/ga-h61m-series/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/gigabyte/ga-h61m-series/hda_verb.c b/src/mainboard/gigabyte/ga-h61m-series/hda_verb.c
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/gizmosphere/gizmo2/acpi/superio.asl b/src/mainboard/gizmosphere/gizmo2/acpi/superio.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/gizmosphere/gizmo2/acpi/thermal.asl b/src/mainboard/gizmosphere/gizmo2/acpi/thermal.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/google/auron/Kconfig b/src/mainboard/google/auron/Kconfig
@@ -1,6 +1,7 @@
 config BOARD_GOOGLE_BASEBOARD_AURON
 	def_bool n
 	select BOARD_ROMSIZE_KB_8192
+	select BROADWELL_LPDDR3 if BOARD_GOOGLE_SAMUS
 	select EC_GOOGLE_CHROMEEC
 	select EC_GOOGLE_CHROMEEC_LPC
 	select HAVE_ACPI_RESUME

diff --git a/src/mainboard/google/auron/devicetree.cb b/src/mainboard/google/auron/devicetree.cb
@@ -12,6 +12,8 @@ chip soc/intel/broadwell
 	# Enable HDMI Hotplug with 6ms pulse
 	register "gpu_dp_b_hotplug" = "0x06"
 
+	register "ec_present" = "true"
+
 	device cpu_cluster 0 on
 		chip cpu/intel/haswell
 			register "s0ix_enable" = "1"

diff --git a/src/mainboard/google/auron/dsdt.asl b/src/mainboard/google/auron/dsdt.asl
@@ -7,7 +7,7 @@ DefinitionBlock(
 	ACPI_DSDT_REV_2,
 	OEM_ID,
 	ACPI_TABLE_CREATOR,
-	0x20110725	// OEM revision
+	0x20110725
 )
 {
 	#include <acpi/dsdt_top.asl>

diff --git a/src/mainboard/google/auron/spd.c b/src/mainboard/google/auron/spd.c
@@ -1,112 +1,11 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <cbfs.h>
-#include <console/console.h>
 #include <mainboard/google/auron/variant.h>
-#include <southbridge/intel/lynxpoint/lp_gpio.h>
-#include <soc/pei_data.h>
 #include <soc/pei_wrapper.h>
-#include <string.h>
-#include <types.h>
 
-#define SPD_DRAM_TYPE		2
-#define SPD_DRAM_DDR3		0x0b
-#define SPD_DRAM_LPDDR3		0xf1
-#define SPD_DENSITY_BANKS	4
-#define SPD_ADDRESSING		5
-#define SPD_ORGANIZATION	7
-#define SPD_BUS_DEV_WIDTH	8
-#define SPD_PART_OFF		128
-#define SPD_PART_LEN		18
-
-#define SPD_LEN			256
-
-static void mainboard_print_spd_info(uint8_t spd[])
-{
-	const int spd_banks[8] = {  8, 16, 32, 64, -1, -1, -1, -1 };
-	const int spd_capmb[8] = {  1,  2,  4,  8, 16, 32, 64,  0 };
-	const int spd_rows[8]  = { 12, 13, 14, 15, 16, -1, -1, -1 };
-	const int spd_cols[8]  = {  9, 10, 11, 12, -1, -1, -1, -1 };
-	const int spd_ranks[8] = {  1,  2,  3,  4, -1, -1, -1, -1 };
-	const int spd_devw[8]  = {  4,  8, 16, 32, -1, -1, -1, -1 };
-	const int spd_busw[8]  = {  8, 16, 32, 64, -1, -1, -1, -1 };
-	char spd_name[SPD_PART_LEN+1] = { 0 };
-
-	int banks = spd_banks[(spd[SPD_DENSITY_BANKS] >> 4) & 7];
-	int capmb = spd_capmb[spd[SPD_DENSITY_BANKS] & 7] * 256;
-	int rows  = spd_rows[(spd[SPD_ADDRESSING] >> 3) & 7];
-	int cols  = spd_cols[spd[SPD_ADDRESSING] & 7];
-	int ranks = spd_ranks[(spd[SPD_ORGANIZATION] >> 3) & 7];
-	int devw  = spd_devw[spd[SPD_ORGANIZATION] & 7];
-	int busw  = spd_busw[spd[SPD_BUS_DEV_WIDTH] & 7];
-
-	/* Module type */
-	printk(BIOS_INFO, "SPD: module type is ");
-	switch (spd[SPD_DRAM_TYPE]) {
-	case SPD_DRAM_DDR3:
-		printk(BIOS_INFO, "DDR3\n");
-		break;
-	case SPD_DRAM_LPDDR3:
-		printk(BIOS_INFO, "LPDDR3\n");
-		break;
-	default:
-		printk(BIOS_INFO, "Unknown (%02x)\n", spd[SPD_DRAM_TYPE]);
-		break;
-	}
-
-	/* Module Part Number */
-	memcpy(spd_name, &spd[SPD_PART_OFF], SPD_PART_LEN);
-	spd_name[SPD_PART_LEN] = 0;
-	printk(BIOS_INFO, "SPD: module part is %s\n", spd_name);
-
-	printk(BIOS_INFO, "SPD: banks %d, ranks %d, rows %d, columns %d, "
-	       "density %d Mb\n", banks, ranks, rows, cols, capmb);
-	printk(BIOS_INFO, "SPD: device width %d bits, bus width %d bits\n",
-	       devw, busw);
-
-	if (capmb > 0 && busw > 0 && devw > 0 && ranks > 0) {
-		/* SIZE = DENSITY / 8 * BUS_WIDTH / SDRAM_WIDTH * RANKS */
-		printk(BIOS_INFO, "SPD: module size is %u MB (per channel)\n",
-		       capmb / 8 * busw / devw * ranks);
-	}
-}
-
-static void fill_spd_for_index(uint8_t spd[], unsigned int spd_index)
-{
-	size_t spd_file_len;
-	uint8_t *spd_file = cbfs_map("spd.bin", &spd_file_len);
-
-	printk(BIOS_DEBUG, "SPD index %d\n", spd_index);
-
-	if (!spd_file)
-		die("SPD data not found.");
-
-	if (spd_file_len < SPD_LEN)
-		die("Missing SPD data.");
-
-	if (spd_file_len < ((spd_index + 1) * SPD_LEN)) {
-		printk(BIOS_ERR, "SPD index override to 0 - old hardware?\n");
-		spd_index = 0;
-	}
-
-	memcpy(spd, spd_file + (spd_index * SPD_LEN), SPD_LEN);
-
-	/* Make sure a valid SPD was found */
-	if (spd[0] == 0)
-		die("Invalid SPD data.");
-
-	mainboard_print_spd_info(spd);
-}
-
-/* Copy SPD data for on-board memory */
-void mainboard_fill_spd_data(struct pei_data *pei_data)
+void mb_get_spd_map(struct spd_info *spdi)
 {
-	const unsigned int spd_index = variant_get_spd_index();
-
-	fill_spd_for_index(pei_data->spd_data[0][0], spd_index);
-
-	if (variant_is_dual_channel(spd_index))
-		memcpy(pei_data->spd_data[1][0], pei_data->spd_data[0][0], SPD_LEN);
-	else
-		pei_data->dimm_channel1_disabled = 3;
+	spdi->spd_index = variant_get_spd_index();
+	spdi->addresses[0] = SPD_MEMORY_DOWN;
+	spdi->addresses[2] = variant_is_dual_channel(spdi->spd_index) ? SPD_MEMORY_DOWN : 0;
 }
diff --git a/src/mainboard/google/auron/variants/auron_paine/include/variant/acpi/ec.asl b/src/mainboard/google/auron/variants/auron_paine/include/variant/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/google/auron/variants/auron_paine/pei_data.c b/src/mainboard/google/auron/variants/auron_paine/pei_data.c
@@ -5,12 +5,6 @@
 
 void mainboard_fill_pei_data(struct pei_data *pei_data)
 {
-	pei_data->ec_present = 1;
-
-	/* One installed DIMM per channel -- can be changed by SPD init */
-	pei_data->dimm_channel0_disabled = 2;
-	pei_data->dimm_channel1_disabled = 2;
-
 	/* P0: LTE */
 	pei_data_usb2_port(pei_data, 0, 0x0150, 1, USB_OC_PIN_SKIP, USB_PORT_MINI_PCIE);
 	/* P1: POrt A, CN10 */

diff --git a/src/mainboard/google/auron/variants/auron_yuna/include/variant/acpi/ec.asl b/src/mainboard/google/auron/variants/auron_yuna/include/variant/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/google/auron/variants/auron_yuna/pei_data.c b/src/mainboard/google/auron/variants/auron_yuna/pei_data.c
@@ -5,12 +5,6 @@
 
 void mainboard_fill_pei_data(struct pei_data *pei_data)
 {
-	pei_data->ec_present = 1;
-
-	/* One installed DIMM per channel -- can be changed by SPD init */
-	pei_data->dimm_channel0_disabled = 2;
-	pei_data->dimm_channel1_disabled = 2;
-
 	/* P0: LTE */
 	pei_data_usb2_port(pei_data, 0, 0x0150, 1, USB_OC_PIN_SKIP, USB_PORT_MINI_PCIE);
 	/* P1: POrt A, CN10 */

diff --git a/src/mainboard/google/auron/variants/buddy/include/variant/acpi/ec.asl b/src/mainboard/google/auron/variants/buddy/include/variant/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/google/auron/variants/buddy/include/variant/acpi/usb.asl b/src/mainboard/google/auron/variants/buddy/include/variant/acpi/usb.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/google/auron/variants/buddy/overridetree.cb b/src/mainboard/google/auron/variants/buddy/overridetree.cb
@@ -9,6 +9,8 @@ chip soc/intel/broadwell
 		.backlight_pwm_hz	= 200,
 	}"
 
+	register "dq_pins_interleaved" = "true"
+
 	device cpu_cluster 0 on
 		chip cpu/intel/haswell
 			register "s0ix_enable" = "0"

diff --git a/src/mainboard/google/auron/variants/buddy/pei_data.c b/src/mainboard/google/auron/variants/buddy/pei_data.c
@@ -5,8 +5,6 @@
 
 void mainboard_fill_pei_data(struct pei_data *pei_data)
 {
-	pei_data->ec_present = 1;
-
 	/* P0: Side USB3.0 port, USB3S1 */
 	pei_data_usb2_port(pei_data, 0, 0x0150, 1, 0, USB_PORT_INTERNAL);
 	/* P1: Rear USB3.0 port, USB3R1 */

diff --git a/src/mainboard/google/auron/variants/buddy/spd/spd.c b/src/mainboard/google/auron/variants/buddy/spd/spd.c
@@ -1,17 +1,9 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <mainboard/google/auron/variant.h>
-#include <soc/pei_data.h>
 #include <soc/pei_wrapper.h>
 
-/* Copy SPD data for on-board memory */
-void mainboard_fill_spd_data(struct pei_data *pei_data)
+void mb_get_spd_map(struct spd_info *spdi)
 {
-	pei_data->spd_addresses[0] = 0xa0;
-	pei_data->spd_addresses[2] = 0xa4;
-	pei_data->dimm_channel0_disabled = 2;
-	pei_data->dimm_channel1_disabled = 2;
-	/* Enable 2x refresh mode */
-	pei_data->ddr_refresh_2x = 1;
-	pei_data->dq_pins_interleaved = 1;
+	spdi->addresses[0] = 0x50;
+	spdi->addresses[2] = 0x52;
 }
diff --git a/src/mainboard/google/auron/variants/gandof/pei_data.c b/src/mainboard/google/auron/variants/gandof/pei_data.c
@@ -5,12 +5,6 @@
 
 void mainboard_fill_pei_data(struct pei_data *pei_data)
 {
-	pei_data->ec_present = 1;
-
-	/* One installed DIMM per channel -- can be changed by SPD init */
-	pei_data->dimm_channel0_disabled = 2;
-	pei_data->dimm_channel1_disabled = 2;
-
 	/* P0: LTE */
 	pei_data_usb2_port(pei_data, 0, 0x0150, 1, USB_OC_PIN_SKIP, USB_PORT_MINI_PCIE);
 	/* P1: POrt A, CN10 */

diff --git a/src/mainboard/google/auron/variants/lulu/pei_data.c b/src/mainboard/google/auron/variants/lulu/pei_data.c
@@ -5,12 +5,6 @@
 
 void mainboard_fill_pei_data(struct pei_data *pei_data)
 {
-	pei_data->ec_present = 1;
-
-	/* One installed DIMM per channel -- can be changed by SPD init */
-	pei_data->dimm_channel0_disabled = 2;
-	pei_data->dimm_channel1_disabled = 2;
-
 	/* P0: Port B, CN01 (IOBoard) */
 	pei_data_usb2_port(pei_data, 0, 0x0150, 1, 0, USB_PORT_BACK_PANEL);
 	/* P1: Port A, CN01 */

diff --git a/src/mainboard/google/auron/variants/samus/pei_data.c b/src/mainboard/google/auron/variants/samus/pei_data.c
@@ -1,32 +1,10 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <stdint.h>
-#include <string.h>
 #include <soc/pei_data.h>
 #include <soc/pei_wrapper.h>
 
 void mainboard_fill_pei_data(struct pei_data *pei_data)
 {
-	/* DQ byte map for Samus board */
-	const u8 dq_map[2][6][2] = {
-		{ { 0x0F, 0xF0 }, { 0x00, 0xF0 }, { 0x0F, 0xF0 },
-		  { 0x0F, 0x00 }, { 0xFF, 0x00 }, { 0xFF, 0x00 } },
-		{ { 0x0F, 0xF0 }, { 0x00, 0xF0 }, { 0x0F, 0xF0 },
-		  { 0x0F, 0x00 }, { 0xFF, 0x00 }, { 0xFF, 0x00 } } };
-	/* DQS CPU<>DRAM map for Samus board */
-	const u8 dqs_map[2][8] = {
-		{ 2, 0, 1, 3, 6, 4, 7, 5 },
-		{ 2, 1, 0, 3, 6, 5, 4, 7 } };
-
-	pei_data->ec_present = 1;
-
-	/* One installed DIMM per channel */
-	pei_data->dimm_channel0_disabled = 2;
-	pei_data->dimm_channel1_disabled = 2;
-
-	memcpy(pei_data->dq_map, dq_map, sizeof(dq_map));
-	memcpy(pei_data->dqs_map, dqs_map, sizeof(dqs_map));
-
 	/* P0: HOST PORT */
 	pei_data_usb2_port(pei_data, 0, 0x0080, 1, 0, USB_PORT_BACK_PANEL);
 	/* P1: HOST PORT */

diff --git a/src/mainboard/google/auron/variants/samus/spd/spd.c b/src/mainboard/google/auron/variants/samus/spd/spd.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <mainboard/google/auron/variant.h>
+#include <soc/pei_wrapper.h>
 #include <southbridge/intel/lynxpoint/lp_gpio.h>
 
 /* Samus board memory configuration GPIOs */
@@ -26,3 +27,20 @@ bool variant_is_dual_channel(const unsigned int spd_index)
 	/* Assume same memory in both channels */
 	return true;
 }
+
+const struct lpddr3_dq_dqs_map *mb_get_lpddr3_dq_dqs_map(void)
+{
+	static const struct lpddr3_dq_dqs_map lpddr3_map = {
+		.dq = {
+			{ { 0x0F, 0xF0 }, { 0x00, 0xF0 }, { 0x0F, 0xF0 },
+			  { 0x0F, 0x00 }, { 0xFF, 0x00 }, { 0xFF, 0x00 } },
+			{ { 0x0F, 0xF0 }, { 0x00, 0xF0 }, { 0x0F, 0xF0 },
+			  { 0x0F, 0x00 }, { 0xFF, 0x00 }, { 0xFF, 0x00 } },
+		},
+		.dqs = {
+			{ 2, 0, 1, 3, 6, 4, 7, 5 },
+			{ 2, 1, 0, 3, 6, 5, 4, 7 },
+		},
+	};
+	return &lpddr3_map;
+}
diff --git a/src/mainboard/google/beltino/Kconfig b/src/mainboard/google/beltino/Kconfig
@@ -70,7 +70,7 @@ config ENABLE_DDR_2X_REFRESH
 config PCIEXP_AER
 	def_bool n
 
-config TIANOCORE_BOOT_TIMEOUT
+config EDK2_BOOT_TIMEOUT
 	int
 	default 5
 

diff --git a/src/mainboard/google/beltino/acpi/ec.asl b/src/mainboard/google/beltino/acpi/ec.asl
@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
diff --git a/src/mainboard/google/beltino/dsdt.asl b/src/mainboard/google/beltino/dsdt.asl
@@ -7,7 +7,7 @@ DefinitionBlock(
 	ACPI_DSDT_REV_2,
 	OEM_ID,
 	ACPI_TABLE_CREATOR,
-	0x20110725	// OEM revision
+	0x20110725
 )
 {
 	#include <acpi/dsdt_top.asl>

diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
@@ -64,6 +64,10 @@ config BOARD_GOOGLE_BASEBOARD_GHOST
 	def_bool n
 	select BOARD_GOOGLE_BASEBOARD_BRYA if BOARD_GOOGLE_GHOST4ADL
 	select BOARD_GOOGLE_BASEBOARD_SKOLAS if !BOARD_GOOGLE_GHOST4ADL
+	select DRIVERS_I2C_CS42L42
+	select DRIVERS_INTEL_MIPI_CAMERA
+	select GBB_FLAG_DISABLE_LID_SHUTDOWN if VBOOT
+	select SOC_INTEL_COMMON_BLOCK_IPU
 
 config BOARD_GOOGLE_BASEBOARD_NISSA
 	def_bool n
@@ -72,6 +76,7 @@ config BOARD_GOOGLE_BASEBOARD_NISSA
 	select CHROMEOS_DRAM_PART_NUMBER_IN_CBI if CHROMEOS
 	select MEMORY_SOLDERDOWN
 	select SOC_INTEL_ALDERLAKE_PCH_N
+	select SOC_INTEL_COMMON_UFS_SUPPORT
 	select SOC_INTEL_CSE_LITE_COMPRESS_ME_RW
 	select SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE
 	select SYSTEM_TYPE_LAPTOP
@@ -216,6 +221,7 @@ config MAINBOARD_PART_NUMBER
 	default "Joxer" if BOARD_GOOGLE_JOXER
 	default "Pujjo" if BOARD_GOOGLE_PUJJO
 	default "Xivu" if BOARD_GOOGLE_XIVU
+	default "Gaelin4ADL" if BOARD_GOOGLE_GAELIN4ADL
 
 config VARIANT_DIR
 	default "brya0" if BOARD_GOOGLE_BRYA0
@@ -252,6 +258,7 @@ config VARIANT_DIR
 	default "joxer" if BOARD_GOOGLE_JOXER
 	default "pujjo" if BOARD_GOOGLE_PUJJO
 	default "xivu" if BOARD_GOOGLE_XIVU
+	default "gaelin" if BOARD_GOOGLE_GAELIN4ADL
 
 config VBOOT
 	select VBOOT_EARLY_EC_SYNC if !BOARD_GOOGLE_BASEBOARD_NISSA

diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name
@@ -214,7 +214,6 @@ config BOARD_GOOGLE_CROTA
 	select CHROMEOS_WIFI_SAR if CHROMEOS
 	select DRIVERS_GENESYSLOGIC_GL9750
 	select DRIVERS_I2C_CS42L42
-	select VPD
 
 config BOARD_GOOGLE_MOLI
 	bool "->  Moli"
@@ -251,16 +250,19 @@ config BOARD_GOOGLE_MITHRAX
 config BOARD_GOOGLE_KULDAX
 	bool "->  Kuldax"
 	select BOARD_GOOGLE_BASEBOARD_BRASK
+	select DRIVERS_GENESYSLOGIC_GL9755
 
 config BOARD_GOOGLE_JOXER
 	bool "->  Joxer"
 	select ALDERLAKE_CONFIGURE_DESCRIPTOR
 	select BOARD_GOOGLE_BASEBOARD_NISSA
+	select CHROMEOS_WIFI_SAR if CHROMEOS
 	select DRIVERS_GENESYSLOGIC_GL9750
 
 config BOARD_GOOGLE_PUJJO
 	bool "->  Pujjo"
 	select BOARD_GOOGLE_BASEBOARD_NISSA
+	select DRIVERS_GENERIC_BAYHUB_LV2
 	select DRIVERS_GENERIC_GPIO_KEYS
 	select DRIVERS_GENESYSLOGIC_GL9750
 	select HAVE_WWAN_POWER_SEQUENCE
@@ -271,3 +273,7 @@ config BOARD_GOOGLE_XIVU
 	select DRIVERS_GENERIC_GPIO_KEYS
 	select DRIVERS_GENESYSLOGIC_GL9750
 	select DRIVERS_INTEL_MIPI_CAMERA
+
+config BOARD_GOOGLE_GAELIN4ADL
+	bool "->  Gaelin4ADL"
+	select BOARD_GOOGLE_BASEBOARD_BRASK
diff --git a/src/mainboard/google/brya/acpi/nvjt.asl b/src/mainboard/google/brya/acpi/nvjt.asl
@@ -2,8 +2,8 @@
 
 #define JT_FUNC_SUPPORT		0
 #define JT_FUNC_CAPS		1
-#define JT_FUNC_POWERCONTROL	2
-#define JT_FUNC_PLATPOLICY	3
+#define JT_FUNC_POWERCONTROL	3
+#define JT_FUNC_PLATPOLICY	4
 
 Method (NVJT, 2, Serialized)
 {
Original file line number	Diff line number	Diff line change
		@@ -1 +1,3 @@
		/* SPDX-License-Identifier: GPL-2.0-only */

		const char *lenovo_mainboard_partnumber(void);
Original file line number	Diff line number	Diff line change
		@@ -0,0 +1 @@
		ramstage-$(CONFIG_DRIVER_NXP_UWB_SR1XX) += uwb.c
Original file line number	Diff line number	Diff line change
		@@ -0,0 +1,3 @@
		/* SPDX-License-Identifier: CC-PDDC */

		/* Please update the license if adding licensable material. */
Original file line number	Diff line number	Diff line change
		@@ -1 +1,3 @@
		/* SPDX-License-Identifier: GPL-2.0-only */

		#include <drivers/pc80/pc/ps2_controller.asl>