51 changes: 40 additions & 11 deletions payloads/libpayload/drivers/video/graphics.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2015 Google, Inc.
*
Expand Down Expand Up @@ -73,6 +72,35 @@ static int is_valid_fraction(const struct fraction *f)
return f->d != 0;
}

static int is_valid_scale(const struct scale *s)
{
return is_valid_fraction(&s->x) && is_valid_fraction(&s->y);
}

static void add_fractions(struct fraction *out,
const struct fraction *f1, const struct fraction *f2)
{
int64_t n, d;
int shift;
n = (int64_t)f1->n * f2->d + (int64_t)f2->n * f1->d;
d = (int64_t)f1->d * f2->d;
/* Simplest way to reduce the fraction until fitting in int32_t */
shift = log2(MAX(ABS(n), ABS(d)) >> 31);
if (shift > 0) {
n >>= shift;
d >>= shift;
}
out->n = n;
out->d = d;
}

static void add_scales(struct scale *out,
const struct scale *s1, const struct scale *s2)
{
add_fractions(&out->x, &s1->x, &s2->x);
add_fractions(&out->y, &s1->y, &s2->y);
}

/*
* Transform a vector:
* x' = x * a_x + offset_x
Expand All @@ -83,7 +111,7 @@ static int transform_vector(struct vector *out,
const struct scale *a,
const struct vector *offset)
{
if (!is_valid_fraction(&a->x) || !is_valid_fraction(&a->y))
if (!is_valid_scale(a))
return CBGFX_ERROR_INVALID_PARAMETER;
out->x = a->x.n * in->x / a->x.d + offset->x;
out->y = a->y.n * in->y / a->y.d + offset->y;
Expand Down Expand Up @@ -212,7 +240,6 @@ static int cbgfx_init(void)
int draw_box(const struct rect *box, const struct rgb_color *rgb)
{
struct vector top_left;
struct vector size;
struct vector p, t;

if (cbgfx_init())
Expand All @@ -223,14 +250,13 @@ int draw_box(const struct rect *box, const struct rgb_color *rgb)
.x = { .n = box->offset.x, .d = CANVAS_SCALE, },
.y = { .n = box->offset.y, .d = CANVAS_SCALE, }
};
const struct scale size_s = {
.x = { .n = box->size.x, .d = CANVAS_SCALE, },
.y = { .n = box->size.y, .d = CANVAS_SCALE, }
const struct scale bottom_right_s = {
.x = { .n = box->offset.x + box->size.x, .d = CANVAS_SCALE, },
.y = { .n = box->offset.y + box->size.y, .d = CANVAS_SCALE, }
};

transform_vector(&top_left, &canvas.size, &top_left_s, &canvas.offset);
transform_vector(&size, &canvas.size, &size_s, &vzero);
add_vectors(&t, &top_left, &size);
transform_vector(&t, &canvas.size, &bottom_right_s, &canvas.offset);
if (within_box(&t, &canvas) < 0) {
LOG("Box exceeds canvas boundary\n");
return CBGFX_ERROR_BOUNDARY;
Expand All @@ -248,18 +274,21 @@ int draw_rounded_box(const struct scale *pos_rel, const struct scale *dim_rel,
const struct fraction *thickness,
const struct fraction *radius)
{
struct scale pos_end_rel;
struct vector top_left;
struct vector size;
struct vector p, t;

if (cbgfx_init())
return CBGFX_ERROR_INIT;

const uint32_t color = calculate_color(rgb, 0);

if (!is_valid_scale(pos_rel) || !is_valid_scale(dim_rel))
return CBGFX_ERROR_INVALID_PARAMETER;

add_scales(&pos_end_rel, pos_rel, dim_rel);
transform_vector(&top_left, &canvas.size, pos_rel, &canvas.offset);
transform_vector(&size, &canvas.size, dim_rel, &vzero);
add_vectors(&t, &top_left, &size);
transform_vector(&t, &canvas.size, &pos_end_rel, &canvas.offset);
if (within_box(&t, &canvas) < 0) {
LOG("Box exceeds canvas boundary\n");
return CBGFX_ERROR_BOUNDARY;
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/drivers/video/vga.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/drivers/video/video.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/archive.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2015 The ChromiumOS Authors. All rights reserved.
* written by Daisuke Nojiri <dnojiri@chromium.org>
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/arm/arch/asm.h
@@ -1,5 +1,4 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2013 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/arm/arch/barrier.h
@@ -1,5 +1,4 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
* Copyright (C) 2003-2004 Olivier Houchard
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/arm/arch/cache.h
@@ -1,5 +1,4 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2013 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/arm/arch/exception.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright 2013 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/arm/arch/io.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
* Copyright (C) 2008 coresystems GmbH
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/arm/arch/types.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/arm/arch/virtual.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 coresystems GmbH
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/arm64/arch/asm.h
@@ -1,5 +1,4 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2013 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/arm64/arch/barrier.h
@@ -1,5 +1,4 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
* Copyright (C) 2003-2004 Olivier Houchard
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/arm64/arch/cache.h
@@ -1,5 +1,4 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2013 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/arm64/arch/exception.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright 2014 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/arm64/arch/io.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
* Copyright (C) 2008 coresystems GmbH
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/arm64/arch/lib_helpers.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright 2018 Google Inc
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/arm64/arch/mmu.h
@@ -1,5 +1,4 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/arm64/arch/types.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/arm64/arch/virtual.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 coresystems GmbH
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/arpa/inet.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2011 secunet Security Networks AG
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/assert.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2011 secunet Security Networks AG
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/cbfs.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Jordan Crouse <jordan@cosmicpenguin.net>
* Copyright (C) 2013 Google, Inc.
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/cbfs_core.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Jordan Crouse <jordan@cosmicpenguin.net>
* Copyright (C) 2012 Google, Inc.
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/cbfs_ram.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2013 Google, Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/cbgfx.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2015 Google, Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/compiler.h
@@ -1,5 +1,4 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2017 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/coreboot_tables.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/ctype.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/die.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2013 coresystems GmbH
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/endian.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (c) 2012 The Chromium OS Authors.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/errno.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2010 coresystems GmbH
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/exception.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright 2013 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/ipchksum.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (c) 2012 The Chromium OS Authors.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/libpayload.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/limits.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2010 coresystems GmbH
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/lzma.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2011 secunet Security Networks AG
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/multiboot_tables.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/pci.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
* Copyright (C) 2008 coresystems GmbH
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/pci/pci.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2010 coresystems GmbH
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/stdarg.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
*
Expand Down
7 changes: 3 additions & 4 deletions payloads/libpayload/include/stdint.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2010 coresystems GmbH
*
Expand Down Expand Up @@ -46,9 +45,9 @@ typedef long ptrdiff_t;
#define INT64_MAX (9223372036854775807LL)

#define INT8_MIN (-INT8_MAX - 1)
#define INT16_MIN (-INT16_MIN - 1)
#define INT32_MIN (-INT32_MIN - 1)
#define INT64_MIN (-INT64_MIN - 1)
#define INT16_MIN (-INT16_MAX - 1)
#define INT32_MIN (-INT32_MAX - 1)
#define INT64_MIN (-INT64_MAX - 1)

#define UINT8_MAX (255)
#define UINT16_MAX (65535)
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/stdio.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/stdlib.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
* Copyright 2013 Google Inc.
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/storage/ahci.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2012 secunet Security Networks AG
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/storage/ata.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2012 secunet Security Networks AG
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/storage/atapi.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2012 secunet Security Networks AG
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/storage/storage.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2012 secunet Security Networks AG
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/string.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/strings.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2011 secunet Security Networks AG
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/sys/types.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2010 coresystems GmbH
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/sysinfo.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/time.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
* Copyright (C) 2016 Prodrive Technologies
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/udc/chipidea.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2015 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/udc/dwc2_udc.h
@@ -1,5 +1,4 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2015 Rockchip Electronics
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/udc/udc.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2015 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/unistd.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2010 coresystems GmbH
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/usb/dwc2_registers.h
@@ -1,5 +1,4 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2015 Rockchip Electronics
*
Expand Down
3 changes: 2 additions & 1 deletion payloads/libpayload/include/usb/usb.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 coresystems GmbH
*
Expand Down Expand Up @@ -318,6 +317,7 @@ void usb_detach_device(hci_t *controller, int devno);
int usb_attach_device(hci_t *controller, int hubaddress, int port,
usb_speed speed);

u32 pci_quirk_check(pcidev_t controller);
u32 usb_quirk_check(u16 vendor, u16 device);
int usb_interface_check(u16 vendor, u16 device);

Expand All @@ -330,6 +330,7 @@ int usb_interface_check(u16 vendor, u16 device);
#define USB_QUIRK_MSC_FORCE_TRANS_CBI_I (1 << 6)
#define USB_QUIRK_MSC_NO_TEST_UNIT_READY (1 << 7)
#define USB_QUIRK_MSC_SHORT_INQUIRY (1 << 8)
#define USB_QUIRK_HUB_NO_USBSTS_PCD (1 << 9)
#define USB_QUIRK_TEST (1 << 31)
#define USB_QUIRK_NONE 0

Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/usb/usbdisk.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 coresystems GmbH
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/usb/usbmsc.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008-2010 coresystems GmbH
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/video_console.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/x86/arch/apic.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright 2018 Google LLC
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/x86/arch/barrier.h
@@ -1,5 +1,4 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/x86/arch/cache.h
@@ -1,5 +1,4 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2013 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/x86/arch/cpuid.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright 2018 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/x86/arch/exception.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright 2013 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/x86/arch/io.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
* Copyright (C) 2008 coresystems GmbH
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/x86/arch/msr.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/x86/arch/rdtsc.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/x86/arch/types.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/include/x86/arch/virtual.h
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 coresystems GmbH
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libc/Makefile.inc
@@ -1,5 +1,4 @@
##
## This file is part of the libpayload project.
##
## Copyright (C) 2008 Advanced Micro Devices, Inc.
## Copyright (C) 2008 coresystems GmbH
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libc/args.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 coresystems GmbH
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libc/console.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libc/coreboot.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
* Copyright (C) 2009 coresystems GmbH
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libc/ctype.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libc/die.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright 2013 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libc/exec.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libc/fmap.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2015 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libc/hexdump.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright 2013 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libc/ipchecksum.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* It has originally been taken from the FreeBSD project.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libc/lib.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libc/libgcc.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright 2015 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libc/malloc.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
* Copyright (C) 2008-2010 coresystems GmbH
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libc/memory.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* It has originally been taken from the HelenOS project
* (http://www.helenos.eu), and slightly modified for our purposes.
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libc/printf.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* It has originally been taken from the HelenOS project
* (http://www.helenos.eu), and slightly modified for our purposes.
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libc/rand.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* It was originally taken from the OpenBSD project.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libc/readline.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 coresystems GmbH
*
Expand Down
26 changes: 13 additions & 13 deletions payloads/libpayload/libc/string.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
* Copyright (C) 2008 Advanced Micro Devices, Inc.
Expand Down Expand Up @@ -362,7 +361,7 @@ char *strsep(char **stringp, const char *delim)
token = walk = *stringp;

/* Walk, search for delimiters */
while(*walk && !strchr(delim, *walk))
while (*walk && !strchr(delim, *walk))
walk++;

if (*walk) {
Expand Down Expand Up @@ -425,7 +424,7 @@ long long int strtoll(const char *orig_ptr, char **endptr, int base)

/* Purge whitespace */

for( ; *ptr && isspace(*ptr); ptr++);
for ( ; *ptr && isspace(*ptr); ptr++);

if (ptr[0] == '-') {
is_negative = 1;
Expand Down Expand Up @@ -479,7 +478,7 @@ unsigned long long int strtoull(const char *ptr, char **endptr, int base)

/* Purge whitespace */

for( ; *ptr && isspace(*ptr); ptr++);
for ( ; *ptr && isspace(*ptr); ptr++);

if (!*ptr)
return 0;
Expand All @@ -492,9 +491,9 @@ unsigned long long int strtoull(const char *ptr, char **endptr, int base)
else if (ptr[0] == '0') {
base = 8;
ptr++;
}
else
} else {
base = 10;
}
}

/* Base 16 allows the 0x on front - so skip over it */
Expand All @@ -505,7 +504,7 @@ unsigned long long int strtoull(const char *ptr, char **endptr, int base)
ptr += 2;
}

for( ; *ptr && _valid(*ptr, base); ptr++)
for ( ; *ptr && _valid(*ptr, base); ptr++)
ret = (ret * base) + _offset(*ptr, base);

if (endptr != NULL)
Expand All @@ -517,7 +516,8 @@ unsigned long long int strtoull(const char *ptr, char **endptr, int base)
unsigned long int strtoul(const char *ptr, char **endptr, int base)
{
unsigned long long val = strtoull(ptr, endptr, base);
if (val > ULONG_MAX) return ULONG_MAX;
if (val > ULONG_MAX)
return ULONG_MAX;
return val;
}

Expand Down Expand Up @@ -578,7 +578,7 @@ size_t strcspn(const char *s, const char *a)
* @param ptr A pointer to a string pointer to keep state of the tokenizer
* @return Pointer to token
*/
char* strtok_r(char *str, const char *delim, char **ptr)
char *strtok_r(char *str, const char *delim, char **ptr)
{
/* start new tokenizing job or continue existing one? */
if (str == NULL)
Expand All @@ -599,18 +599,18 @@ char* strtok_r(char *str, const char *delim, char **ptr)
return start;
}

static char **strtok_global;

/**
* Extract first token in string str that is delimited by a character in tokens.
* Destroys str, eliminates the token delimiter and uses global state.
* @param str A pointer to the string to tokenize.
* @param delim A pointer to an array of characters that delimit the token
* @return Pointer to token
*/
char* strtok(char *str, const char *delim)
char *strtok(char *str, const char *delim)
{
return strtok_r(str, delim, strtok_global);
static char *strtok_ptr;

return strtok_r(str, delim, &strtok_ptr);
}

/**
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libc/sysinfo.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Jordan Crouse <jordan@cosmicpenguin.net>
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libc/time.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libcbfs/Makefile.inc
@@ -1,5 +1,4 @@
##
## This file is part of the libpayload project.
##
## Copyright (C) 2011 secunet Security Networks AG
##
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libcbfs/cbfs.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2011 secunet Security Networks AG
* Copyright (C) 2013 Google, Inc.
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libcbfs/cbfs_core.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2011 secunet Security Networks AG
* Copyright (C) 2013 Google, Inc.
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libcbfs/ram_media.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2013 Google, Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/liblzma/Makefile.inc
@@ -1,5 +1,4 @@
##
## This file is part of the libpayload project.
##
## Copyright (C) 2011 secunet Security Networks AG
##
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libpci/Makefile.inc
@@ -1,5 +1,4 @@
##
## This file is part of the libpayload project.
##
## Copyright (C) 2010 coresystems GmbH
##
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/libpci/libpci.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2010 coresystems GmbH
*
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/sample/Makefile
@@ -1,5 +1,4 @@
##
## This file is part of the libpayload project.
##
## Copyright (C) 2008 Advanced Micro Devices, Inc.
##
Expand Down
1 change: 0 additions & 1 deletion payloads/libpayload/sample/hello.c
@@ -1,5 +1,4 @@
/*
* This file is part of the libpayload project.
*
* Copyright (C) 2008 Advanced Micro Devices, Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/linuxcheck/i386.c
@@ -1,5 +1,4 @@
/*
* This file is part of the coreinfo project.
*
* Copyright (C) 2018 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/linuxcheck/linuxcheck.c
@@ -1,5 +1,4 @@
/*
* This file is part of the coreinfo project.
*
* Copyright (C) 2018 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/linuxcheck/linuxcheck.h
@@ -1,5 +1,4 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2018 Google Inc.
*
Expand Down
1 change: 0 additions & 1 deletion payloads/nvramcui/nvramcui.c
@@ -1,5 +1,4 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 secunet Security Networks AG
*
Expand Down
26 changes: 1 addition & 25 deletions src/Kconfig
@@ -1,16 +1,4 @@
##
## This file is part of the coreboot project.
##
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## SPDX-License-Identifier: GPL-2.0-only

mainmenu "coreboot configuration"

Expand Down Expand Up @@ -624,12 +612,6 @@ config GFXUMA
help
Enable Unified Memory Architecture for graphics.

config HAVE_ACPI_TABLES
bool
help
This variable specifies whether a given board has ACPI table support.
It is usually set in mainboard/*/Kconfig.

config HAVE_MP_TABLE
bool
help
Expand All @@ -656,12 +638,6 @@ config ACPI_NHLT
help
Build support for NHLT (non HD Audio) ACPI table generation.

config ACPI_BERT
bool
depends on HAVE_ACPI_TABLES
help
Build an ACPI Boot Error Record Table.

#These Options are here to avoid "undefined" warnings.
#The actual selection and help texts are in the following menu.

Expand Down
34 changes: 25 additions & 9 deletions src/acpi/Kconfig
@@ -1,20 +1,36 @@
# SPDX-License-Identifier: GPL-2.0-only
# This file is part of the coreboot project.

config ACPI_SATA_GENERATOR
bool
default n
config ACPI_AMD_HARDWARE_SLEEP_VALUES
def_bool n
help
Provide common definitions for AMD hardware PM1_CNT register sleep
values.

config ACPI_CPU_STRING
string
default "\\_SB.CP%02d"
depends on HAVE_ACPI_TABLES
help
Use ACPI SATA port generator.
Sets the ACPI name string in the processor scope as written by
the acpigen function. Default is \_SB.CPxx. Note that you need
the \ escape character in the string.

config ACPI_HAVE_PCAT_8259
def_bool y if !ACPI_NO_PCAT_8259

config ACPI_INTEL_HARDWARE_SLEEP_VALUES
def_bool n
help
Provide common definitions for Intel hardware PM1_CNT register sleep
values.

config ACPI_AMD_HARDWARE_SLEEP_VALUES
def_bool n
config ACPI_NO_PCAT_8259
bool
help
Provide common definitions for AMD hardware PM1_CNT register sleep
values.
Selected by platforms that don't expose a PC/AT 8259 PIC pair.

config HAVE_ACPI_TABLES
bool
help
This variable specifies whether a given board has ACPI table support.
It is usually set in mainboard/*/Kconfig.
23 changes: 21 additions & 2 deletions src/acpi/Makefile.inc
@@ -1,4 +1,23 @@
# SPDX-License-Identifier: GPL-2.0-only
# This file is part of the coreboot project.

ramstage-$(CONFIG_ACPI_SATA_GENERATOR) += sata.c
ifeq ($(CONFIG_HAVE_ACPI_TABLES),y)

ramstage-y += acpi.c
ramstage-y += acpigen.c
ramstage-y += acpigen_dsm.c
ramstage-y += acpigen_ps2_keybd.c
ramstage-y += acpigen_usb.c
ramstage-y += device.c
ramstage-y += pld.c
ramstage-y += sata.c
ramstage-y += soundwire.c

ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/acpi_tables.c),)
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c
endif
$(eval $(call asl_template,dsdt))
ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/fadt.c),)
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/fadt.c
endif

endif # CONFIG_GENERATE_ACPI_TABLES
27 changes: 17 additions & 10 deletions src/arch/x86/acpi.c → src/acpi/acpi.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/*
* coreboot ACPI Table support
*/
Expand All @@ -16,13 +15,12 @@

#include <console/console.h>
#include <string.h>
#include <arch/acpi.h>
#include <arch/acpi_ivrs.h>
#include <arch/acpigen.h>
#include <acpi/acpi.h>
#include <acpi/acpi_ivrs.h>
#include <acpi/acpigen.h>
#include <device/pci.h>
#include <cbmem.h>
#include <commonlib/helpers.h>
#include <cpu/x86/lapic_def.h>
#include <cpu/cpu.h>
#include <cbfs.h>
#include <version.h>
Expand Down Expand Up @@ -222,6 +220,15 @@ int acpi_create_madt_lx2apic_nmi(acpi_madt_lx2apic_nmi_t *lapic_nmi, u32 cpu,
return lapic_nmi->length;
}

__weak uintptr_t cpu_get_lapic_addr(void)
{
/*
* If an architecture does not support LAPIC, this weak implementation returns LAPIC
* addr as 0.
*/
return 0;
}

void acpi_create_madt(acpi_madt_t *madt)
{
acpi_header_t *header = &(madt->header);
Expand All @@ -242,7 +249,7 @@ void acpi_create_madt(acpi_madt_t *madt)
header->length = sizeof(acpi_madt_t);
header->revision = get_acpi_table_revision(MADT);

madt->lapic_addr = LOCAL_APIC_ADDR;
madt->lapic_addr = cpu_get_lapic_addr();
if (CONFIG(ACPI_HAVE_PCAT_8259))
madt->flags |= 1;

Expand Down Expand Up @@ -758,9 +765,9 @@ void acpi_create_hpet(acpi_hpet_t *hpet)
header->checksum = acpi_checksum((void *)hpet, sizeof(acpi_hpet_t));
}

void acpi_create_vfct(struct device *device,
void acpi_create_vfct(const struct device *device,
acpi_vfct_t *vfct,
unsigned long (*acpi_fill_vfct)(struct device *device,
unsigned long (*acpi_fill_vfct)(const struct device *device,
acpi_vfct_t *vfct_struct, unsigned long current))
{
acpi_header_t *header = &(vfct->header);
Expand Down Expand Up @@ -791,7 +798,7 @@ void acpi_create_vfct(struct device *device,
header->checksum = acpi_checksum((void *)vfct, header->length);
}

void acpi_create_ipmi(struct device *device,
void acpi_create_ipmi(const struct device *device,
struct acpi_spmi *spmi,
const u16 ipmi_revision,
const acpi_addr_t *addr,
Expand Down Expand Up @@ -871,7 +878,7 @@ void acpi_create_ivrs(acpi_ivrs_t *ivrs,
header->checksum = acpi_checksum((void *)ivrs, header->length);
}

unsigned long acpi_write_hpet(struct device *device, unsigned long current,
unsigned long acpi_write_hpet(const struct device *device, unsigned long current,
acpi_rsdp_t *rsdp)
{
acpi_hpet_t *hpet;
Expand Down
81 changes: 77 additions & 4 deletions src/arch/x86/acpigen.c → src/acpi/acpigen.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

/* How much nesting do we support? */
#define ACPIGEN_LENSTACK_SIZE 10
Expand All @@ -13,10 +12,13 @@

#include <lib.h>
#include <string.h>
#include <arch/acpigen.h>
#include <acpi/acpigen.h>
#include <assert.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci_def.h>
#include <device/pci_type.h>
#include <device/soundwire.h>

static char *gencurrent;

Expand Down Expand Up @@ -512,7 +514,7 @@ static void acpigen_write_field_name(const char *name, uint32_t size)
* PMCS, 2
* }
*/
void acpigen_write_field(const char *name, struct fieldlist *l, size_t count,
void acpigen_write_field(const char *name, const struct fieldlist *l, size_t count,
uint8_t flags)
{
uint16_t i;
Expand Down Expand Up @@ -1145,7 +1147,7 @@ void acpigen_write_uuid(const char *uuid)
* PowerResource (name, level, order)
*/
void acpigen_write_power_res(const char *name, uint8_t level, uint16_t order,
const char *dev_states[], size_t dev_states_count)
const char * const dev_states[], size_t dev_states_count)
{
size_t i;
for (i = 0; i < dev_states_count; i++) {
Expand Down Expand Up @@ -1184,6 +1186,14 @@ void acpigen_write_store_ops(uint8_t src, uint8_t dst)
acpigen_emit_byte(dst);
}

/* Store (src, "namestr") */
void acpigen_write_store_op_to_namestr(uint8_t src, const char *dst)
{
acpigen_write_store();
acpigen_emit_byte(src);
acpigen_emit_namestring(dst);
}

/* Or (arg1, arg2, res) */
void acpigen_write_or(uint8_t arg1, uint8_t arg2, uint8_t res)
{
Expand Down Expand Up @@ -1272,6 +1282,20 @@ void acpigen_write_if_lequal_op_int(uint8_t op, uint64_t val)
acpigen_write_integer(val);
}

/*
* Generates ACPI code for checking if operand1 and operand2 are equal, where,
* operand1 is namestring and operand2 is an integer.
*
* If (Lequal ("namestr", val))
*/
void acpigen_write_if_lequal_namestr_int(const char *namestr, uint64_t val)
{
acpigen_write_if();
acpigen_emit_byte(LEQUAL_OP);
acpigen_emit_namestring(namestr);
acpigen_write_integer(val);
}

void acpigen_write_else(void)
{
acpigen_emit_byte(ELSE_OP);
Expand Down Expand Up @@ -1840,3 +1864,52 @@ void acpigen_resource_qword(u16 res_type, u16 gen_flags, u16 type_flags,
acpigen_emit_qword(translation);
acpigen_emit_qword(length);
}

void acpigen_write_ADR(uint64_t adr)
{
acpigen_write_name_qword("_ADR", adr);
}

void acpigen_write_ADR_pci_devfn(pci_devfn_t devfn)
{
/*
* _ADR for PCI Bus is encoded as follows:
* [63:32] - unused
* [31:16] - device #
* [15:0] - function #
*/
acpigen_write_ADR(PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn));
}

void acpigen_write_ADR_pci_device(const struct device *dev)
{
assert(dev->path.type == DEVICE_PATH_PCI);
acpigen_write_ADR_pci_devfn(dev->path.pci.devfn);
}

/**
* acpigen_write_ADR_soundwire_device() - SoundWire ACPI Device Address Encoding.
* @address: SoundWire device address properties.
*
* From SoundWire Discovery and Configuration Specification Version 1.0 Table 3.
*
* 63..52 - Reserved (0)
* 51..48 - Zero-based SoundWire Link ID, relative to the immediate parent.
* Used when a Controller has multiple master devices, each producing a
* separate SoundWire Link. Set to 0 for single-link controllers.
* 47..0 - SoundWire Device ID Encoding from specification version 1.2 table 88
* 47..44 - SoundWire specification version that this device supports
* 43..40 - Unique ID for multiple devices
* 39..24 - MIPI standard manufacturer code
* 23..08 - Vendor defined part ID
* 07..00 - MIPI class encoding
*/
void acpigen_write_ADR_soundwire_device(const struct soundwire_address *address)
{
acpigen_write_ADR((((uint64_t)address->link_id & 0xf) << 48) |
(((uint64_t)address->version & 0xf) << 44) |
(((uint64_t)address->unique_id & 0xf) << 40) |
(((uint64_t)address->manufacturer_id & 0xffff) << 24) |
(((uint64_t)address->part_id & 0xffff) << 8) |
(((uint64_t)address->class & 0xff)));
}
5 changes: 2 additions & 3 deletions src/arch/x86/acpigen_dsm.c → src/acpi/acpigen_dsm.c
@@ -1,8 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <arch/acpigen.h>
#include <arch/acpigen_dsm.h>
#include <acpi/acpigen.h>
#include <acpi/acpigen_dsm.h>

/* ------------------- I2C HID DSM ---------------------------- */

Expand Down
@@ -1,12 +1,11 @@
/*
* This file is part of the coreboot project.
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/

#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <arch/acpigen_ps2_keybd.h>
#include <acpi/acpi.h>
#include <acpi/acpigen.h>
#include <acpi/acpigen_ps2_keybd.h>
#include <console/console.h>
#include <input-event-codes.h>

Expand Down Expand Up @@ -169,6 +168,8 @@ static uint32_t rest_of_keymaps[] = {
KEYMAP(0xd0, KEY_DOWN),
KEYMAP(0xcd, KEY_RIGHT),
KEYMAP(0xc8, KEY_UP),
/* Power Key */
KEYMAP(0xde, KEY_POWER),
};

static void ssdt_generate_physmap(struct acpi_dp *dp, uint8_t num_top_row_keys,
Expand Down
136 changes: 136 additions & 0 deletions src/acpi/acpigen_usb.c
@@ -0,0 +1,136 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */

#include <acpi/acpi.h>
#include <acpi/acpi_device.h>
#include <acpi/acpigen.h>
#include <acpi/acpigen_usb.h>

static const char *power_role_to_str(enum usb_typec_power_role power_role)
{
switch (power_role) {
case TYPEC_POWER_ROLE_SOURCE:
return "source";
case TYPEC_POWER_ROLE_SINK:
return "sink";
case TYPEC_POWER_ROLE_DUAL:
return "dual";
default:
return "unknown";
}
}

static const char *try_power_role_to_str(enum usb_typec_try_power_role try_power_role)
{
switch (try_power_role) {
case TYPEC_TRY_POWER_ROLE_NONE:
/*
* This should never get returned; if there is no try-power role for a device,
* then the try-power-role field is not added to the DSD. Thus, this is just
* for completeness.
*/
return "none";
case TYPEC_TRY_POWER_ROLE_SINK:
return "sink";
case TYPEC_TRY_POWER_ROLE_SOURCE:
return "source";
default:
return "unknown";
}
}

static const char *data_role_to_str(enum usb_typec_data_role data_role)
{
switch (data_role) {
case TYPEC_DATA_ROLE_DFP:
return "host";
case TYPEC_DATA_ROLE_UFP:
return "device";
case TYPEC_DATA_ROLE_DUAL:
return "dual";
default:
return "unknown";
}
}

/* Add port capabilities as DP properties */
static void add_port_caps(struct acpi_dp *dsd,
const struct typec_connector_class_config *config)
{
acpi_dp_add_string(dsd, "power-role", power_role_to_str(config->power_role));
acpi_dp_add_string(dsd, "data-role", data_role_to_str(config->data_role));

if (config->try_power_role != TYPEC_TRY_POWER_ROLE_NONE)
acpi_dp_add_string(dsd, "try-power-role",
try_power_role_to_str(config->try_power_role));
}

static void add_device_ref(struct acpi_dp *dsd,
const char *prop_name,
const struct device *dev)
{
const char *path;
char *fresh;

if (!dev)
return;

/*
* Unfortunately, the acpi_dp_* API doesn't write out the data immediately, thus we need
* different storage areas for all of the strings, so strdup() is used for that. It is
* safe to use strdup() here, because the strings are generated at build-time and are
* guaranteed to be NUL-terminated (they come from the devicetree).
*/
path = acpi_device_path(dev);
if (path) {
fresh = strdup(path);
if (fresh)
acpi_dp_add_reference(dsd, prop_name, fresh);
}
}

static void add_device_references(struct acpi_dp *dsd,
const struct typec_connector_class_config *config)
{
/*
* Add references to the USB port objects so that the consumer of this information can
* know whether the port supports USB2, USB3, and/or USB4.
*/
add_device_ref(dsd, "usb2-port", config->usb2_port);
add_device_ref(dsd, "usb3-port", config->usb3_port);
add_device_ref(dsd, "usb4-port", config->usb4_port);

/*
* Add references to the ACPI device(s) which control the orientation, USB data role and
* data muxing.
*/
add_device_ref(dsd, "orientation-switch", config->orientation_switch);
add_device_ref(dsd, "usb-role-switch", config->usb_role_switch);
add_device_ref(dsd, "mode-switch", config->mode_switch);
}

void acpigen_write_typec_connector(const struct typec_connector_class_config *config,
int port_number,
add_custom_dsd_property_cb add_custom_dsd_property)
{
struct acpi_dp *dsd;
char name[5];

/* Create a CONx device */
snprintf(name, sizeof(name), "CON%1X", port_number);
acpigen_write_device(name);
acpigen_write_name_integer("_ADR", port_number);

dsd = acpi_dp_new_table("_DSD");

/* Write out the _DSD table */
acpi_dp_add_integer(dsd, "port-number", port_number);
add_port_caps(dsd, config);
add_device_references(dsd, config);

/* Allow client to add custom properties if desired */
if (add_custom_dsd_property)
add_custom_dsd_property(dsd, port_number);
acpi_dp_write(dsd);

acpigen_pop_len(); /* Device */
}
49 changes: 40 additions & 9 deletions src/arch/x86/acpi_device.c → src/acpi/device.c
@@ -1,10 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <assert.h>
#include <string.h>
#include <arch/acpi.h>
#include <arch/acpi_device.h>
#include <arch/acpigen.h>
#include <acpi/acpi.h>
#include <acpi/acpi_device.h>
#include <acpi/acpigen.h>
#include <device/device.h>
#include <device/path.h>
#include <stdlib.h>
Expand Down Expand Up @@ -94,7 +94,7 @@ const char *acpi_device_hid(const struct device *dev)
* Generate unique ID based on the ACPI path.
* Collisions on the same _HID are possible but very unlikely.
*/
uint32_t acpi_device_uid(struct device *dev)
uint32_t acpi_device_uid(const struct device *dev)
{
const char *path = acpi_device_path(dev);
if (!path)
Expand Down Expand Up @@ -199,7 +199,7 @@ int acpi_device_status(const struct device *dev)


/* Write the unique _UID based on ACPI device path. */
void acpi_device_write_uid(struct device *dev)
void acpi_device_write_uid(const struct device *dev)
{
acpigen_write_name_integer("_UID", acpi_device_uid(dev));
}
Expand Down Expand Up @@ -526,7 +526,7 @@ void acpi_device_write_spi(const struct acpi_spi *spi)
/* PowerResource() with Enable and/or Reset control */
void acpi_device_add_power_res(const struct acpi_power_res_params *params)
{
static const char *power_res_dev_states[] = { "_PR0", "_PR3" };
static const char * const power_res_dev_states[] = { "_PR0", "_PR3" };
unsigned int reset_gpio = params->reset_gpio ? params->reset_gpio->pins[0] : 0;
unsigned int enable_gpio = params->enable_gpio ? params->enable_gpio->pins[0] : 0;
unsigned int stop_gpio = params->stop_gpio ? params->stop_gpio->pins[0] : 0;
Expand Down Expand Up @@ -664,7 +664,7 @@ void acpi_dp_write(struct acpi_dp *table)
char *dp_count, *prop_count = NULL;
int child_count = 0;

if (!table || table->type != ACPI_DP_TYPE_TABLE)
if (!table || table->type != ACPI_DP_TYPE_TABLE || !table->next)
return;

/* Name (name) */
Expand Down Expand Up @@ -878,7 +878,7 @@ struct acpi_dp *acpi_dp_add_array(struct acpi_dp *dp, struct acpi_dp *array)
}

struct acpi_dp *acpi_dp_add_integer_array(struct acpi_dp *dp, const char *name,
uint64_t *array, int len)
const uint64_t *array, int len)
{
struct acpi_dp *dp_array;
int i;
Expand Down Expand Up @@ -927,3 +927,34 @@ struct acpi_dp *acpi_dp_add_gpio(struct acpi_dp *dp, const char *name,

return gpio;
}

/*
* This function writes a PCI device with _ADR object:
* Example:
* Scope (\_SB.PCI0)
* {
* Device (IGFX)
* {
* Name (_ADR, 0x0000000000000000)
* Method (_STA, 0, NotSerialized) { Return (status) }
* }
* }
*/
void acpi_device_write_pci_dev(const struct device *dev)
{
const char *scope = acpi_device_scope(dev);
const char *name = acpi_device_name(dev);

assert(dev->path.type == DEVICE_PATH_PCI);
assert(name);
assert(scope);

acpigen_write_scope(scope);
acpigen_write_device(name);

acpigen_write_ADR_pci_device(dev);
acpigen_write_STA(acpi_device_status(dev));

acpigen_pop_len(); /* Device */
acpigen_pop_len(); /* Scope */
}
5 changes: 2 additions & 3 deletions src/arch/x86/acpi_pld.c → src/acpi/pld.c
@@ -1,10 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <stdint.h>
#include <string.h>
#include <arch/acpi.h>
#include <arch/acpi_pld.h>
#include <acpi/acpi.h>
#include <acpi/acpi_pld.h>

int acpi_pld_fill_usb(struct acpi_pld *pld, enum acpi_upc_type type,
struct acpi_pld_group *group)
Expand Down
8 changes: 3 additions & 5 deletions src/acpi/sata.c
@@ -1,10 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include "sata.h"

#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <acpi/acpi.h>
#include <acpi/acpigen.h>
#include <acpi/acpi_sata.h>

/* e.g.
* generate_sata_ssdt_ports("\_SB.PCI0.SATA", 0x3);
Expand Down
429 changes: 429 additions & 0 deletions src/acpi/soundwire.c

Large diffs are not rendered by default.

4 changes: 0 additions & 4 deletions src/arch/arm/Makefile.inc
@@ -1,8 +1,4 @@
################################################################################
##
## SPDX-License-Identifier: GPL-2.0-only
## This file is part of the coreboot project.
##

###############################################################################
# ARM specific options
Expand Down
5 changes: 0 additions & 5 deletions src/arch/arm/armv4/Makefile.inc
@@ -1,9 +1,4 @@
################################################################################
##
## SPDX-License-Identifier: GPL-2.0-only
## This file is part of the coreboot project.
##
###############################################################################

armv4_flags = -marm -march=armv4t -I$(src)/arch/arm/include/armv4/ \
-D__COREBOOT_ARM_ARCH__=4
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/armv4/bootblock.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/*
* Early initialization code for ARM architecture.
*
Expand Down
2 changes: 0 additions & 2 deletions src/arch/arm/armv4/cache.c
@@ -1,12 +1,10 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */
/*
* cache.c: Cache maintenance routines for ARMv7-A and ARMv7-R
*
* Reference: ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition
*/

#include <stdint.h>

#include <arch/cache.h>

Expand Down
5 changes: 0 additions & 5 deletions src/arch/arm/armv7/Makefile.inc
@@ -1,9 +1,4 @@
################################################################################
##
## SPDX-License-Identifier: GPL-2.0-only
## This file is part of the coreboot project.
##
###############################################################################

armv7_flags = -mthumb -I$(src)/arch/arm/include/armv7/ -D__COREBOOT_ARM_ARCH__=7
armv7-a_flags = -march=armv7-a $(armv7_flags) -D__COREBOOT_ARM_V7_A__
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/armv7/bootblock.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/*
* This file is based off of the OMAP3530/ARM Cortex start.S file from Das
* U-Boot, which itself got the file from armboot.
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/armv7/bootblock_m.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */

#include <arch/asm.h>

Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/armv7/cache.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */
/*
* cache.c: Cache maintenance routines for ARMv7-A and ARMv7-R
*
Expand Down
2 changes: 0 additions & 2 deletions src/arch/arm/armv7/cache_m.c
@@ -1,10 +1,8 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */
/*
* cache.c: Cache maintenance routines for ARMv7-M
*/

#include <stdint.h>

#include <arch/cache.h>

Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/armv7/cpu.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */
/*
* Optimized assembly for low-level CPU operations on ARMv7 processors.
*
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/armv7/exception.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */

#include <stdint.h>
#include <types.h>
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/armv7/exception_asm.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */

.text

Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/armv7/exception_mr.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */

#include <arch/exception.h>
#include <console/console.h>
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/armv7/mmu.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */

#include <assert.h>
#include <commonlib/helpers.h>
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/armv7/thread.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <thread.h>

Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/asmlib.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/*
* This file contains arm architecture specific defines
* for the different processors.
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/boot.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <arch/cache.h>
#include <program_loading.h>
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/clock.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */

#include <stdint.h>
#include <arch/clock.h>
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/cpu.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */

#include <arch/cpu.h>
#include <commonlib/helpers.h>
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/div0.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* This file is part of the coreboot project. */

#include <console/console.h>

Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/eabi_compat.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* This file is part of the coreboot project. */

#include <stddef.h>
#include <string.h>
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/id.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <build.h>

Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/arch/asm.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARM_ASM_H
#define __ARM_ASM_H
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/arch/boot/boot.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef ASM_ARM_BOOT_H
#define ASM_ARM_BOOT_H
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/arch/byteorder.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef _BYTEORDER_H
#define _BYTEORDER_H
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/arch/cbconfig.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef _ARCH_CBCONFIG_H_
#define _ARCH_CBCONFIG_H_
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/arch/clock.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARM_CLOCK_H_
#define __ARM_CLOCK_H_
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/arch/header.ld
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <rules.h>

Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/arch/hlt.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef ARCH_HLT_H
#define ARCH_HLT_H
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/arch/memlayout.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

/* This file contains macro definitions for memlayout.ld linker scripts. */

Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/arch/pci_ops.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef ARCH_ARM_PCI_OPS_H
#define ARCH_ARM_PCI_OPS_H
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/arch/stages.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARCH_STAGES_H
#define __ARCH_STAGES_H
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/armv4/arch/cache.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */
/*
* cache.h: Cache maintenance API for ARM
*/
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/armv4/arch/cpu.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARCH_CPU_H__
#define __ARCH_CPU_H__
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/armv4/arch/exception.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */

#ifndef _ARCH_EXCEPTION_H
#define _ARCH_EXCEPTION_H
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/armv4/arch/mmio.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/* Originally imported from linux/include/asm-arm/io.h. This file has changed
* substantially since then.
*/
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/armv4/arch/smp/spinlock.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef _ARCH_SMP_SPINLOCK_H
#define _ARCH_SMP_SPINLOCK_H
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/armv7.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* This file is part of the coreboot project. */

#ifndef ARMV7_H
#define ARMV7_H
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/armv7/arch/cache.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */
/*
* cache.h: Cache maintenance API for ARM
*/
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/armv7/arch/cpu.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARCH_CPU_H__
#define __ARCH_CPU_H__
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/armv7/arch/exception.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */

#ifndef _ARCH_EXCEPTION_H
#define _ARCH_EXCEPTION_H
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/armv7/arch/mmio.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/*
* Originally imported from linux/include/asm-arm/io.h. This file has changed
* substantially since then.
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/clocks.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* This file is part of the coreboot project. */

/* Standard clock speeds */

Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/include/smp/spinlock.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef ARCH_SMP_SPINLOCK_H
#define ARCH_SMP_SPINLOCK_H
Expand Down
5 changes: 0 additions & 5 deletions src/arch/arm/libgcc/Makefile.inc
@@ -1,9 +1,4 @@
################################################################################
##
## SPDX-License-Identifier: GPL-2.0-only
## This file is part of the coreboot project.
##
################################################################################

libgcc_files = ashldi3.S lib1funcs.S lshrdi3.S muldi3.S ucmpdi2.S uldivmod.S
libgcc_files += udivmoddi4.c umoddi3.c
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/libgcc/ashldi3.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* This file is part of the coreboot project. */

#if defined __GNUC__

Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/libgcc/lib1funcs.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* This file is part of the coreboot project. */
/*
* linux/arch/arm/lib/lib1funcs.S: Optimized ARM division routines
*/
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/libgcc/libgcc.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARCH_ARM_LIBGCC_LIBGCC_H__
#define __ARCH_ARM_LIBGCC_LIBGCC_H__
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/libgcc/lshrdi3.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* This file is part of the coreboot project. */

#if defined __GNUC__

Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/libgcc/muldi3.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/* Based on linux/arch/arm/lib/muldi3.S */

#if defined __GNUC__
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/libgcc/ucmpdi2.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/* Based on linux/arch/arm/lib/ucmpdi2.S */

#if defined __GNUC__
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/libgcc/udivmoddi4.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include "libgcc.h"

Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/libgcc/uldivmod.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */
/* This file is part of the coreboot project. */

#include <arch/asm.h>

Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/libgcc/umoddi3.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include "libgcc.h"
uint64_t __umoddi3(uint64_t num, uint64_t den)
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/memcpy.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/*
* Based on linux/arch/arm/lib/memcpy.S
*/
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/memmove.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/* Based on linux/arch/arm/lib/memmove.S */

#include <arch/asm.h>
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/memset.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/*
* Based on linux/arch/arm/lib/memset.S
*
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/stages.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

/*
* This file contains entry/exit functions for each stage during coreboot
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/tables.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <bootmem.h>
#include <boot/tables.h>
Expand Down
5 changes: 0 additions & 5 deletions src/arch/arm64/Makefile.inc
@@ -1,9 +1,4 @@
################################################################################
##
## SPDX-License-Identifier: GPL-2.0-only
## This file is part of the coreboot project.
##
################################################################################

################################################################################
# Take care of subdirectories
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm64/arch_timer.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <timer.h>
#include <arch/lib_helpers.h>
Expand Down
5 changes: 0 additions & 5 deletions src/arch/arm64/armv8/Makefile.inc
@@ -1,9 +1,4 @@
################################################################################
##
## SPDX-License-Identifier: GPL-2.0-only
## This file is part of the coreboot project.
##
################################################################################

ifeq ($(CONFIG_ARCH_ARMV8_EXTENSION),0)
march = armv8-a
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm64/armv8/bootblock.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/*
* Early initialization code for aarch64 (a.k.a. armv8)
*/
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm64/armv8/cache.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */
/*
* cache.c: Cache maintenance routines for ARMv8 (aarch64)
*
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm64/armv8/cpu.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/*
* Optimized assembly for low-level CPU operations on ARM64 processors.
*/
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1 change: 0 additions & 1 deletion src/arch/arm64/armv8/exception.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */

#include <stdint.h>
#include <types.h>
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1 change: 0 additions & 1 deletion src/arch/arm64/armv8/mmu.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */

#include <assert.h>
#include <stdint.h>
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1 change: 0 additions & 1 deletion src/arch/arm64/bl31.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <arch/lib_helpers.h>
#include <arch/mmu.h>
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1 change: 0 additions & 1 deletion src/arch/arm64/boot.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <cbmem.h>
#include <arch/lib_helpers.h>
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1 change: 0 additions & 1 deletion src/arch/arm64/div0.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* This file is part of the coreboot project. */

#include <console/console.h>

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1 change: 0 additions & 1 deletion src/arch/arm64/eabi_compat.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* This file is part of the coreboot project. */
/*
* Utility functions needed for (some) EABI conformant tool chains.
*/
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1 change: 0 additions & 1 deletion src/arch/arm64/fit_payload.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* This file is part of the coreboot project. */

#include <cbfs.h>
#include <commonlib/bsd/compression.h>
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1 change: 0 additions & 1 deletion src/arch/arm64/id.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <build.h>

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1 change: 0 additions & 1 deletion src/arch/arm64/include/arch/acpi.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARCH_ACPI_H_
#define __ARCH_ACPI_H_
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1 change: 0 additions & 1 deletion src/arch/arm64/include/arch/acpigen.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARCH_ACPIGEN_H_
#define __ARCH_ACPIGEN_H_
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1 change: 0 additions & 1 deletion src/arch/arm64/include/arch/asm.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARM_ARM64_ASM_H
#define __ARM_ARM64_ASM_H
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1 change: 0 additions & 1 deletion src/arch/arm64/include/arch/boot/boot.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef ASM_ARM64_BOOT_H
#define ASM_ARM64_BOOT_H
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1 change: 0 additions & 1 deletion src/arch/arm64/include/arch/byteorder.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef _BYTEORDER_H
#define _BYTEORDER_H
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1 change: 0 additions & 1 deletion src/arch/arm64/include/arch/cbconfig.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef _ARCH_CBCONFIG_H_
#define _ARCH_CBCONFIG_H_
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1 change: 0 additions & 1 deletion src/arch/arm64/include/arch/header.ld
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <rules.h>

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1 change: 0 additions & 1 deletion src/arch/arm64/include/arch/hlt.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef ARCH_HLT_H
#define ARCH_HLT_H
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1 change: 0 additions & 1 deletion src/arch/arm64/include/arch/memlayout.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

/* This file contains macro definitions for memlayout.ld linker scripts. */

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1 change: 0 additions & 1 deletion src/arch/arm64/include/arch/mpidr.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARCH_MPIDR_H__
#define __ARCH_MPIDR_H__
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1 change: 0 additions & 1 deletion src/arch/arm64/include/arch/pci_ops.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef ARCH_ARM64_PCI_OPS_H
#define ARCH_ARM64_PCI_OPS_H
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1 change: 0 additions & 1 deletion src/arch/arm64/include/arch/stages.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARCH_STAGES_H
#define __ARCH_STAGES_H
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1 change: 0 additions & 1 deletion src/arch/arm64/include/arch/transition.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARCH_ARM64_TRANSITION_H__
#define __ARCH_ARM64_TRANSITION_H__
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1 change: 0 additions & 1 deletion src/arch/arm64/include/armv8/arch/barrier.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/*
* Based on arch/arm/include/asm/barrier.h
*/
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1 change: 0 additions & 1 deletion src/arch/arm64/include/armv8/arch/cache.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */
/*
* cache.h: Cache maintenance API for ARM64
*/
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1 change: 0 additions & 1 deletion src/arch/arm64/include/armv8/arch/cpu.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARCH_CPU_H__
#define __ARCH_CPU_H__
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1 change: 0 additions & 1 deletion src/arch/arm64/include/armv8/arch/exception.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */

#ifndef _ARCH_EXCEPTION_H
#define _ARCH_EXCEPTION_H
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1 change: 0 additions & 1 deletion src/arch/arm64/include/armv8/arch/lib_helpers.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/*
* lib_helpers.h: All library function prototypes and macros are defined in this
* file.
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1 change: 0 additions & 1 deletion src/arch/arm64/include/armv8/arch/mmio.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/*
* Originally imported from linux/include/asm-arm/io.h. This file has changed
* substantially since then.
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1 change: 0 additions & 1 deletion src/arch/arm64/include/armv8/arch/mmu.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARCH_ARM64_MMU_H__
#define __ARCH_ARM64_MMU_H__
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1 change: 0 additions & 1 deletion src/arch/arm64/include/bl31.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __BL31_H__
#define __BL31_H__
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1 change: 0 additions & 1 deletion src/arch/arm64/include/clocks.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* This file is part of the coreboot project. */

/* Standard clock speeds */

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1 change: 0 additions & 1 deletion src/arch/arm64/include/cpu/cortex_a57.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARCH_ARM64_CORTEX_A57_H__
#define __ARCH_ARM64_CORTEX_A57_H__
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1 change: 0 additions & 1 deletion src/arch/arm64/memcpy.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <arch/asm.h>

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1 change: 0 additions & 1 deletion src/arch/arm64/memmove.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <arch/asm.h>
/*
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1 change: 0 additions & 1 deletion src/arch/arm64/memset.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <arch/asm.h>

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1 change: 0 additions & 1 deletion src/arch/arm64/ramdetect.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* This file is part of the coreboot project. */

#include <types.h>
#include <device/mmio.h>
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1 change: 0 additions & 1 deletion src/arch/arm64/romstage.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <arch/exception.h>
#include <arch/stages.h>
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1 change: 0 additions & 1 deletion src/arch/arm64/tables.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <bootmem.h>
#include <boot/tables.h>
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1 change: 0 additions & 1 deletion src/arch/arm64/transition.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <arch/cache.h>
#include <arch/lib_helpers.h>
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1 change: 0 additions & 1 deletion src/arch/arm64/transition_asm.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

/*
* transition_asm.S: This file handles the entry and exit from an exception
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5 changes: 0 additions & 5 deletions src/arch/ppc64/Makefile.inc
@@ -1,9 +1,4 @@
################################################################################
##
## SPDX-License-Identifier: GPL-2.0-only
## This file is part of the coreboot project.
##
################################################################################

ppc64_flags = -I$(src)/arch/ppc64/ -mbig-endian -mcpu=power8 -mtune=power8

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1 change: 0 additions & 1 deletion src/arch/ppc64/boot.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <program_loading.h>

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1 change: 0 additions & 1 deletion src/arch/ppc64/bootblock.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/*
* Early initialization code for POWER8.
*/
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1 change: 0 additions & 1 deletion src/arch/ppc64/id.ld
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

SECTIONS {
. = (0xffffffff - CONFIG_ID_SECTION_OFFSET) - (__id_end - __id_start) + 1;
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1 change: 0 additions & 1 deletion src/arch/ppc64/include/arch/byteorder.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef _BYTEORDER_H
#define _BYTEORDER_H
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1 change: 0 additions & 1 deletion src/arch/ppc64/include/arch/cache.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */

#ifndef ARCH_CACHE_H
#define ARCH_CACHE_H
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1 change: 0 additions & 1 deletion src/arch/ppc64/include/arch/cbconfig.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef _ARCH_CBCONFIG_H_
#define _ARCH_CBCONFIG_H_
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1 change: 0 additions & 1 deletion src/arch/ppc64/include/arch/cpu.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARCH_CPU_H__
#define __ARCH_CPU_H__
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1 change: 0 additions & 1 deletion src/arch/ppc64/include/arch/exception.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef _ARCH_EXCEPTION_H
#define _ARCH_EXCEPTION_H
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1 change: 0 additions & 1 deletion src/arch/ppc64/include/arch/header.ld
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

/* We use ELF as output format. So that we can debug the code in some form. */
OUTPUT_ARCH(powerpc)
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1 change: 0 additions & 1 deletion src/arch/ppc64/include/arch/hlt.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

static __always_inline void hlt(void)
{
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1 change: 0 additions & 1 deletion src/arch/ppc64/include/arch/io.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef _ASM_IO_H
#define _ASM_IO_H
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1 change: 0 additions & 1 deletion src/arch/ppc64/include/arch/memlayout.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

/* This file contains macro definitions for memlayout.ld linker scripts. */

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1 change: 0 additions & 1 deletion src/arch/ppc64/include/arch/mmio.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARCH_MMIO_H__
#define __ARCH_MMIO_H__
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1 change: 0 additions & 1 deletion src/arch/ppc64/include/arch/stages.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARCH_STAGES_H
#define __ARCH_STAGES_H
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1 change: 0 additions & 1 deletion src/arch/ppc64/prologue.inc
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

.section ".rom.data", "a", @progbits
.section ".rom.text", "ax", @progbits
1 change: 0 additions & 1 deletion src/arch/ppc64/rom_media.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <boot_device.h>

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1 change: 0 additions & 1 deletion src/arch/ppc64/stages.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

/*
* This file contains entry/exit functions for each stage during coreboot
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1 change: 0 additions & 1 deletion src/arch/ppc64/tables.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <bootmem.h>
#include <boot/tables.h>
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5 changes: 0 additions & 5 deletions src/arch/riscv/Makefile.inc
@@ -1,9 +1,4 @@
################################################################################
##
## SPDX-License-Identifier: GPL-2.0-only
## This file is part of the coreboot project.
##
################################################################################

################################################################################
## RISC-V specific options
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1 change: 0 additions & 1 deletion src/arch/riscv/arch_timer.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <device/mmio.h>
#include <arch/encoding.h>
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1 change: 0 additions & 1 deletion src/arch/riscv/boot.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <program_loading.h>
#include <vm.h>
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1 change: 0 additions & 1 deletion src/arch/riscv/bootblock.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/*
* Early initialization code for RISC-V
*/
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2 changes: 0 additions & 2 deletions src/arch/riscv/fit_payload.c
@@ -1,12 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* This file is part of the coreboot project. */

#include <cbfs.h>
#include <commonlib/bsd/compression.h>
#include <console/console.h>
#include <bootmem.h>
#include <program_loading.h>
#include <lib.h>
#include <fit.h>
#include <endian.h>

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1 change: 0 additions & 1 deletion src/arch/riscv/fp_asm.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

/*
* This file define some function used to swap value between memory
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1 change: 0 additions & 1 deletion src/arch/riscv/include/arch/barrier.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */

#ifndef __ARCH_BARRIER_H_
#define __ARCH_BARRIER_H__
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1 change: 0 additions & 1 deletion src/arch/riscv/include/arch/boot.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef ARCH_RISCV_INCLUDE_ARCH_BOOT_H
#define ARCH_RISCV_INCLUDE_ARCH_BOOT_H
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1 change: 0 additions & 1 deletion src/arch/riscv/include/arch/byteorder.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef _BYTEORDER_H
#define _BYTEORDER_H
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1 change: 0 additions & 1 deletion src/arch/riscv/include/arch/cache.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */

#ifndef ARCH_CACHE_H
#define ARCH_CACHE_H
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1 change: 0 additions & 1 deletion src/arch/riscv/include/arch/cbconfig.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef _ARCH_CBCONFIG_H_
#define _ARCH_CBCONFIG_H_
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1 change: 0 additions & 1 deletion src/arch/riscv/include/arch/cpu.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARCH_CPU_H__
#define __ARCH_CPU_H__
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1 change: 0 additions & 1 deletion src/arch/riscv/include/arch/encoding.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-4-Clause-UC */
/* This file is part of the coreboot project. */

#ifndef RISCV_CSR_ENCODING_H
#define RISCV_CSR_ENCODING_H
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1 change: 0 additions & 1 deletion src/arch/riscv/include/arch/errno.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-4-Clause-UC */
/* This file is part of the coreboot project. */

#ifndef _RISCV_ERRNO_BASE_H
#define _RISCV_ERRNO_BASE_H
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1 change: 0 additions & 1 deletion src/arch/riscv/include/arch/exception.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* This file is part of the coreboot project. */

#ifndef _ARCH_EXCEPTION_H
#define _ARCH_EXCEPTION_H
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1 change: 0 additions & 1 deletion src/arch/riscv/include/arch/header.ld
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <rules.h>

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1 change: 0 additions & 1 deletion src/arch/riscv/include/arch/hlt.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

static __always_inline void hlt(void)
{
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1 change: 0 additions & 1 deletion src/arch/riscv/include/arch/memlayout.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

/* This file contains macro definitions for memlayout.ld linker scripts. */

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1 change: 0 additions & 1 deletion src/arch/riscv/include/arch/mmio.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARCH_MMIO_H__
#define __ARCH_MMIO_H__
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1 change: 0 additions & 1 deletion src/arch/riscv/include/arch/pmp.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __RISCV_PMP_H__
#define __RISCV_PMP_H__
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1 change: 0 additions & 1 deletion src/arch/riscv/include/arch/smp/atomic.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-4-Clause-UC */
/* This file is part of the coreboot project. */

#ifndef _RISCV_ATOMIC_H
#define _RISCV_ATOMIC_H
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1 change: 0 additions & 1 deletion src/arch/riscv/include/arch/smp/smp.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef _RISCV_SMP_H
#define _RISCV_SMP_H
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1 change: 0 additions & 1 deletion src/arch/riscv/include/arch/smp/spinlock.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef ARCH_SMP_SPINLOCK_H
#define ARCH_SMP_SPINLOCK_H
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1 change: 0 additions & 1 deletion src/arch/riscv/include/arch/stages.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef __ARCH_STAGES_H
#define __ARCH_STAGES_H
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1 change: 0 additions & 1 deletion src/arch/riscv/include/bits.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-4-Clause-UC */
/* This file is part of the coreboot project. */

#ifndef _BITS_H
#define _BITS_H
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1 change: 0 additions & 1 deletion src/arch/riscv/include/mcall.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef _MCALL_H
#define _MCALL_H
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1 change: 0 additions & 1 deletion src/arch/riscv/include/sbi.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#ifndef RISCV_SBI_H
#define RISCV_SBI_H
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1 change: 0 additions & 1 deletion src/arch/riscv/include/vm.h
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-4-Clause-UC */
/* This file is part of the coreboot project. */

#ifndef _VM_H
#define _VM_H
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1 change: 0 additions & 1 deletion src/arch/riscv/mcall.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: BSD-4-Clause-UC */
/* This file is part of the coreboot project. */

#include <mcall.h>
#include <string.h>
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1 change: 0 additions & 1 deletion src/arch/riscv/misaligned.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <stddef.h>
#include <stdint.h>
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1 change: 0 additions & 1 deletion src/arch/riscv/misc.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <delay.h>

Expand Down
1 change: 0 additions & 1 deletion src/arch/riscv/opensbi.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <sbi/fw_dynamic.h>
#include <arch/boot.h>
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1 change: 0 additions & 1 deletion src/arch/riscv/payload.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <program_loading.h>
#include <stdint.h>
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1 change: 0 additions & 1 deletion src/arch/riscv/pmp.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <arch/encoding.h>
#include <stdint.h>
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1 change: 0 additions & 1 deletion src/arch/riscv/ramstage.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <arch/encoding.h>
#include <bits.h>
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1 change: 0 additions & 1 deletion src/arch/riscv/romstage.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

/*
* Entry points must be placed at the location the previous stage jumps
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1 change: 0 additions & 1 deletion src/arch/riscv/sbi.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <mcall.h>
#include <stdint.h>
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1 change: 0 additions & 1 deletion src/arch/riscv/smp.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <stddef.h>
#include <arch/encoding.h>
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1 change: 0 additions & 1 deletion src/arch/riscv/tables.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <bootmem.h>
#include <boot/tables.h>
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1 change: 0 additions & 1 deletion src/arch/riscv/trap_handler.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/*
* Early initialization code for riscv
*/
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1 change: 0 additions & 1 deletion src/arch/riscv/trap_util.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/*
* Early initialization code for riscv
*/
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2 changes: 0 additions & 2 deletions src/arch/riscv/virtual_memory.c
@@ -1,12 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
/*
* Early initialization code for riscv virtual memory
*/

#include <arch/cpu.h>
#include <arch/encoding.h>
#include <stdint.h>
#include <vm.h>

/* Delegate controls which traps are delegated to the payload. If you
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24 changes: 6 additions & 18 deletions src/arch/x86/Kconfig
@@ -1,7 +1,4 @@
##
## SPDX-License-Identifier: GPL-2.0-only
## This file is part of the coreboot project.
##

config ARCH_X86
bool
Expand Down Expand Up @@ -89,9 +86,10 @@ config X86_RESET_VECTOR
config RESET_VECTOR_IN_RAM
bool
depends on ARCH_X86
select NO_XIP_EARLY_STAGES
help
Select this option if the x86 soc implements custom code to handle the
reset vector in RAM instead of the traditional 0xfffffff0 location.
Select this option if the x86 processor's reset vector is in
preinitialized DRAM instead of the traditional 0xfffffff0 location.

# Aligns 16bit entry code in bootblock so that hyper-threading CPUs
# can boot AP CPUs to enable their shared caches.
Expand Down Expand Up @@ -206,6 +204,7 @@ config VERSTAGE_ADDR
config POSTCAR_STAGE
def_bool y
depends on ARCH_X86
depends on !RESET_VECTOR_IN_RAM

config VERSTAGE_DEBUG_SPINLOOP
bool
Expand Down Expand Up @@ -244,22 +243,11 @@ config SKIP_MAX_REBOOT_CNT_CLEAR
Note that it is the responsibility of the payload to reset the
normal boot bit to 1 after each successful boot.

config ACPI_NO_PCAT_8259
config ACPI_BERT
bool
help
Selected by platforms that don't expose a PC/AT 8259 PIC pair.

config ACPI_HAVE_PCAT_8259
def_bool y if !ACPI_NO_PCAT_8259

config ACPI_CPU_STRING
string
default "\\_SB.CP%02d"
depends on HAVE_ACPI_TABLES
help
Sets the ACPI name string in the processor scope as written by
the acpigen function. Default is \_SB.CPxx. Note that you need
the \ escape character in the string.
Build an ACPI Boot Error Record Table.

config COLLECT_TIMESTAMPS_NO_TSC
bool
Expand Down
18 changes: 0 additions & 18 deletions src/arch/x86/Makefile.inc
@@ -1,7 +1,4 @@
##
## SPDX-License-Identifier: GPL-2.0-only
## This file is part of the coreboot project.
##

ifeq ($(CONFIG_POSTCAR_STAGE),y)
$(eval $(call init_standard_toolchain,postcar))
Expand Down Expand Up @@ -230,12 +227,6 @@ $(CONFIG_CBFS_PREFIX)/postcar-compression := none

ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32)$(CONFIG_ARCH_RAMSTAGE_X86_64),y)

ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpigen.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpigen_dsm.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi_device.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi_pld.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpigen_ps2_keybd.c
ramstage-$(CONFIG_HAVE_ACPI_RESUME) += acpi_s3.c
ramstage-$(CONFIG_ACPI_BERT) += acpi_bert_storage.c
ramstage-y += c_start.S
Expand Down Expand Up @@ -287,15 +278,6 @@ endif
ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/reset.c),)
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c
endif
ifeq ($(CONFIG_HAVE_ACPI_TABLES),y)
ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/acpi_tables.c),)
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c
endif
$(eval $(call asl_template,dsdt))
ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/fadt.c),)
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/fadt.c
endif
endif # CONFIG_GENERATE_ACPI_TABLES

ramstage-libs ?=

Expand Down
3 changes: 1 addition & 2 deletions src/arch/x86/acpi/debug.asl
@@ -1,8 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

/*
#include <arch/acpi.h>
#include <acpi/acpi.h>
DefinitionBlock (
"DSDT.AML",
"DSDT",
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1 change: 0 additions & 1 deletion src/arch/x86/acpi/globutil.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

/*
Scope(\_SB) {
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1 change: 0 additions & 1 deletion src/arch/x86/acpi/statdef.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */


/* Status and notification definitions */
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3 changes: 1 addition & 2 deletions src/arch/x86/acpi_bert_storage.c
@@ -1,13 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <bootstate.h>
#include <cbmem.h>
#include <console/console.h>
#include <cpu/x86/name.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/lapic.h>
#include <arch/acpi.h>
#include <acpi/acpi.h>
#include <arch/bert_storage.h>
#include <string.h>

Expand Down
3 changes: 1 addition & 2 deletions src/arch/x86/acpi_s3.c
@@ -1,9 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <console/console.h>
#include <string.h>
#include <arch/acpi.h>
#include <acpi/acpi.h>
#include <arch/cpu.h>
#include <cbmem.h>
#include <commonlib/helpers.h>
Expand Down
12 changes: 9 additions & 3 deletions src/arch/x86/assembly_entry.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <rules.h>

Expand All @@ -9,15 +8,22 @@
* continue with C code execution one needs to set stack pointer and
* clear .bss variables that are stage specific.
*/

#if CONFIG(RESET_VECTOR_IN_RAM)
#define _STACK_TOP _eearlyram_stack
#else
#define _STACK_TOP _ecar_stack
#endif

.section ".text._start", "ax", @progbits
.global _start
_start:

/* Migrate GDT to this text segment */
call gdt_init

/* reset stack pointer to CAR stack */
mov $_ecar_stack, %esp
/* reset stack pointer to CAR/EARLYRAM stack */
mov $_STACK_TOP, %esp

/* clear .bss section as it is not shared */
cld
Expand Down
1 change: 0 additions & 1 deletion src/arch/x86/boot.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <commonlib/helpers.h>
#include <console/console.h>
Expand Down
4 changes: 2 additions & 2 deletions src/arch/x86/bootblock_crt0.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* This file is part of the coreboot project. */
/*
* This is the modern bootblock. It prepares the system for C environment runtime
* setup. The actual setup is done by hardware-specific code.
Expand All @@ -11,11 +10,12 @@

#include <cpu/x86/cr.h>

.section .text

/*
* Include the old code for reset vector and protected mode entry. That code has
* withstood the test of time.
*/
#include <arch/x86/prologue.inc>
#include <cpu/x86/16bit/entry16.inc>
#include <cpu/x86/16bit/reset16.inc>
#include <cpu/x86/32bit/entry32.inc>
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2 changes: 0 additions & 2 deletions src/arch/x86/bootblock_normal.c
@@ -1,11 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <cbfs.h>
#include <fallback.h>
#include <program_loading.h>
#include <stddef.h>
#include <string.h>

static const char *get_fallback(const char *stagelist)
{
Expand Down
1 change: 0 additions & 1 deletion src/arch/x86/c_start.S
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <cpu/x86/post_code.h>
#include <arch/ram_segs.h>
Expand Down
3 changes: 0 additions & 3 deletions src/arch/x86/car.ld
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

/* This file is included inside a SECTIONS block */
. = CONFIG_DCACHE_RAM_BASE;
Expand Down Expand Up @@ -63,13 +62,11 @@

. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
_bss = .;
#if ENV_STAGE_HAS_BSS_SECTION
/* Allow global uninitialized variables for stages without CAR teardown. */
*(.bss)
*(.bss.*)
*(.sbss)
*(.sbss.*)
#endif
. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
_ebss = .;
_car_unallocated_start = .;
Expand Down
1 change: 0 additions & 1 deletion src/arch/x86/cbmem.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <cbmem.h>

Expand Down
1 change: 0 additions & 1 deletion src/arch/x86/cf9_reset.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <arch/io.h>
#include <arch/cache.h>
Expand Down
6 changes: 5 additions & 1 deletion src/arch/x86/cpu.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <bootstate.h>
#include <boot/coreboot_tables.h>
Expand Down Expand Up @@ -354,3 +353,8 @@ int cpu_index(void)
}
return -1;
}

uintptr_t cpu_get_lapic_addr(void)
{
return LOCAL_APIC_ADDR;
}
1 change: 0 additions & 1 deletion src/arch/x86/cpu_common.c
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */

#include <cpu/cpu.h>

Expand Down
47 changes: 47 additions & 0 deletions src/arch/x86/early_ram.ld
@@ -0,0 +1,47 @@
/* SPDX-License-Identifier: GPL-2.0-only */

/* This file is included inside a SECTIONS block */

_STACK_SIZE = CONFIG_EARLYRAM_BSP_STACK_SIZE;
_ = ASSERT(_STACK_SIZE > 0x0, "EARLYRAM_BSP_STACK_SIZE is not configured");

_CONSOLE_SIZE = CONFIG_PRERAM_CBMEM_CONSOLE_SIZE;
_ = ASSERT(_CONSOLE_SIZE > 0x0, "PRERAM_CBMEM_CONSOLE_SIZE is not configured");

_TIMESTAMPS_SIZE = 0x200;
#if !CONFIG(NO_FMAP_CACHE)
_FMAP_SIZE = FMAP_SIZE;
#else
_FMAP_SIZE = 0;
#endif

/*
* The PRERAM_CBMEM_CONSOLE, TIMESTAMP, and FMAP_CACHE regions are shared
* between the pre-ram stages (bootblock, romstage, etc). We need to assign a
* fixed size and consistent link address so they can be shared between stages.
*
* The stack area is not shared between stages, but is defined here for
* convenience.
*/
. = CONFIG_X86_RESET_VECTOR - ARCH_STACK_ALIGN_SIZE - _STACK_SIZE - _CONSOLE_SIZE - _TIMESTAMPS_SIZE - _FMAP_SIZE - VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE;

_ = ASSERT(. > _eprogram, "Not enough room for .earlyram.data. Try increasing C_ENV_BOOTBLOCK_SIZE, or decreasing either EARLYRAM_BSP_STACK_SIZE or PRERAM_CBMEM_CONSOLE_SIZE.");

.stack ALIGN(ARCH_STACK_ALIGN_SIZE) (NOLOAD) : {
EARLYRAM_STACK(., _STACK_SIZE)
}

.persistent ALIGN(ARCH_POINTER_ALIGN_SIZE) (NOLOAD) : {
PRERAM_CBMEM_CONSOLE(., _CONSOLE_SIZE)
TIMESTAMP(., _TIMESTAMPS_SIZE)
#if !CONFIG(NO_FMAP_CACHE)
FMAP_CACHE(., FMAP_SIZE)
#endif

#if CONFIG(VBOOT_STARTS_IN_BOOTBLOCK)
ALIGN_COUNTER(16);
VBOOT2_WORK(., VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE)
#endif
}

_ = ASSERT(. <= CONFIG_X86_RESET_VECTOR, "Earlyram data regions don't fit below the reset vector!");