34 changes: 29 additions & 5 deletions MAINTAINERS
Expand Up @@ -448,6 +448,7 @@ F: src/mainboard/siemens/mc_apl1/

SYSTEM76 MAINBOARDS
M: Jeremy Soller <jeremy@system76.com>
M: Tim Crawford <tcrawford@system76.com>
S: Maintained
F: src/mainboard/system76/

Expand Down Expand Up @@ -519,6 +520,7 @@ F: src/ec/lenovo/

SYSTEM76 EC
M: Jeremy Soller <jeremy@system76.com>
M: Tim Crawford <tcrawford@system76.com>
S: Maintained
F: src/ec/system76/

Expand Down Expand Up @@ -602,6 +604,7 @@ M: Jason Glenesk <jason.glenesk@gmail.com>
M: Raul E Rangel <rrangel@chromium.org>
S: Maintained
F: src/soc/amd/cezanne/
F: src/vendorcode/amd/fsp/cezanne/

AMD common SoC code
M: Marshall Dawson <marshalldawson3rd@gmail.com>
Expand All @@ -620,6 +623,12 @@ S: Maintained
F: src/soc/amd/picasso/
F: src/vendorcode/amd/fsp/picasso/

AMD Stoneyridge
M: Marshall Dawson <marshalldawson3rd@gmail.com>
M: Felix Held <felix-coreboot@felixheld.de>
S: Odd Fixes
F: src/soc/amd/stoneyridge/

INTEL ALDERLAKE SOC
M: Tim Wawrzynczak <twawrzynczak@chromium.org>
S: Maintained
Expand Down Expand Up @@ -755,12 +764,22 @@ INTELMETOOL
M: Christian Walter <christian.walter@9elements.com>
F: util/intelmetool/

INTELP2M
M: Maxim Polyakov <max.senia.poliak@gmail.com>
S: Maintained
F: util/intelp2m/

ME_CLEANER
M: Nicola Corna <nicola@corna.info>
W: https://github.com/corna/me_cleaner
S: Maintained
F: util/me_cleaner/

LIVEISO
M: Felix Singer <felixsinger@posteo.net>
S: Supported
F: util/liveiso/

################################################################################
# Miscellaneous
################################################################################
Expand Down Expand Up @@ -790,8 +809,11 @@ BINARY OBJECTS
F: 3rdparty/blobs/

VERIFIED BOOT
M: Julius Werner <jwerner@chromium.org>
M: Yu-Ping Wu <yupingso@google.com>
S: Supported
F: 3rdparty/vboot/
F: src/vendorcode/google/chromeos/
F: src/security/vboot/
F: src/include/tpm.h
F: src/include/tpm_lite/

Expand Down Expand Up @@ -823,10 +845,6 @@ F: src/console/
F: src/include/console/
F: src/drivers/uart/

VERIFIED BOOT 2
M: Aaron Durbin <adurbin@chromium.org>
F: src/security/vboot/

TPM SUPPORT
M: Christian Walter <christian.walter@9elements.com>
S: Supported
Expand All @@ -851,6 +869,12 @@ M: Wim Vervoorn <wvervoorn@eltan.com>
S: Maintained
F: src/vendorcode/eltan/

TAS5825M DRIVER
M: Jeremy Soller <jeremy@system76.com>
M: Tim Crawford <tcrawford@system76.com>
S: Maintained
F: src/drivers/i2c/tas5825m/

TESTS
M: Jakub Czapiga <jacz@semihalf.com>
S: Maintained
Expand Down
5 changes: 3 additions & 2 deletions Makefile.inc
Expand Up @@ -479,7 +479,7 @@ ADAFLAGS_common += -gnatwa.eeD.HHTU.U.W.Y
# Disable style checks for now
ADAFLAGS_common += -gnatyN

LDFLAGS_common := --gc-sections -nostdlib -nostartfiles -static
LDFLAGS_common := --gc-sections -nostdlib --nmagic -static

# Workaround for RISC-V linker bug, merge back into above line when fixed.
# https://sourceware.org/bugzilla/show_bug.cgi?id=27180
Expand Down Expand Up @@ -1250,7 +1250,8 @@ cbfs-get-segments-cmd = $(CBFSTOOL) $(obj)/coreboot.pre print -v | sed -n \
'\%$(1)%,\%^[^ ]\{4\}%s% .*load: \(0x[0-9a-fA-F]*\),.*length: [0-9]*/\([0-9]*\).*%\1 \2%p'

ramstage-symbol-addr-cmd = $(OBJDUMP_ramstage) -t $(objcbfs)/ramstage.elf | \
sed -n '/ $(1)$$/s/^\([0-9a-fA-F]*\) .*/0x\1/p'
sed -n '/ $(1)$$/s/^\([0-9a-fA-F]*\) .*/0x\1/p' | \
uniq

$(call add_intermediate, check-ramstage-overlaps)
programs=$$($(foreach file,$(check-ramstage-overlap-files), \
Expand Down
7 changes: 7 additions & 0 deletions configs/config.asus_a88xm-e.agesa_debug
@@ -0,0 +1,7 @@
CONFIG_VENDOR_ASUS=y
CONFIG_BOARD_ASUS_A88XM_E=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_IDS_TRACING_ENABLED=y
CONFIG_AGESA_EXTRA_TIMESTAMPS=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
CONFIG_DEBUG_RESOURCES=y
1 change: 0 additions & 1 deletion configs/config.google_meep_cros
Expand Up @@ -22,7 +22,6 @@ CONFIG_ELOG_BOOT_COUNT=y
CONFIG_ELOG_BOOT_COUNT_CMOS_OFFSET=144

# Firmware Support Package
CONFIG_ADD_FSP_BINARIES=y
# CONFIG_RUN_FSP_GOP is not set

# Management Engine
Expand Down
4 changes: 2 additions & 2 deletions configs/config.pcengines_apu1
@@ -1,4 +1,4 @@
CONFIG_LOCALVERSION="v4.14.0.3"
CONFIG_LOCALVERSION="v4.14.0.4"
CONFIG_VENDOR_PCENGINES=y
CONFIG_CBFS_SIZE=0x00200000
CONFIG_PAYLOAD_CONFIGFILE="$(top)/src/mainboard/$(MAINBOARDDIR)/seabios_config"
Expand Down Expand Up @@ -27,4 +27,4 @@ CONFIG_SORTBOOTORDER_SECONDARY_PAYLOAD=y
CONFIG_MEMTEST_REVISION=y
CONFIG_MEMTEST_REVISION_ID="0b756257276729c1a12bc1d95e7a1f044894bda2"
CONFIG_SORTBOOTORDER_REVISION=y
CONFIG_SORTBOOTORDER_REVISION_ID="v4.6.21"
CONFIG_SORTBOOTORDER_REVISION_ID="v4.6.22"
4 changes: 2 additions & 2 deletions configs/config.pcengines_apu2
@@ -1,4 +1,4 @@
CONFIG_LOCALVERSION="v4.14.0.3"
CONFIG_LOCALVERSION="v4.14.0.4"
CONFIG_VENDOR_PCENGINES=y
CONFIG_PAYLOAD_CONFIGFILE="$(top)/src/mainboard/$(MAINBOARDDIR)/seabios_config"
CONFIG_PXE_ROM_ID="8086,157b"
Expand Down Expand Up @@ -31,4 +31,4 @@ CONFIG_SORTBOOTORDER_SECONDARY_PAYLOAD=y
CONFIG_MEMTEST_REVISION=y
CONFIG_MEMTEST_REVISION_ID="0b756257276729c1a12bc1d95e7a1f044894bda2"
CONFIG_SORTBOOTORDER_REVISION=y
CONFIG_SORTBOOTORDER_REVISION_ID="v4.6.21"
CONFIG_SORTBOOTORDER_REVISION_ID="v4.6.22"
4 changes: 2 additions & 2 deletions configs/config.pcengines_apu3
@@ -1,4 +1,4 @@
CONFIG_LOCALVERSION="v4.14.0.3"
CONFIG_LOCALVERSION="v4.14.0.4"
CONFIG_VENDOR_PCENGINES=y
CONFIG_PAYLOAD_CONFIGFILE="$(top)/src/mainboard/$(MAINBOARDDIR)/seabios_config"
CONFIG_PXE_ROM_ID="8086,1539"
Expand Down Expand Up @@ -31,4 +31,4 @@ CONFIG_SORTBOOTORDER_SECONDARY_PAYLOAD=y
CONFIG_MEMTEST_REVISION=y
CONFIG_MEMTEST_REVISION_ID="0b756257276729c1a12bc1d95e7a1f044894bda2"
CONFIG_SORTBOOTORDER_REVISION=y
CONFIG_SORTBOOTORDER_REVISION_ID="v4.6.21"
CONFIG_SORTBOOTORDER_REVISION_ID="v4.6.22"
4 changes: 2 additions & 2 deletions configs/config.pcengines_apu4
@@ -1,4 +1,4 @@
CONFIG_LOCALVERSION="v4.14.0.3"
CONFIG_LOCALVERSION="v4.14.0.4"
CONFIG_VENDOR_PCENGINES=y
CONFIG_PAYLOAD_CONFIGFILE="$(top)/src/mainboard/$(MAINBOARDDIR)/seabios_config"
CONFIG_PXE_ROM_ID="8086,1539"
Expand Down Expand Up @@ -31,4 +31,4 @@ CONFIG_SORTBOOTORDER_SECONDARY_PAYLOAD=y
CONFIG_MEMTEST_REVISION=y
CONFIG_MEMTEST_REVISION_ID="0b756257276729c1a12bc1d95e7a1f044894bda2"
CONFIG_SORTBOOTORDER_REVISION=y
CONFIG_SORTBOOTORDER_REVISION_ID="v4.6.21"
CONFIG_SORTBOOTORDER_REVISION_ID="v4.6.22"
4 changes: 2 additions & 2 deletions configs/config.pcengines_apu5
@@ -1,4 +1,4 @@
CONFIG_LOCALVERSION="v4.14.0.3"
CONFIG_LOCALVERSION="v4.14.0.4"
CONFIG_VENDOR_PCENGINES=y
CONFIG_PAYLOAD_CONFIGFILE="$(top)/src/mainboard/$(MAINBOARDDIR)/seabios_config"
CONFIG_PXE_ROM_ID="8086,1539"
Expand Down Expand Up @@ -31,4 +31,4 @@ CONFIG_SORTBOOTORDER_SECONDARY_PAYLOAD=y
CONFIG_MEMTEST_REVISION=y
CONFIG_MEMTEST_REVISION_ID="0b756257276729c1a12bc1d95e7a1f044894bda2"
CONFIG_SORTBOOTORDER_REVISION=y
CONFIG_SORTBOOTORDER_REVISION_ID="v4.6.21"
CONFIG_SORTBOOTORDER_REVISION_ID="v4.6.22"
4 changes: 2 additions & 2 deletions configs/config.pcengines_apu6
@@ -1,4 +1,4 @@
CONFIG_LOCALVERSION="v4.14.0.3"
CONFIG_LOCALVERSION="v4.14.0.4"
CONFIG_VENDOR_PCENGINES=y
CONFIG_PAYLOAD_CONFIGFILE="$(top)/src/mainboard/$(MAINBOARDDIR)/seabios_config"
CONFIG_PXE_ROM_ID="8086,1539"
Expand Down Expand Up @@ -31,4 +31,4 @@ CONFIG_SORTBOOTORDER_SECONDARY_PAYLOAD=y
CONFIG_MEMTEST_REVISION=y
CONFIG_MEMTEST_REVISION_ID="0b756257276729c1a12bc1d95e7a1f044894bda2"
CONFIG_SORTBOOTORDER_REVISION=y
CONFIG_SORTBOOTORDER_REVISION_ID="v4.6.21"
CONFIG_SORTBOOTORDER_REVISION_ID="v4.6.22"
1 change: 0 additions & 1 deletion payloads/external/tianocore/Makefile
Expand Up @@ -14,7 +14,6 @@ build_flavor=-D BOOTLOADER=COREBOOT -D PCIE_BASE=$(CONFIG_MMCONF_BASE_ADDRESS) -
ifeq ($(CONFIG_TIANOCORE_UPSTREAM),y)
TAG=upstream/master
else
# STABLE revision is MrChromebox's UefiPayloadPkg (ueifpayloadpkg) branch
TAG=origin/$(project_git_branch)
endif

Expand Down
2 changes: 1 addition & 1 deletion payloads/libpayload/Makefile
Expand Up @@ -265,7 +265,7 @@ ifn$(EMPTY)def $(1)-objs_$(2)_template
de$(EMPTY)fine $(1)-objs_$(2)_template
$(obj)/$$(1).$(1).o: $$(1).$(2) $(obj)/libpayload-config.h $(4)
@printf " CC $$$$(subst $$$$(obj)/,,$$$$(@))\n"
$(CC) $(3) -MMD $$$$(CFLAGS) -c -o $$$$@ $$$$<
$(CC) $(3) -MMD $$$$(CFLAGS) $(EXTRA_CFLAGS) -c -o $$$$@ $$$$<
en$(EMPTY)def
end$(EMPTY)if
endef
Expand Down
2 changes: 1 addition & 1 deletion payloads/libpayload/Makefile.inc
Expand Up @@ -58,7 +58,7 @@ subdirs-$(CONFIG_LP_LZ4) += liblz4
INCLUDES := -Iinclude -Iinclude/$(ARCHDIR-y) -I$(obj)
INCLUDES += -include include/kconfig.h -include include/compiler.h

CFLAGS += $(EXTRA_CFLAGS) $(INCLUDES) -Os -pipe -nostdinc -ggdb3
CFLAGS += $(INCLUDES) -Os -pipe -nostdinc -ggdb3
CFLAGS += -nostdlib -fno-builtin -ffreestanding -fomit-frame-pointer
CFLAGS += -ffunction-sections -fdata-sections
CFLAGS += -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes -Wvla
Expand Down
1 change: 1 addition & 0 deletions payloads/libpayload/drivers/storage/ahci.c
Expand Up @@ -224,6 +224,7 @@ static u32 working_controllers[] = {
0x8086 | 0x1c03 << 16, /* Mobile Cougar Point PCH */
0x8086 | 0x1e03 << 16, /* Mobile Panther Point PCH */
0x8086 | 0xa102 << 16, /* Desktop / Mobile-Wks Sunrise Point PCH */
0x8086 | 0xa353 << 16, /* Mobile 300 series Cannon Point PCH */
0x8086 | 0x5ae3 << 16, /* Apollo Lake */
};
#endif
Expand Down
6 changes: 6 additions & 0 deletions payloads/libpayload/drivers/timer/Kconfig
Expand Up @@ -45,6 +45,9 @@ config TIMER_RK3399
config TIMER_MTK
bool "Timer for MediaTek"

config TIMER_MTK_V2
bool "Timer for MediaTek V2"

endchoice

config TIMER_GENERIC_HZ
Expand All @@ -53,6 +56,7 @@ config TIMER_GENERIC_HZ
default 6250000 if TIMER_IPQ806X
default 24000000 if TIMER_MCT
default 13000000 if TIMER_MTK
default 13000000 if TIMER_MTK_V2
default 24000000 if TIMER_RK3288
default 24000000 if TIMER_RK3399
default 1000000 if TIMER_TEGRA_1US
Expand All @@ -67,6 +71,7 @@ config TIMER_GENERIC_REG
default 0x0200A028 if TIMER_IPQ806X
default 0x101C0100 if TIMER_MCT
default 0x10008068 if TIMER_MTK
default 0x100080A8 if TIMER_MTK_V2
default 0xff810028 if TIMER_RK3288
default 0xff850008 if TIMER_RK3399
default 0x60005010 if TIMER_TEGRA_1US
Expand All @@ -79,6 +84,7 @@ config TIMER_GENERIC_HIGH_REG
default 0x004A2004 if TIMER_IPQ40XX
default 0x101C0104 if TIMER_MCT
default 0x10008078 if TIMER_MTK
default 0x100080B0 if TIMER_MTK_V2
default 0xff81002C if TIMER_RK3288
default 0xff85000C if TIMER_RK3399
default 0x0
Expand Down
21 changes: 13 additions & 8 deletions payloads/libpayload/drivers/video/graphics.c
Expand Up @@ -274,12 +274,19 @@ static inline uint32_t calculate_color(const struct rgb_color *rgb,
* Plot a pixel in a framebuffer. This is called from tight loops. Keep it slim
* and do the validation at callers' site.
*/
static inline void set_pixel(struct vector *coord, uint32_t color)
static inline void set_pixel_raw(struct vector *rcoord, uint32_t color)
{
const int bpp = fbinfo->bits_per_pixel;
const int bpl = fbinfo->bytes_per_line;
struct vector rcoord;
int i;
uint8_t * const pixel = FB + rcoord->y * bpl + rcoord->x * bpp / 8;
for (i = 0; i < bpp / 8; i++)
pixel[i] = (color >> (i * 8));
}

static inline void set_pixel(struct vector *coord, uint32_t color)
{
struct vector rcoord;

switch (fbinfo->orientation) {
case CB_FB_ORIENTATION_NORMAL:
Expand All @@ -301,9 +308,7 @@ static inline void set_pixel(struct vector *coord, uint32_t color)
break;
}

uint8_t * const pixel = FB + rcoord.y * bpl + rcoord.x * bpp / 8;
for (i = 0; i < bpp / 8; i++)
pixel[i] = (color >> (i * 8));
set_pixel_raw(&rcoord, color);
}

/*
Expand Down Expand Up @@ -631,9 +636,9 @@ int clear_screen(const struct rgb_color *rgb)
(((color >> 16) & 0xff) == (color & 0xff)))) {
memset(FB, color & 0xff, fbinfo->y_resolution * bpl);
} else {
for (p.y = 0; p.y < screen.size.height; p.y++)
for (p.x = 0; p.x < screen.size.width; p.x++)
set_pixel(&p, color);
for (p.y = 0; p.y < fbinfo->y_resolution; p.y++)
for (p.x = 0; p.x < fbinfo->x_resolution; p.x++)
set_pixel_raw(&p, color);
}

return CBGFX_SUCCESS;
Expand Down
4 changes: 4 additions & 0 deletions src/acpi/acpi.c
Expand Up @@ -26,6 +26,7 @@
#include <types.h>
#include <version.h>
#include <commonlib/sort.h>
#include <pc80/mc146818rtc.h>

static acpi_rsdp_t *valid_rsdp(acpi_rsdp_t *rsdp);

Expand Down Expand Up @@ -1510,6 +1511,9 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)

fadt->preferred_pm_profile = acpi_get_preferred_pm_profile();

if (CONFIG(USE_PC_CMOS_ALTCENTURY))
fadt->century = RTC_CLK_ALTCENTURY;

arch_fill_fadt(fadt);

acpi_fill_fadt(fadt);
Expand Down
12 changes: 7 additions & 5 deletions src/acpi/acpigen_ps2_keybd.c
Expand Up @@ -48,12 +48,14 @@ static const uint32_t action_keymaps[] = {
[PS2_KEY_NEXT_TRACK] = KEYMAP(0x99, KEY_NEXTSONG), /* e019 */
[PS2_KEY_PREV_TRACK] = KEYMAP(0x90, KEY_PREVIOUSSONG), /* e010 */
[PS2_KEY_SNAPSHOT] = KEYMAP(0x93, KEY_SYSRQ), /* e013 */
[PS2_KEY_BRIGHTNESS_DOWN] = KEYMAP(0x94, KEY_BRIGHTNESSDOWN),/* e014 */
[PS2_KEY_BRIGHTNESS_UP] = KEYMAP(0x95, KEY_BRIGHTNESSUP), /* e015 */
[PS2_KEY_KBD_BKLIGHT_DOWN] = KEYMAP(0x97, KEY_KBDILLUMDOWN), /* e017 */
[PS2_KEY_KBD_BKLIGHT_UP] = KEYMAP(0x98, KEY_KBDILLUMUP), /* e018 */
[PS2_KEY_PRIVACY_SCRN_TOGGLE] = KEYMAP(0x96, /* e016 */
[PS2_KEY_BRIGHTNESS_DOWN] = KEYMAP(0x94, KEY_BRIGHTNESSDOWN), /* e014 */
[PS2_KEY_BRIGHTNESS_UP] = KEYMAP(0x95, KEY_BRIGHTNESSUP), /* e015 */
[PS2_KEY_KBD_BKLIGHT_DOWN] = KEYMAP(0x97, KEY_KBDILLUMDOWN), /* e017 */
[PS2_KEY_KBD_BKLIGHT_UP] = KEYMAP(0x98, KEY_KBDILLUMUP), /* e018 */
[PS2_KEY_PRIVACY_SCRN_TOGGLE] = KEYMAP(0x96, /* e016 */
KEY_PRIVACY_SCREEN_TOGGLE),
[PS2_KEY_MICMUTE] = KEYMAP(0x9b, KEY_MICMUTE), /* e01b */
[PS2_KEY_KBD_BKLIGHT_TOGGLE] = KEYMAP(0x9e, KEY_KBDILLUMTOGGLE), /* e01e */
};

/* Keymap for numeric keypad keys */
Expand Down
1 change: 0 additions & 1 deletion src/arch/arm/Makefile.inc
Expand Up @@ -106,7 +106,6 @@ ifeq ($(CONFIG_ARCH_RAMSTAGE_ARM),y)

ramstage-y += stages.c
ramstage-y += div0.c
ramstage-$(CONFIG_COOP_MULTITASKING) += cpu.c
ramstage-y += eabi_compat.c
ramstage-y += boot.c
ramstage-y += tables.c
Expand Down
19 changes: 0 additions & 19 deletions src/arch/arm/cpu.c

This file was deleted.

1 change: 0 additions & 1 deletion src/arch/arm/include/armv7/arch/cpu.h
Expand Up @@ -75,5 +75,4 @@ static inline void set_system_mode(void)
asm volatile("msr cpsr_c, %0" :: "r"(0x1f | 0xc0));
}

struct cpu_info *cpu_info(void);
#endif /* __ARCH_CPU_H__ */
12 changes: 0 additions & 12 deletions src/arch/ppc64/include/arch/cpu.h
Expand Up @@ -12,22 +12,10 @@ struct cpu_driver {
const struct cpu_device_id *id_table;
};

struct thread;

struct cpu_info {
struct device *cpu;
unsigned long index;
#if CONFIG(COOP_MULTITASKING)
struct thread *thread;
#endif
};

struct cpuinfo_ppc64 {
uint8_t ppc64; /* CPU family */
uint8_t ppc64_vendor; /* CPU vendor */
uint8_t ppc64_model;
};

struct cpu_info *cpu_info(void);

#endif /* __ARCH_CPU_H__ */
11 changes: 0 additions & 11 deletions src/arch/riscv/include/arch/cpu.h
Expand Up @@ -13,16 +13,6 @@ struct cpu_driver {
const struct cpu_device_id *id_table;
};

struct thread;

struct cpu_info {
struct device *cpu;
unsigned long index;
#if CONFIG(COOP_MULTITASKING)
struct thread *thread;
#endif
};

struct cpuinfo_riscv {
uint8_t riscv; /* CPU family */
uint8_t riscv_vendor; /* CPU vendor */
Expand All @@ -40,5 +30,4 @@ static inline int machine_xlen(void)
return (1 << mxl) * 16;
}

struct cpu_info *cpu_info(void);
#endif /* __ARCH_CPU_H__ */
2 changes: 2 additions & 0 deletions src/arch/x86/Makefile.inc
Expand Up @@ -154,6 +154,8 @@ romstage-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
romstage-y += postcar_loader.c
romstage-$(CONFIG_COLLECT_TIMESTAMPS_TSC) += timestamp.c
romstage-$(CONFIG_HAVE_CF9_RESET) += cf9_reset.c
romstage-$(CONFIG_COOP_MULTITASKING) += thread.c
romstage-$(CONFIG_COOP_MULTITASKING) += thread_switch.S

romstage-srcs += $(wildcard $(src)/mainboard/$(MAINBOARDDIR)/romstage.c)
romstage-libs ?=
Expand Down
8 changes: 8 additions & 0 deletions src/arch/x86/assembly_entry.S
Expand Up @@ -35,6 +35,14 @@ _start:
/* reset stack pointer to CAR/EARLYRAM stack */
mov $_STACK_TOP, %esp

#if CONFIG(COOP_MULTITASKING)
/* Push the thread pointer. */
push $0
#endif
/* Push the CPU index and struct CPU */
push $0
push $0

/* clear .bss section as it is not shared */
cld
xor %eax, %eax
Expand Down
5 changes: 0 additions & 5 deletions src/arch/x86/c_start.S
Expand Up @@ -17,11 +17,6 @@ _stack:
.space (CONFIG_MAX_CPUS+1)*CONFIG_STACK_SIZE
_estack:
.set _stack_size, _estack - _stack
#if CONFIG(COOP_MULTITASKING)
.global thread_stacks
thread_stacks:
.space CONFIG_STACK_SIZE*CONFIG_NUM_THREADS
#endif

.section ".text._start", "ax", @progbits
#if ENV_X86_64
Expand Down
129 changes: 129 additions & 0 deletions src/arch/x86/cpu_common.c
Expand Up @@ -82,3 +82,132 @@ uint32_t cpu_get_feature_flags_edx(void)
{
return cpuid_edx(1);
}

enum cpu_type cpu_check_deterministic_cache_cpuid_supported(void)
{
struct cpuid_result res;

if (cpu_is_intel()) {
res = cpuid(0);
if (res.eax < 4)
return CPUID_COMMAND_UNSUPPORTED;
return CPUID_TYPE_INTEL;
} else if (cpu_is_amd()) {
res = cpuid(0x80000000);
if (res.eax < 0x80000001)
return CPUID_COMMAND_UNSUPPORTED;

res = cpuid(0x80000001);
if (!(res.ecx & (1 << 22)))
return CPUID_COMMAND_UNSUPPORTED;

return CPUID_TYPE_AMD;
} else {
return CPUID_TYPE_INVALID;
}
}

static uint32_t cpu_get_cache_info_leaf(void)
{
uint32_t leaf = (cpu_check_deterministic_cache_cpuid_supported() == CPUID_TYPE_AMD) ?
DETERMINISTIC_CACHE_PARAMETERS_CPUID_AMD :
DETERMINISTIC_CACHE_PARAMETERS_CPUID_IA;

return leaf;
}

size_t cpu_get_cache_ways_assoc_info(const struct cpu_cache_info *info)
{
if (!info)
return 0;

return info->num_ways;
}

uint8_t cpu_get_cache_type(const struct cpu_cache_info *info)
{
if (!info)
return 0;

return info->type;
}

uint8_t cpu_get_cache_level(const struct cpu_cache_info *info)
{
if (!info)
return 0;

return info->level;
}

size_t cpu_get_cache_phy_partition_info(const struct cpu_cache_info *info)
{
if (!info)
return 0;

return info->physical_partitions;
}

size_t cpu_get_cache_line_size(const struct cpu_cache_info *info)
{
if (!info)
return 0;

return info->line_size;
}

size_t cpu_get_cache_sets(const struct cpu_cache_info *info)
{
if (!info)
return 0;

return info->num_sets;
}

bool cpu_is_cache_full_assoc(const struct cpu_cache_info *info)
{
if (!info)
return false;

return info->fully_associative;
}

size_t cpu_get_max_cache_share(const struct cpu_cache_info *info)
{
if (!info)
return 0;

return info->num_cores_shared;
}

size_t get_cache_size(const struct cpu_cache_info *info)
{
if (!info)
return 0;

return info->num_ways * info->physical_partitions * info->line_size * info->num_sets;
}

bool fill_cpu_cache_info(uint8_t level, struct cpu_cache_info *info)
{
if (!info)
return false;

uint32_t leaf = cpu_get_cache_info_leaf();
if (!leaf)
return false;

struct cpuid_result cache_info_res = cpuid_ext(leaf, level);

info->type = CPUID_CACHE_TYPE(cache_info_res);
info->level = CPUID_CACHE_LEVEL(cache_info_res);
info->num_ways = CPUID_CACHE_WAYS_OF_ASSOC(cache_info_res) + 1;
info->num_sets = CPUID_CACHE_NO_OF_SETS(cache_info_res) + 1;
info->line_size = CPUID_CACHE_COHER_LINE(cache_info_res) + 1;
info->physical_partitions = CPUID_CACHE_PHYS_LINE(cache_info_res) + 1;
info->num_cores_shared = CPUID_CACHE_SHARING_CACHE(cache_info_res) + 1;
info->fully_associative = CPUID_CACHE_FULL_ASSOC(cache_info_res);
info->size = get_cache_size(info);

return true;
}
96 changes: 81 additions & 15 deletions src/arch/x86/include/arch/cpu.h
Expand Up @@ -3,6 +3,7 @@
#ifndef ARCH_CPU_H
#define ARCH_CPU_H

#include <stdint.h>
#include <types.h>

/*
Expand Down Expand Up @@ -158,6 +159,10 @@ static inline unsigned int cpuid_get_max_func(void)
#define CPUID_CACHE(x, res) \
(((res) >> CPUID_CACHE_##x##_SHIFT) & CPUID_CACHE_##x##_MASK)

#define CPUID_CACHE_SHARING_CACHE_SHIFT 14
#define CPUID_CACHE_SHARING_CACHE_MASK 0xfff
#define CPUID_CACHE_SHARING_CACHE(res) CPUID_CACHE(SHARING_CACHE, (res).eax)

#define CPUID_CACHE_FULL_ASSOC_SHIFT 9
#define CPUID_CACHE_FULL_ASSOC_MASK 0x1
#define CPUID_CACHE_FULL_ASSOC(res) CPUID_CACHE(FULL_ASSOC, (res).eax)
Expand Down Expand Up @@ -225,28 +230,17 @@ struct thread;

struct cpu_info {
struct device *cpu;
unsigned int index;
size_t index;
#if CONFIG(COOP_MULTITASKING)
struct thread *thread;
#endif
};

static inline struct cpu_info *cpu_info(void)
{
struct cpu_info *ci;
__asm__(
#if ENV_X86_64
"and %%rsp,%0; "
"or %2, %0 "
#else
"andl %%esp,%0; "
"orl %2, %0 "
#endif
: "=r" (ci)
: "0" (~(CONFIG_STACK_SIZE - 1)),
"r" (CONFIG_STACK_SIZE - sizeof(struct cpu_info))
);
return ci;
char s;
uintptr_t info = ALIGN_UP((uintptr_t)&s, CONFIG_STACK_SIZE) - sizeof(struct cpu_info);
return (struct cpu_info *)info;
}

struct cpuinfo_x86 {
Expand Down Expand Up @@ -314,4 +308,76 @@ uint32_t cpu_get_feature_flags_edx(void);
*/
int cpu_index(void);

#define DETERMINISTIC_CACHE_PARAMETERS_CPUID_IA 0x04
#define DETERMINISTIC_CACHE_PARAMETERS_CPUID_AMD 0x8000001d

enum cache_level {
CACHE_L1D = 0,
CACHE_L1I = 1,
CACHE_L2 = 2,
CACHE_L3 = 3,
CACHE_LINV = 0xFF,
};

enum cpu_type {
CPUID_COMMAND_UNSUPPORTED = 0,
CPUID_TYPE_AMD = 1,
CPUID_TYPE_INTEL = 2,
CPUID_TYPE_INVALID = 0xFF,
};

struct cpu_cache_info {
uint8_t type;
uint8_t level;
size_t num_ways;
size_t num_sets;
size_t line_size;
size_t size;
size_t physical_partitions;
size_t num_cores_shared;
bool fully_associative;
};

enum cpu_type cpu_check_deterministic_cache_cpuid_supported(void);

/* cpu_get_cache_assoc_info to get cache ways of associativity information. */
size_t cpu_get_cache_ways_assoc_info(const struct cpu_cache_info *info);

/*
* cpu_get_cache_type to get cache type.
* Cache type can be between 0: no cache, 1: data cache, 2: instruction cache
* 3: unified cache and rests are reserved.
*/
uint8_t cpu_get_cache_type(const struct cpu_cache_info *info);

/*
* cpu_get_cache_level to get cache level.
* Cache level can be between 0: reserved, 1: L1, 2: L2, 3: L3 and rests are reserved.
*/
uint8_t cpu_get_cache_level(const struct cpu_cache_info *info);

/* cpu_get_cache_phy_partition_info to get cache physical partitions information. */
size_t cpu_get_cache_phy_partition_info(const struct cpu_cache_info *info);

/* cpu_get_cache_line_size to get cache line size in bytes. */
size_t cpu_get_cache_line_size(const struct cpu_cache_info *info);

/* cpu_get_cache_line_size to get cache number of sets information. */
size_t cpu_get_cache_sets(const struct cpu_cache_info *info);

/* cpu_is_cache_full_assoc checks if cache is fully associative. */
bool cpu_is_cache_full_assoc(const struct cpu_cache_info *info);

/* cpu_get_max_cache_share checks the number of cores are sharing this cache. */
size_t cpu_get_max_cache_share(const struct cpu_cache_info *info);

/* get_cache_size to calculate the cache size. */
size_t get_cache_size(const struct cpu_cache_info *info);

/*
* fill_cpu_cache_info to get all required cache info data and fill into cpu_cache_info
* structure by calling CPUID.EAX=leaf and ECX=Cache Level.
*/
bool fill_cpu_cache_info(uint8_t level, struct cpu_cache_info *info);

#endif /* ARCH_CPU_H */
134 changes: 56 additions & 78 deletions src/arch/x86/smbios.c
Expand Up @@ -37,41 +37,6 @@ static u8 smbios_checksum(u8 *p, u32 length)
return -ret;
}

/* Get the device type 41 from the dev struct */
static u8 smbios_get_device_type_from_dev(struct device *dev)
{
u16 pci_basesubclass = (dev->class >> 8) & 0xFFFF;

switch (pci_basesubclass) {
case PCI_CLASS_NOT_DEFINED:
return SMBIOS_DEVICE_TYPE_OTHER;
case PCI_CLASS_DISPLAY_VGA:
case PCI_CLASS_DISPLAY_XGA:
case PCI_CLASS_DISPLAY_3D:
case PCI_CLASS_DISPLAY_OTHER:
return SMBIOS_DEVICE_TYPE_VIDEO;
case PCI_CLASS_STORAGE_SCSI:
return SMBIOS_DEVICE_TYPE_SCSI;
case PCI_CLASS_NETWORK_ETHERNET:
return SMBIOS_DEVICE_TYPE_ETHERNET;
case PCI_CLASS_NETWORK_TOKEN_RING:
return SMBIOS_DEVICE_TYPE_TOKEN_RING;
case PCI_CLASS_MULTIMEDIA_VIDEO:
case PCI_CLASS_MULTIMEDIA_AUDIO:
case PCI_CLASS_MULTIMEDIA_PHONE:
case PCI_CLASS_MULTIMEDIA_OTHER:
return SMBIOS_DEVICE_TYPE_SOUND;
case PCI_CLASS_STORAGE_ATA:
return SMBIOS_DEVICE_TYPE_PATA;
case PCI_CLASS_STORAGE_SATA:
return SMBIOS_DEVICE_TYPE_SATA;
case PCI_CLASS_STORAGE_SAS:
return SMBIOS_DEVICE_TYPE_SAS;
default:
return SMBIOS_DEVICE_TYPE_UNKNOWN;
}
}

int smbios_add_string(u8 *start, const char *str)
{
int i = 1;
Expand Down Expand Up @@ -489,9 +454,8 @@ unsigned int __weak smbios_cpu_get_voltage(void)
return 0; /* Unknown */
}

static size_t get_number_of_caches(struct cpuid_result res_deterministic_cache)
static size_t get_number_of_caches(size_t max_logical_cpus_sharing_cache)
{
size_t max_logical_cpus_sharing_cache = 0;
size_t number_of_cpus_per_package = 0;
size_t max_logical_cpus_per_package = 0;
struct cpuid_result res;
Expand All @@ -503,8 +467,6 @@ static size_t get_number_of_caches(struct cpuid_result res_deterministic_cache)

max_logical_cpus_per_package = (res.ebx >> 16) & 0xff;

max_logical_cpus_sharing_cache = ((res_deterministic_cache.eax >> 14) & 0xfff) + 1;

/* Check if it's last level cache */
if (max_logical_cpus_sharing_cache == max_logical_cpus_per_package)
return 1;
Expand Down Expand Up @@ -797,48 +759,31 @@ static int smbios_write_type7_cache_parameters(unsigned long *current,
int *max_struct_size,
struct smbios_type4 *type4)
{
struct cpuid_result res;
unsigned int cnt = 0;
unsigned int cnt = CACHE_L1D;
int len = 0;
u32 leaf;

if (!cpu_have_cpuid())
return len;

if (cpu_is_intel()) {
res = cpuid(0);
if (res.eax < 4)
return len;
leaf = 4;
} else if (cpu_is_amd()) {
res = cpuid(0x80000000);
if (res.eax < 0x80000001)
return len;

res = cpuid(0x80000001);
if (!(res.ecx & (1 << 22)))
return len;

leaf = 0x8000001d;
} else {
printk(BIOS_DEBUG, "SMBIOS: Unknown CPU\n");
enum cpu_type dcache_cpuid = cpu_check_deterministic_cache_cpuid_supported();
if (dcache_cpuid == CPUID_TYPE_INVALID || dcache_cpuid == CPUID_COMMAND_UNSUPPORTED) {
printk(BIOS_DEBUG, "SMBIOS: Unknown CPU or CPU doesn't support Deterministic "
"Cache CPUID leaf\n");
return len;
}

while (1) {
enum smbios_cache_associativity associativity;
enum smbios_cache_type type;
struct cpu_cache_info info;
if (!fill_cpu_cache_info(cnt++, &info))
continue;

res = cpuid_ext(leaf, cnt++);

const u8 cache_type = CPUID_CACHE_TYPE(res);
const u8 level = CPUID_CACHE_LEVEL(res);
const size_t assoc = CPUID_CACHE_WAYS_OF_ASSOC(res) + 1;
const size_t partitions = CPUID_CACHE_PHYS_LINE(res) + 1;
const size_t cache_line_size = CPUID_CACHE_COHER_LINE(res) + 1;
const size_t number_of_sets = CPUID_CACHE_NO_OF_SETS(res) + 1;
const size_t cache_size = assoc * partitions * cache_line_size * number_of_sets
* get_number_of_caches(res);
const u8 cache_type = info.type;
const u8 level = info.level;
const size_t assoc = info.num_ways;
const size_t cache_share = info.num_cores_shared;
const size_t cache_size = info.size * get_number_of_caches(cache_share);

if (!cache_type)
/* No more caches in the system */
Expand All @@ -859,7 +804,7 @@ static int smbios_write_type7_cache_parameters(unsigned long *current,
break;
}

if (CPUID_CACHE_FULL_ASSOC(res))
if (info.fully_associative)
associativity = SMBIOS_CACHE_ASSOCIATIVITY_FULL;
else
associativity = smbios_cache_associativity(assoc);
Expand Down Expand Up @@ -1152,9 +1097,43 @@ static int smbios_write_type127(unsigned long *current, int handle)
return len;
}

/* Generate Type41 entries from devicetree */
static int smbios_walk_device_tree_type41(struct device *dev, int *handle,
unsigned long *current)
/* Get the device type 41 from the dev struct */
static u8 smbios_get_device_type_from_dev(struct device *dev)
{
u16 pci_basesubclass = (dev->class >> 8) & 0xFFFF;

switch (pci_basesubclass) {
case PCI_CLASS_NOT_DEFINED:
return SMBIOS_DEVICE_TYPE_OTHER;
case PCI_CLASS_DISPLAY_VGA:
case PCI_CLASS_DISPLAY_XGA:
case PCI_CLASS_DISPLAY_3D:
case PCI_CLASS_DISPLAY_OTHER:
return SMBIOS_DEVICE_TYPE_VIDEO;
case PCI_CLASS_STORAGE_SCSI:
return SMBIOS_DEVICE_TYPE_SCSI;
case PCI_CLASS_NETWORK_ETHERNET:
return SMBIOS_DEVICE_TYPE_ETHERNET;
case PCI_CLASS_NETWORK_TOKEN_RING:
return SMBIOS_DEVICE_TYPE_TOKEN_RING;
case PCI_CLASS_MULTIMEDIA_VIDEO:
case PCI_CLASS_MULTIMEDIA_AUDIO:
case PCI_CLASS_MULTIMEDIA_PHONE:
case PCI_CLASS_MULTIMEDIA_OTHER:
return SMBIOS_DEVICE_TYPE_SOUND;
case PCI_CLASS_STORAGE_ATA:
return SMBIOS_DEVICE_TYPE_PATA;
case PCI_CLASS_STORAGE_SATA:
return SMBIOS_DEVICE_TYPE_SATA;
case PCI_CLASS_STORAGE_SAS:
return SMBIOS_DEVICE_TYPE_SAS;
default:
return SMBIOS_DEVICE_TYPE_UNKNOWN;
}
}

static int smbios_generate_type41_from_devtree(struct device *dev, int *handle,
unsigned long *current)
{
static u8 type41_inst_cnt[SMBIOS_DEVICE_TYPE_COUNT + 1] = {};

Expand Down Expand Up @@ -1184,9 +1163,8 @@ static int smbios_walk_device_tree_type41(struct device *dev, int *handle,
device_type);
}

/* Generate Type9 entries from devicetree */
static int smbios_walk_device_tree_type9(struct device *dev, int *handle,
unsigned long *current)
static int smbios_generate_type9_from_devtree(struct device *dev, int *handle,
unsigned long *current)
{
enum misc_slot_usage usage;
enum slot_data_bus_bandwidth bandwidth;
Expand Down Expand Up @@ -1245,8 +1223,8 @@ static int smbios_walk_device_tree(struct device *tree, int *handle, unsigned lo
printk(BIOS_INFO, "%s (%s)\n", dev_path(dev), dev_name(dev));
len += dev->ops->get_smbios_data(dev, handle, current);
}
len += smbios_walk_device_tree_type9(dev, handle, current);
len += smbios_walk_device_tree_type41(dev, handle, current);
len += smbios_generate_type9_from_devtree(dev, handle, current);
len += smbios_generate_type41_from_devtree(dev, handle, current);
}
return len;
}
Expand Down
11 changes: 4 additions & 7 deletions src/arch/x86/thread.c
Expand Up @@ -2,6 +2,10 @@

#include <thread.h>

#if ENV_X86_64
#error COOP_MULTITASKING does not currently support x86_64
#endif

/* The stack frame looks like the following after a pushad instruction. */
struct pushad_regs {
uint32_t edi; /* Offset 0x00 */
Expand Down Expand Up @@ -39,10 +43,3 @@ void arch_prepare_thread(struct thread *t,

t->stack_current = stack;
}

void *arch_get_thread_stackbase(void)
{
/* defined in c_start.S */
extern u8 thread_stacks[];
return &thread_stacks[0];
}
4 changes: 4 additions & 0 deletions src/arch/x86/thread_switch.S
@@ -1,5 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#if ENV_X86_64
#error COOP_MULTITASKING does not currently support x86_64
#endif

.code32
.text

Expand Down
4 changes: 4 additions & 0 deletions src/commonlib/Makefile.inc
Expand Up @@ -53,3 +53,7 @@ ramstage-y += bsd/lz4_wrapper.c
postcar-y += bsd/lz4_wrapper.c

ramstage-y += sort.c

romstage-y += bsd/elog.c
ramstage-y += bsd/elog.c
smm-y += bsd/elog.c
12 changes: 7 additions & 5 deletions src/commonlib/bsd/cbfs_private.c
Expand Up @@ -3,9 +3,9 @@
#include <commonlib/bsd/cbfs_private.h>
#include <assert.h>

static cb_err_t read_next_header(cbfs_dev_t dev, size_t *offset, struct cbfs_file *buffer)
static cb_err_t read_next_header(cbfs_dev_t dev, size_t *offset, struct cbfs_file *buffer,
const size_t devsize)
{
const size_t devsize = cbfs_dev_size(dev);
DEBUG("Looking for next file @%#zx...\n", *offset);
*offset = ALIGN_UP(*offset, CBFS_ALIGNMENT);
while (*offset + sizeof(*buffer) < devsize) {
Expand All @@ -28,6 +28,7 @@ cb_err_t cbfs_walk(cbfs_dev_t dev, cb_err_t (*walker)(cbfs_dev_t dev, size_t off
void *arg, struct vb2_hash *metadata_hash, enum cbfs_walk_flags flags)
{
const bool do_hash = CBFS_ENABLE_HASHING && metadata_hash;
const size_t devsize = cbfs_dev_size(dev);
struct vb2_digest_context dc;
vb2_error_t vbrv;

Expand All @@ -41,7 +42,7 @@ cb_err_t cbfs_walk(cbfs_dev_t dev, cb_err_t (*walker)(cbfs_dev_t dev, size_t off
cb_err_t ret_header;
cb_err_t ret_walker = CB_CBFS_NOT_FOUND;
union cbfs_mdata mdata;
while ((ret_header = read_next_header(dev, &offset, &mdata.h)) == CB_SUCCESS) {
while ((ret_header = read_next_header(dev, &offset, &mdata.h, devsize)) == CB_SUCCESS) {
const uint32_t attr_offset = be32toh(mdata.h.attributes_offset);
const uint32_t data_offset = be32toh(mdata.h.offset);
const uint32_t data_length = be32toh(mdata.h.len);
Expand All @@ -50,8 +51,9 @@ cb_err_t cbfs_walk(cbfs_dev_t dev, cb_err_t (*walker)(cbfs_dev_t dev, size_t off

DEBUG("Found CBFS header @%#zx (type %d, attr +%#x, data +%#x, length %#x)\n",
offset, type, attr_offset, data_offset, data_length);
if (data_offset > sizeof(mdata)) {
ERROR("File metadata @%#zx too large\n", offset);
if (data_offset > sizeof(mdata) || data_length > devsize ||
offset + data_offset + data_length > devsize) {
ERROR("File @%#zx too large\n", offset);
goto next_file;
}

Expand Down
88 changes: 88 additions & 0 deletions src/commonlib/bsd/elog.c
@@ -0,0 +1,88 @@
/* SPDX-License-Identifier: BSD-3-Clause */

#include <commonlib/bsd/bcd.h>
#include <commonlib/bsd/elog.h>
#include <stddef.h>

/*
* verify and validate if header is a valid coreboot Event Log header.
* return CB_ERR if invalid, otherwise CB_SUCCESS.
*/
enum cb_err elog_verify_header(const struct elog_header *header)
{
if (header == NULL)
return CB_ERR;

if (header->magic != ELOG_SIGNATURE)
return CB_ERR;

if (header->version != ELOG_VERSION)
return CB_ERR;

if (header->header_size != sizeof(*header))
return CB_ERR;

return CB_SUCCESS;
}

/*
* return the next elog event.
* return NULL if event is invalid.
*/
const struct event_header *elog_get_next_event(const struct event_header *event)
{
if (!event)
return NULL;

/* Point to next event */
return (const struct event_header *)((const void *)(event) + event->length);
}

/* return the data associated to the event_header. */
const void *event_get_data(const struct event_header *event)
{
/*
* Pointing to the next event returns the data, since data is the first
* field right after the header.
*/
return (const void *)(&event[1]);
}

/* Populate timestamp in event header with given time. */
void elog_fill_timestamp(struct event_header *event, uint8_t sec, uint8_t min,
uint8_t hour, uint8_t mday, uint8_t mon, uint8_t year)
{
event->second = bin2bcd(sec);
event->minute = bin2bcd(min);
event->hour = bin2bcd(hour);
event->day = bin2bcd(mday);
event->month = bin2bcd(mon);
event->year = bin2bcd(year % 100);

/* Basic check of expected ranges. */
if (event->month > 0x12 || event->day > 0x31 || event->hour > 0x23 ||
event->minute > 0x59 || event->second > 0x59) {
event->year = 0;
event->month = 0;
event->day = 0;
event->hour = 0;
event->minute = 0;
event->second = 0;
}
}

void elog_update_checksum(struct event_header *event, uint8_t checksum)
{
uint8_t *event_data = (uint8_t *)event;
event_data[event->length - 1] = checksum;
}

uint8_t elog_checksum_event(const struct event_header *event)
{
uint8_t index, checksum = 0;
const uint8_t *data = (const uint8_t *)event;

for (index = 0; index < event->length; index++)
checksum += data[index];
return checksum;
}
@@ -1,4 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* SPDX-License-Identifier: BSD-3-Clause */

#ifndef _BCD_H_
#define _BCD_H_
Expand Down
324 changes: 324 additions & 0 deletions src/commonlib/bsd/include/commonlib/bsd/elog.h
@@ -0,0 +1,324 @@
/* SPDX-License-Identifier: BSD-3-Clause */

#ifndef _COMMONLIB_BSD_ELOG_H_
#define _COMMONLIB_BSD_ELOG_H_

#include <inttypes.h>

#include <commonlib/bsd/cb_err.h>

/* ELOG header */
struct elog_header {
uint32_t magic;
uint8_t version;
uint8_t header_size;
uint8_t reserved[2];
} __packed;

/* ELOG related constants */
#define ELOG_SIGNATURE 0x474f4c45 /* 'ELOG' */
#define ELOG_VERSION 1
#define ELOG_RW_REGION_NAME "RW_ELOG"

/* SMBIOS event log header */
struct event_header {
uint8_t type;
uint8_t length;
uint8_t year;
uint8_t month;
uint8_t day;
uint8_t hour;
uint8_t minute;
uint8_t second;
} __packed;

/* SMBIOS Type 15 related constants */
#define ELOG_HEADER_TYPE_OEM 0x88

/* End of log */
#define ELOG_TYPE_EOL 0xFF

/*
* Standard SMBIOS event log types below 0x80
*/
#define ELOG_TYPE_UNDEFINED_EVENT 0x00
#define ELOG_TYPE_SINGLE_BIT_ECC_MEM_ERR 0x01
#define ELOG_TYPE_MULTI_BIT_ECC_MEM_ERR 0x02
#define ELOG_TYPE_MEM_PARITY_ERR 0x03
#define ELOG_TYPE_BUS_TIMEOUT 0x04
#define ELOG_TYPE_IO_CHECK 0x05
#define ELOG_TYPE_SW_NMI 0x06
#define ELOG_TYPE_POST_MEM_RESIZE 0x07
#define ELOG_TYPE_POST_ERR 0x08
#define ELOG_TYPE_PCI_PERR 0x09
#define ELOG_TYPE_PCI_SERR 0x0A
#define ELOG_TYPE_CPU_FAIL 0x0B
#define ELOG_TYPE_EISA_TIMEOUT 0x0C
#define ELOG_TYPE_CORRECTABLE_MEMLOG_DIS 0x0D
#define ELOG_TYPE_LOG_DISABLED 0x0E
#define ELOG_TYPE_UNDEFINED_EVENT2 0x0F
#define ELOG_TYPE_SYS_LIMIT_EXCEED 0x10
#define ELOG_TYPE_ASYNC_HW_TIMER_EXPIRED 0x11
#define ELOG_TYPE_SYS_CONFIG_INFO 0x12
#define ELOG_TYPE_HDD_INFO 0x13
#define ELOG_TYPE_SYS_RECONFIG 0x14
#define ELOG_TYPE_CPU_ERROR 0x15
#define ELOG_TYPE_LOG_CLEAR 0x16
#define ELOG_TYPE_BOOT 0x17

/*
* Extended defined OEM event types start at 0x80
*/

/* OS/kernel events */
#define ELOG_TYPE_OS_EVENT 0x81
#define ELOG_OS_EVENT_CLEAN 0 /* Clean Shutdown */
#define ELOG_OS_EVENT_NMIWDT 1 /* NMI Watchdog */
#define ELOG_OS_EVENT_PANIC 2 /* Panic */
#define ELOG_OS_EVENT_OOPS 3 /* Oops */
#define ELOG_OS_EVENT_DIE 4 /* Die */
#define ELOG_OS_EVENT_MCE 5 /* MCE */
#define ELOG_OS_EVENT_SOFTWDT 6 /* Software Watchdog */
#define ELOG_OS_EVENT_MBE 7 /* MBE */
#define ELOG_OS_EVENT_TRIPLE 8 /* Triple Fault */
#define ELOG_OS_EVENT_THERMAL 9 /* Critical Thermal Threshold */

/* Last event from coreboot */
#define ELOG_TYPE_OS_BOOT 0x90

/* Embedded controller event */
#define ELOG_TYPE_EC_EVENT 0x91
#define EC_EVENT_LID_CLOSED 0x01
#define EC_EVENT_LID_OPEN 0x02
#define EC_EVENT_POWER_BUTTON 0x03
#define EC_EVENT_AC_CONNECTED 0x04
#define EC_EVENT_AC_DISCONNECTED 0x05
#define EC_EVENT_BATTERY_LOW 0x06
#define EC_EVENT_BATTERY_CRITICAL 0x07
#define EC_EVENT_BATTERY 0x08
#define EC_EVENT_THERMAL_THRESHOLD 0x09
#define EC_EVENT_DEVICE_EVENT 0x0a
#define EC_EVENT_THERMAL 0x0b
#define EC_EVENT_USB_CHARGER 0x0c
#define EC_EVENT_KEY_PRESSED 0x0d
#define EC_EVENT_INTERFACE_READY 0x0e
#define EC_EVENT_KEYBOARD_RECOVERY 0x0f
#define EC_EVENT_THERMAL_SHUTDOWN 0x10
#define EC_EVENT_BATTERY_SHUTDOWN 0x11
#define EC_EVENT_THROTTLE_START 0x12
#define EC_EVENT_THROTTLE_STOP 0x13
#define EC_EVENT_HANG_DETECT 0x14
#define EC_EVENT_HANG_REBOOT 0x15
#define EC_EVENT_PD_MCU 0x16
#define EC_EVENT_BATTERY_STATUS 0x17
#define EC_EVENT_PANIC 0x18
#define EC_EVENT_KEYBOARD_FASTBOOT 0x19
#define EC_EVENT_RTC 0x1a
#define EC_EVENT_MKBP 0x1b
#define EC_EVENT_USB_MUX 0x1c
#define EC_EVENT_MODE_CHANGE 0x1d
#define EC_EVENT_KEYBOARD_RECOVERY_HWREINIT 0x1e
#define EC_EVENT_EXTENDED 0x1f
struct elog_ec_event {
uint8_t event;
uint8_t checksum;
} __packed;

/* Power */
#define ELOG_TYPE_POWER_FAIL 0x92
#define ELOG_TYPE_SUS_POWER_FAIL 0x93
#define ELOG_TYPE_PWROK_FAIL 0x94
#define ELOG_TYPE_SYS_PWROK_FAIL 0x95
#define ELOG_TYPE_POWER_ON 0x96
#define ELOG_TYPE_POWER_BUTTON 0x97
#define ELOG_TYPE_POWER_BUTTON_OVERRIDE 0x98

/* Reset */
#define ELOG_TYPE_RESET_BUTTON 0x99
#define ELOG_TYPE_SYSTEM_RESET 0x9a
#define ELOG_TYPE_RTC_RESET 0x9b
#define ELOG_TYPE_TCO_RESET 0x9c

/* Sleep/Wake */
#define ELOG_TYPE_ACPI_ENTER 0x9d
/*
* Deep Sx wake variant is provided below - 0xad
* Sleep/"wake pending" event log provided below - 0xb1 - 0x01/0x02
*/

#define ELOG_TYPE_ACPI_WAKE 0x9e
#define ELOG_TYPE_WAKE_SOURCE 0x9f
#define ELOG_WAKE_SOURCE_PCIE 0x00
#define ELOG_WAKE_SOURCE_PME 0x01
#define ELOG_WAKE_SOURCE_PME_INTERNAL 0x02
#define ELOG_WAKE_SOURCE_RTC 0x03
#define ELOG_WAKE_SOURCE_GPE 0x04
#define ELOG_WAKE_SOURCE_SMBUS 0x05
#define ELOG_WAKE_SOURCE_PWRBTN 0x06
#define ELOG_WAKE_SOURCE_PME_HDA 0x07
#define ELOG_WAKE_SOURCE_PME_GBE 0x08
#define ELOG_WAKE_SOURCE_PME_EMMC 0x09
#define ELOG_WAKE_SOURCE_PME_SDCARD 0x0a
#define ELOG_WAKE_SOURCE_PME_PCIE1 0x0b
#define ELOG_WAKE_SOURCE_PME_PCIE2 0x0c
#define ELOG_WAKE_SOURCE_PME_PCIE3 0x0d
#define ELOG_WAKE_SOURCE_PME_PCIE4 0x0e
#define ELOG_WAKE_SOURCE_PME_PCIE5 0x0f
#define ELOG_WAKE_SOURCE_PME_PCIE6 0x10
#define ELOG_WAKE_SOURCE_PME_PCIE7 0x11
#define ELOG_WAKE_SOURCE_PME_PCIE8 0x12
#define ELOG_WAKE_SOURCE_PME_PCIE9 0x13
#define ELOG_WAKE_SOURCE_PME_PCIE10 0x14
#define ELOG_WAKE_SOURCE_PME_PCIE11 0x15
#define ELOG_WAKE_SOURCE_PME_PCIE12 0x16
#define ELOG_WAKE_SOURCE_PME_SATA 0x17
#define ELOG_WAKE_SOURCE_PME_CSE 0x18
#define ELOG_WAKE_SOURCE_PME_CSE2 0x19
#define ELOG_WAKE_SOURCE_PME_CSE3 0x1a
#define ELOG_WAKE_SOURCE_PME_XHCI 0x1b
#define ELOG_WAKE_SOURCE_PME_XDCI 0x1c
#define ELOG_WAKE_SOURCE_PME_XHCI_USB_2 0x1d
#define ELOG_WAKE_SOURCE_PME_XHCI_USB_3 0x1e
#define ELOG_WAKE_SOURCE_PME_WIFI 0x1f
#define ELOG_WAKE_SOURCE_PME_PCIE13 0x20
#define ELOG_WAKE_SOURCE_PME_PCIE14 0x21
#define ELOG_WAKE_SOURCE_PME_PCIE15 0x22
#define ELOG_WAKE_SOURCE_PME_PCIE16 0x23
#define ELOG_WAKE_SOURCE_PME_PCIE17 0x24
#define ELOG_WAKE_SOURCE_PME_PCIE18 0x25
#define ELOG_WAKE_SOURCE_PME_PCIE19 0x26
#define ELOG_WAKE_SOURCE_PME_PCIE20 0x27
#define ELOG_WAKE_SOURCE_PME_PCIE21 0x28
#define ELOG_WAKE_SOURCE_PME_PCIE22 0x29
#define ELOG_WAKE_SOURCE_PME_PCIE23 0x2a
#define ELOG_WAKE_SOURCE_PME_PCIE24 0x2b
#define ELOG_WAKE_SOURCE_GPIO 0x2c
#define ELOG_WAKE_SOURCE_PME_TBT 0x2d
#define ELOG_WAKE_SOURCE_PME_TCSS_XHCI 0x2e
#define ELOG_WAKE_SOURCE_PME_TCSS_XDCI 0x2f
#define ELOG_WAKE_SOURCE_PME_TCSS_DMA 0x30

struct elog_event_data_wake {
uint8_t source;
uint32_t instance;
} __packed;

/* Chrome OS related events */
#define ELOG_TYPE_CROS_DEVELOPER_MODE 0xa0
#define ELOG_TYPE_CROS_RECOVERY_MODE 0xa1
#define ELOG_CROS_RECOVERY_MODE_BUTTON 0x02

/* Management Engine Events */
#define ELOG_TYPE_MANAGEMENT_ENGINE 0xa2
#define ELOG_ME_PATH_NORMAL 0x00
#define ELOG_ME_PATH_S3WAKE 0x01
#define ELOG_ME_PATH_ERROR 0x02
#define ELOG_ME_PATH_RECOVERY 0x03
#define ELOG_ME_PATH_DISABLED 0x04
#define ELOG_ME_PATH_FW_UPDATE 0x05

#define ELOG_TYPE_MANAGEMENT_ENGINE_EXT 0xa4
#define ELOG_ME_PHASE_ROM 0
#define ELOG_ME_PHASE_BRINGUP 1
#define ELOG_ME_PHASE_UKERNEL 2
#define ELOG_ME_PHASE_POLICY 3
#define ELOG_ME_PHASE_MODULE 4
#define ELOG_ME_PHASE_UNKNOWN 5
#define ELOG_ME_PHASE_HOST 6
struct elog_event_data_me_extended {
uint8_t current_working_state;
uint8_t operation_state;
uint8_t operation_mode;
uint8_t error_code;
uint8_t progress_code;
uint8_t current_pmevent;
uint8_t current_state;
} __packed;

/* Last post code from previous boot */
#define ELOG_TYPE_LAST_POST_CODE 0xa3
#define ELOG_TYPE_POST_EXTRA 0xa6
#define ELOG_TYPE_POST_EXTRA_PATH 0x01
#define ELOG_DEV_PATH_TYPE_NONE 0
#define ELOG_DEV_PATH_TYPE_ROOT 1
#define ELOG_DEV_PATH_TYPE_PCI 2
#define ELOG_DEV_PATH_TYPE_PNP 3
#define ELOG_DEV_PATH_TYPE_I2C 4
#define ELOG_DEV_PATH_TYPE_APIC 5
#define ELOG_DEV_PATH_TYPE_DOMAIN 6
#define ELOG_DEV_PATH_TYPE_CPU_CLUSTER 7
#define ELOG_DEV_PATH_TYPE_CPU 8
#define ELOG_DEV_PATH_TYPE_CPU_BUS 9
#define ELOG_DEV_PATH_TYPE_IOAPIC 10

/* EC Shutdown Reason */
#define ELOG_TYPE_EC_SHUTDOWN 0xa5

/* ARM/generic versions of sleep/wake - These came from another firmware
* apparently, but not all the firmware sources were updated so that the
* elog namespace was coherent. */
#define ELOG_TYPE_SLEEP 0xa7
#define ELOG_TYPE_WAKE 0xa8
#define ELOG_TYPE_FW_WAKE 0xa9

/* Memory Cache Update */
#define ELOG_TYPE_MEM_CACHE_UPDATE 0xaa
#define ELOG_MEM_CACHE_UPDATE_SLOT_NORMAL 0
#define ELOG_MEM_CACHE_UPDATE_SLOT_RECOVERY 1
#define ELOG_MEM_CACHE_UPDATE_SLOT_VARIABLE 2
#define ELOG_MEM_CACHE_UPDATE_STATUS_SUCCESS 0
#define ELOG_MEM_CACHE_UPDATE_STATUS_FAIL 1
struct elog_event_mem_cache_update {
uint8_t slot;
uint8_t status;
} __packed;

/* CPU Thermal Trip */
#define ELOG_TYPE_THERM_TRIP 0xab

/* Cr50 */
#define ELOG_TYPE_CR50_UPDATE 0xac

/* Deep Sx wake variant */
#define ELOG_TYPE_ACPI_DEEP_WAKE 0xad

/* EC Device Event */
#define ELOG_TYPE_EC_DEVICE_EVENT 0xae
#define ELOG_EC_DEVICE_EVENT_TRACKPAD 0x01
#define ELOG_EC_DEVICE_EVENT_DSP 0x02
#define ELOG_EC_DEVICE_EVENT_WIFI 0x03

/* S0ix sleep/wake */
#define ELOG_TYPE_S0IX_ENTER 0xaf
#define ELOG_TYPE_S0IX_EXIT 0xb0

/* Extended events */
#define ELOG_TYPE_EXTENDED_EVENT 0xb1
#define ELOG_SLEEP_PENDING_PM1_WAKE 0x01
#define ELOG_SLEEP_PENDING_GPE0_WAKE 0x02

/* Cr50 reset to enable TPM */
#define ELOG_TYPE_CR50_NEED_RESET 0xb2

/* CSME-Initiated Host Reset */
#define ELOG_TYPE_MI_HRPD 0xb3
#define ELOG_TYPE_MI_HRPC 0xb4
#define ELOG_TYPE_MI_HR 0xb5

struct elog_event_extended_event {
uint8_t event_type;
uint32_t event_complement;
} __packed;


enum cb_err elog_verify_header(const struct elog_header *header);
const struct event_header *elog_get_next_event(const struct event_header *event);
const void *event_get_data(const struct event_header *event);
void elog_fill_timestamp(struct event_header *event, uint8_t sec, uint8_t min,
uint8_t hour, uint8_t mday, uint8_t mon, uint8_t year);
/* Update the checksum at the last byte. */
void elog_update_checksum(struct event_header *event, uint8_t checksum);
/* Simple byte checksum for events. */
uint8_t elog_checksum_event(const struct event_header *event);

#endif /* _COMMONLIB_BSD_ELOG_H_ */
3 changes: 3 additions & 0 deletions src/commonlib/bsd/include/commonlib/bsd/helpers.h
Expand Up @@ -54,6 +54,9 @@

#define POWER_OF_2(x) (1ULL << (x))

/* Set bits from `high` to `low` (inclusive). */
#define GENMASK(high, low) (((~0ULL) << (low)) & (~0ULL >> (63 - (high))))

#define DIV_ROUND_UP(x, y) ({ \
__typeof__(x) _div_local_x = (x); \
__typeof__(y) _div_local_y = (y); \
Expand Down
File renamed without changes.
2 changes: 2 additions & 0 deletions src/commonlib/include/commonlib/timestamp_serialized.h
Expand Up @@ -275,6 +275,8 @@ static const struct timestamp_id_to_name {
{ TS_FSP_TEMP_RAM_EXIT_END, "returning from FspTempRamExit" },
{ TS_FSP_SILICON_INIT_START, "calling FspSiliconInit" },
{ TS_FSP_SILICON_INIT_END, "returning from FspSiliconInit" },
{ TS_FSP_MULTI_PHASE_SI_INIT_START, "calling FspMultiPhaseSiInit" },
{ TS_FSP_MULTI_PHASE_SI_INIT_END, "returning from FspMultiPhaseSiInit" },
{ TS_FSP_BEFORE_ENUMERATE, "calling FspNotify(AfterPciEnumeration)" },
{ TS_FSP_AFTER_ENUMERATE,
"returning from FspNotify(AfterPciEnumeration)" },
Expand Down
32 changes: 28 additions & 4 deletions src/console/hw-debug_sink.adb
@@ -1,7 +1,9 @@
-- SPDX-License-Identifier: GPL-2.0-only

with Interfaces.C;
with CB.Config;

use CB;
use type Interfaces.C.int;

package body HW.Debug_Sink is
Expand All @@ -13,21 +15,43 @@ package body HW.Debug_Sink is

Msg_Level_BIOS_DEBUG : constant := 7;

CONSOLE_LOG_FAST : constant := 1;
CONSOLE_LOG_ALL : constant := 2;

procedure cbmemc_tx_byte (chr : Interfaces.C.char);
pragma Import (C, cbmemc_tx_byte, "cbmemc_tx_byte");

procedure console_tx_byte (chr : Interfaces.C.char);
pragma Import (C, console_tx_byte, "console_tx_byte");

procedure Put (Item : String) is
procedure Put (Item : String)
is
console_log : constant Interfaces.C.int :=
console_log_level (Msg_Level_BIOS_DEBUG);
begin
if console_log_level (Msg_Level_BIOS_DEBUG) /= 0 then
if console_log = CONSOLE_LOG_FAST then
if Config.CONSOLE_CBMEM then
for Idx in Item'Range loop
cbmemc_tx_byte (Interfaces.C.To_C (Item (Idx)));
end loop;
end if;
elsif console_log = CONSOLE_LOG_ALL then
for Idx in Item'Range loop
console_tx_byte (Interfaces.C.To_C (Item (Idx)));
end loop;
end if;
end Put;

procedure Put_Char (Item : Character) is
procedure Put_Char (Item : Character)
is
console_log : constant Interfaces.C.int :=
console_log_level (Msg_Level_BIOS_DEBUG);
begin
if console_log_level (Msg_Level_BIOS_DEBUG) /= 0 then
if console_log = CONSOLE_LOG_FAST then
if Config.CONSOLE_CBMEM then
cbmemc_tx_byte (Interfaces.C.To_C (Item));
end if;
elsif console_log = CONSOLE_LOG_ALL then
console_tx_byte (Interfaces.C.To_C (Item));
end if;
end Put_Char;
Expand Down
1 change: 1 addition & 0 deletions src/cpu/amd/agesa/family15tn/Kconfig
Expand Up @@ -2,6 +2,7 @@

config CPU_AMD_AGESA_FAMILY15_TN
bool
select IDS_OPTIONS_HOOKED_UP
select X86_AMD_FIXED_MTRRS

if CPU_AMD_AGESA_FAMILY15_TN
Expand Down
4 changes: 3 additions & 1 deletion src/cpu/x86/Kconfig
Expand Up @@ -173,7 +173,9 @@ config X86_AMD_INIT_SIPI
help
This option limits the number of SIPI signals sent during during the
common AP setup. Intel documentation specifies an INIT SIPI SIPI
sequence, however this doesn't work on some AMD platforms.
sequence, however this doesn't work on some AMD platforms. These
newer AMD platforms don't need the 10ms wait between INIT and SIPI,
so skip that too to save some time.

config SOC_SETS_MSRS
bool
Expand Down
11 changes: 7 additions & 4 deletions src/cpu/x86/mp_init.c
Expand Up @@ -449,8 +449,11 @@ static int start_aps(struct bus *cpu_bus, int ap_count, atomic_t *num_aps)

/* Send INIT IPI to all but self. */
lapic_send_ipi(LAPIC_DEST_ALLBUT | LAPIC_INT_ASSERT | LAPIC_DM_INIT, 0);
printk(BIOS_DEBUG, "Waiting for 10ms after sending INIT.\n");
mdelay(10);

if (!CONFIG(X86_AMD_INIT_SIPI)) {
printk(BIOS_DEBUG, "Waiting for 10ms after sending INIT.\n");
mdelay(10);
}

/* Send 1st SIPI */
if (lapic_busy()) {
Expand Down Expand Up @@ -569,7 +572,7 @@ static void init_bsp(struct bus *cpu_bus)
info->cpu->name = processor_name;

if (info->index != 0)
printk(BIOS_CRIT, "BSP index(%d) != 0!\n", info->index);
printk(BIOS_CRIT, "BSP index(%zd) != 0!\n", info->index);

/* Track BSP in cpu_map structures. */
cpu_add_map_entry(info->index);
Expand Down Expand Up @@ -994,7 +997,7 @@ int mp_run_on_all_aps(void (*func)(void *), void *arg, long expire_us, bool run_
int ap_index, bsp_index;

if (run_parallel)
return mp_run_on_aps(func, arg, 0, expire_us);
return mp_run_on_aps(func, arg, MP_RUN_ON_ALL_CPUS, expire_us);

bsp_index = cpu_index();

Expand Down
6 changes: 3 additions & 3 deletions src/device/device_util.c
Expand Up @@ -152,14 +152,14 @@ const char *dev_path(const struct device *dev)

buffer[0] = '\0';
if (!dev) {
memcpy(buffer, "<null>", 7);
strcpy(buffer, "<null>");
} else {
switch (dev->path.type) {
case DEVICE_PATH_NONE:
memcpy(buffer, "NONE", 5);
strcpy(buffer, "NONE");
break;
case DEVICE_PATH_ROOT:
memcpy(buffer, "Root Device", 12);
strcpy(buffer, "Root Device");
break;
case DEVICE_PATH_PCI:
snprintf(buffer, sizeof(buffer),
Expand Down
2 changes: 1 addition & 1 deletion src/drivers/ams/as3722rtc.c
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#include <bcd.h>
#include <commonlib/bsd/bcd.h>
#include <device/i2c_simple.h>
#include <rtc.h>
#include <stdint.h>
Expand Down
94 changes: 17 additions & 77 deletions src/drivers/elog/elog.c
@@ -1,21 +1,24 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#include <acpi/acpi.h>
#include <boot_device.h>
#include <bootstate.h>
#include <cbmem.h>
#include <console/console.h>
#include <bcd.h>
#include <boot_device.h>
#include <commonlib/bsd/bcd.h>
#include <commonlib/bsd/elog.h>
#include <commonlib/region.h>
#include <console/console.h>
#include <elog.h>
#include <fmap.h>
#include <lib.h>
#include <post.h>
#include <rtc.h>
#include <smbios.h>
#include <stdint.h>
#include <string.h>
#include <elog.h>
#include "elog_internal.h"

#define ELOG_MIN_AVAILABLE_ENTRIES 2 /* Shrink when this many can't fit */
#define ELOG_SHRINK_PERCENTAGE 25 /* Percent of total area to remove */

#if CONFIG(ELOG_DEBUG)
#define elog_debug(STR...) printk(BIOS_DEBUG, STR)
Expand Down Expand Up @@ -178,28 +181,6 @@ static void elog_debug_dump_buffer(const char *msg)
rdev_munmap(rdev, buffer);
}

/*
* Update the checksum at the last byte
*/
static void elog_update_checksum(struct event_header *event, u8 checksum)
{
u8 *event_data = (u8 *)event;
event_data[event->length - 1] = checksum;
}

/*
* Simple byte checksum for events
*/
static u8 elog_checksum_event(struct event_header *event)
{
u8 index, checksum = 0;
u8 *data = (u8 *)event;

for (index = 0; index < event->length; index++)
checksum += data[index];
return checksum;
}

/*
* Check if mirrored buffer is filled with ELOG_TYPE_EOL byte from the
* provided offset to the end of the mirrored buffer.
Expand Down Expand Up @@ -239,24 +220,8 @@ static int elog_is_header_valid(void)

header = rdev_mmap(mirror_dev_get(), 0, sizeof(*header));

if (header == NULL) {
printk(BIOS_ERR, "ELOG: could not map header.\n");
return 0;
}

if (header->magic != ELOG_SIGNATURE) {
printk(BIOS_ERR, "ELOG: header magic 0x%X != 0x%X\n",
header->magic, ELOG_SIGNATURE);
return 0;
}
if (header->version != ELOG_VERSION) {
printk(BIOS_ERR, "ELOG: header version %u != %u\n",
header->version, ELOG_VERSION);
return 0;
}
if (header->header_size != sizeof(*header)) {
printk(BIOS_ERR, "ELOG: header size mismatch %u != %zu\n",
header->header_size, sizeof(*header));
if (elog_verify_header(header) != CB_SUCCESS) {
printk(BIOS_ERR, "ELOG: failed to verify header.\n");
return 0;
}
return 1;
Expand Down Expand Up @@ -654,7 +619,7 @@ static int elog_find_flash(void)
elog_debug("%s()\n", __func__);

/* Find the ELOG base and size in FMAP */
if (fmap_locate_area_as_rdev_rw("RW_ELOG", rdev) < 0) {
if (fmap_locate_area_as_rdev_rw(ELOG_RW_REGION_NAME, rdev) < 0) {
printk(BIOS_WARNING, "ELOG: Unable to find RW_ELOG in FMAP\n");
return -1;
}
Expand Down Expand Up @@ -819,42 +784,13 @@ int elog_init(void)
return 0;
}

/*
* Populate timestamp in event header with current time
*/
static void elog_fill_timestamp(struct event_header *event)
{
#if CONFIG(RTC)
struct rtc_time time;

rtc_get(&time);
event->second = bin2bcd(time.sec);
event->minute = bin2bcd(time.min);
event->hour = bin2bcd(time.hour);
event->day = bin2bcd(time.mday);
event->month = bin2bcd(time.mon);
event->year = bin2bcd(time.year % 100);

/* Basic sanity check of expected ranges */
if (event->month > 0x12 || event->day > 0x31 || event->hour > 0x23 ||
event->minute > 0x59 || event->second > 0x59)
#endif
{
event->year = 0;
event->month = 0;
event->day = 0;
event->hour = 0;
event->minute = 0;
event->second = 0;
}
}

/*
* Add an event to the log
*/
int elog_add_event_raw(u8 event_type, void *data, u8 data_size)
{
struct event_header *event;
struct rtc_time time = { 0 };
u8 event_size;

elog_debug("%s(type=%X)\n", __func__, event_type);
Expand Down Expand Up @@ -882,7 +818,11 @@ int elog_add_event_raw(u8 event_type, void *data, u8 data_size)
/* Fill out event data */
event->type = event_type;
event->length = event_size;
elog_fill_timestamp(event);
if (CONFIG(RTC))
rtc_get(&time);

elog_fill_timestamp(event, time.sec, time.min, time.hour,
time.mday, time.mon, time.year);

if (data_size)
memcpy(&event[1], data, data_size);
Expand Down
35 changes: 0 additions & 35 deletions src/drivers/elog/elog_internal.h

This file was deleted.

5 changes: 4 additions & 1 deletion src/drivers/generic/alc1015/alc1015.c
Expand Up @@ -25,7 +25,10 @@ static void alc1015_fill_ssdt(const struct device *dev)
acpigen_write_scope(scope);
acpigen_write_device(name);

acpigen_write_name_string("_HID", "RTL1015");
if (config->hid)
acpigen_write_name_string("_HID", config->hid);
else
acpigen_write_name_string("_HID", "RTL1015");
acpigen_write_name_integer("_UID", 0);
acpigen_write_name_string("_DDN", dev->chip_ops->name);
acpigen_write_STA(acpi_device_status(dev));
Expand Down
4 changes: 2 additions & 2 deletions src/drivers/generic/alc1015/chip.h
Expand Up @@ -3,6 +3,6 @@
#include <acpi/acpi_device.h>

struct drivers_generic_alc1015_config {
/* SDMODE GPIO */
struct acpi_gpio sdb;
const char *hid; /* ACPI _HID */
struct acpi_gpio sdb; /* SDMODE GPIO */
};
2 changes: 1 addition & 1 deletion src/drivers/i2c/da7219/da7219.c
Expand Up @@ -36,7 +36,7 @@ static void da7219_fill_ssdt(const struct device *dev)
acpigen_write_name_string("_HID", DA7219_ACPI_HID);
acpigen_write_name_integer("_UID", 1);
acpigen_write_name_string("_DDN", dev->chip_ops->name);
acpigen_write_name_integer("_S0W", 4);
acpigen_write_name_integer("_S0W", ACPI_DEVICE_SLEEP_D3_HOT);
acpigen_write_STA(acpi_device_status(dev));

/* Resources */
Expand Down
4 changes: 2 additions & 2 deletions src/drivers/i2c/pcf8523/pcf8523.c
@@ -1,9 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#include <commonlib/bsd/bcd.h>
#include <console/console.h>
#include <device/smbus.h>
#include <version.h>
#include <console/console.h>
#include <bcd.h>
#include "chip.h"

/* Set RTC date from coreboot build date. */
Expand Down
6 changes: 3 additions & 3 deletions src/drivers/i2c/rx6110sa/rx6110sa.c
Expand Up @@ -2,13 +2,13 @@

#include <acpi/acpi_device.h>
#include <acpi/acpigen.h>
#include <commonlib/bsd/bcd.h>
#include <console/console.h>
#include <device/device.h>
#include <device/i2c.h>
#include <device/i2c_bus.h>
#include <version.h>
#include <console/console.h>
#include <bcd.h>
#include <timer.h>
#include <version.h>
#include "chip.h"
#include "rx6110sa.h"

Expand Down
7 changes: 7 additions & 0 deletions src/drivers/intel/dptf/Kconfig
Expand Up @@ -5,3 +5,10 @@ config DRIVERS_INTEL_DPTF
help
When enabled, entries in the devicetree are used to generate
Intel DPTF Tables at runtime in the SSDT.

config DRIVERS_INTEL_DPTF_SUPPORTS_TPCH
def_bool n
depends on HAVE_ACPI_TABLES && PMC_IPC_ACPI_INTERFACE
help
When enabled, chip driver/intel/dptf will publish information to the
SSDT for the TPCH device.
49 changes: 48 additions & 1 deletion src/drivers/intel/dptf/dptf.c
Expand Up @@ -4,6 +4,7 @@
#include <acpi/acpigen_pci.h>
#include <console/console.h>
#include <device/device.h>
#include <intelblocks/pmc_ipc.h>
#include "chip.h"
#include "dptf.h"

Expand Down Expand Up @@ -194,7 +195,50 @@ static void write_generic_devices(const struct drivers_intel_dptf_config *config
}
}

/* \_SB.DPTF - note: leaves the Scope open for child devices*/
/* \_SB.DPTF.TPCH.RFC methods */
static void write_tpch_rfc_methods(const char *tpch_rfc_method_name,
unsigned int ipc_subcmd_ctrl_value)
{
acpigen_write_method_serialized(tpch_rfc_method_name, 1);
acpigen_emit_namestring("IPCS");
acpigen_write_integer(PMC_IPC_CMD_COMMAND_FIVR);
acpigen_write_integer(PMC_IPC_CMD_CMD_ID_FIVR_WRITE);
acpigen_write_integer(0x8);
acpigen_write_integer(ipc_subcmd_ctrl_value);
acpigen_emit_byte(ARG0_OP);
acpigen_write_dword(0);
acpigen_write_dword(0);
/* The reason for returning a value here is a W/A for the ESIF shell */
acpigen_emit_byte(RETURN_OP);
acpigen_write_package(0);
acpigen_write_package_end();
acpigen_write_method_end();
}

static void write_create_tpch(const struct dptf_platform_info *platform_info)
{
acpigen_write_device("TPCH");
acpigen_write_name("_HID");
dptf_write_hid(platform_info->use_eisa_hids, platform_info->tpch_device_hid);
acpigen_write_name_integer("_UID", 0);
acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_ON);
}

static void write_tpch_methods(const struct dptf_platform_info *platform_info)
{
write_create_tpch(platform_info);

/* Create RFC0 method */
write_tpch_rfc_methods(platform_info->tpch_rfc0_method,
PMC_IPC_SUBCMD_RFI_CTRL0_LOGIC);
/* Create RFC1 method */
write_tpch_rfc_methods(platform_info->tpch_rfc1_method,
PMC_IPC_SUBCMD_RFI_CTRL4_LOGIC);

acpigen_write_device_end(); /* TPCH Device */
}

/* \_SB.DPTF - note: leaves the Scope open for child devices */
static void write_open_dptf_device(const struct device *dev,
const struct dptf_platform_info *platform_info)
{
Expand Down Expand Up @@ -229,6 +273,9 @@ static void write_device_definitions(const struct device *dev)
write_imok();
write_generic_devices(config, platform_info);

if (CONFIG(DRIVERS_INTEL_DPTF_SUPPORTS_TPCH))
write_tpch_methods(platform_info);

acpigen_pop_len(); /* DPTF Device (write_open_dptf_device) */
acpigen_pop_len(); /* Scope */
}
Expand Down
3 changes: 3 additions & 0 deletions src/drivers/intel/dptf/dptf.h
Expand Up @@ -14,6 +14,9 @@ struct dptf_platform_info {
const char *dptf_device_hid;
const char *generic_hid;
const char *fan_hid;
const char *tpch_device_hid;
const char *tpch_rfc0_method;
const char *tpch_rfc1_method;
};

const struct dptf_platform_info *get_dptf_platform_info(void);
Expand Down
4 changes: 0 additions & 4 deletions src/drivers/intel/fsp1_1/romstage.c
Expand Up @@ -103,10 +103,6 @@ void cache_as_ram_stage_main(FSP_INFO_HEADER *fih)

timestamp_add_now(TS_START_ROMSTAGE);

/* Load microcode before RAM init */
if (CONFIG(SUPPORT_CPU_UCODE_IN_CBFS))
intel_update_microcode_from_cbfs();

/* Display parameters */
if (!CONFIG(NO_MMCONF_SUPPORT))
printk(BIOS_SPEW, "CONFIG_MMCONF_BASE_ADDRESS: 0x%08x\n",
Expand Down
21 changes: 19 additions & 2 deletions src/drivers/intel/fsp2_0/Makefile.inc
Expand Up @@ -43,13 +43,15 @@ FSP_S_CBFS = $(call strip_quotes,$(CONFIG_FSP_S_CBFS))

# Add FSP blobs into cbfs. SoC code may supply additional options with
# -options, e.g --xip or -b
cbfs-files-$(CONFIG_FSP_CAR) += $(FSP_T_CBFS)
ifeq ($(CONFIG_ADD_FSP_BINARIES)$(CONFIG_FSP_CAR),yy)
cbfs-files-y += $(FSP_T_CBFS)
$(FSP_T_CBFS)-file := $(call strip_quotes,$(CONFIG_FSP_T_FILE))
$(FSP_T_CBFS)-type := fsp
ifeq ($(CONFIG_FSP_T_XIP),y)
$(FSP_T_CBFS)-options := --xip $(TXTIBB)
$(FSP_T_CBFS)-position = $(CONFIG_FSP_T_LOCATION)
endif
endif # CONFIG_FSP_T_XIP
endif # CONFIG_ADD_FSP_BINARIES && CONFIG_FSP_CAR

cbfs-files-$(CONFIG_ADD_FSP_BINARIES) += $(FSP_M_CBFS)
$(FSP_M_CBFS)-file := $(call strip_quotes,$(CONFIG_FSP_M_FILE))
Expand Down Expand Up @@ -95,6 +97,21 @@ ifneq ($(call strip_quotes,$(CONFIG_FSP_HEADER_PATH)),)
CPPFLAGS_common+=-I$(CONFIG_FSP_HEADER_PATH)
endif

# check if the FSP files that are supposed to be added are specified
ifeq ($(CONFIG_ADD_FSP_BINARIES),y)
ifeq ($(CONFIG_FSP_CAR),y)
ifeq ($(call strip_quotes,$(CONFIG_FSP_T_FILE)),)
$(error No FSP-T binary file specified.)
endif # CONFIG_FSP_T_FILE
endif # CONFIG_FSP_CAR
ifeq ($(call strip_quotes,$(CONFIG_FSP_M_FILE)),)
$(error No FSP-M binary file specified.)
endif # CONFIG_FSP_M_FILE
ifeq ($(call strip_quotes,$(CONFIG_FSP_S_FILE)),)
$(error No FSP-S binary file specified.)
endif # CONFIG_FSP_S_FILE
endif # CONFIG_ADD_FSP_BINARIES

subdirs-y += ppi

endif
5 changes: 0 additions & 5 deletions src/drivers/intel/fsp2_0/include/fsp/info_header.h
Expand Up @@ -6,11 +6,6 @@
#include <types.h>

#define FSP_HDR_OFFSET 0x94
#if CONFIG(PLATFORM_USES_FSP2_2)
#define FSP_HDR_LEN 0x4c
#else
#define FSP_HDR_LEN 0x48
#endif
#define FSP_HDR_SIGNATURE "FSPH"
#define FSP_HDR_ATTRIB_FSPT 1
#define FSP_HDR_ATTRIB_FSPM 2
Expand Down
2 changes: 1 addition & 1 deletion src/drivers/intel/fsp2_0/include/fsp/util.h
Expand Up @@ -109,7 +109,7 @@ void fsp_get_version(char *buf);
void fsp_verify_upd_header_signature(uint64_t upd_signature, uint64_t expected_signature);
void lb_string_platform_blob_version(struct lb_header *header);
void report_fspt_output(void);
void soc_validate_fsp_version(const struct fsp_header *hdr);
void soc_validate_fspm_header(const struct fsp_header *hdr);

/* Fill in header and validate a loaded FSP component. */
enum cb_err fsp_validate_component(struct fsp_header *hdr, void *fsp_blob, size_t size);
Expand Down
29 changes: 24 additions & 5 deletions src/drivers/intel/fsp2_0/util.c
Expand Up @@ -10,16 +10,35 @@
#include <fsp/util.h>
#include <string.h>
#include <types.h>
#include <assert.h>

static uint32_t fsp_hdr_get_expected_min_length(void)
{
if (CONFIG(PLATFORM_USES_FSP2_2))
return 76;
else if (CONFIG(PLATFORM_USES_FSP2_1))
return 72;
else if (CONFIG(PLATFORM_USES_FSP2_0))
return 72;
else
return dead_code_t(uint32_t);
}

static bool looks_like_fsp_header(const uint8_t *raw_hdr)
{
uint32_t fsp_header_length = read32(raw_hdr + 4);

if (memcmp(raw_hdr, FSP_HDR_SIGNATURE, 4)) {
printk(BIOS_ALERT, "Did not find a valid FSP signature\n");
return false;
}

if (read32(raw_hdr + 4) != FSP_HDR_LEN) {
printk(BIOS_ALERT, "FSP header has invalid length\n");
/* It is possible to build FSP with any version of EDK2 which could have introduced new
fields in FSP_INFO_HEADER. The new fields will be ignored based on the reported FSP
version. This check ensures that the reported header length is at least what the
reported FSP version requires so that we do not access any out-of-bound bytes. */
if (fsp_header_length < fsp_hdr_get_expected_min_length()) {
printk(BIOS_ALERT, "FSP header has invalid length: %d\n", fsp_header_length);
return false;
}

Expand Down Expand Up @@ -59,7 +78,7 @@ enum cb_err fsp_validate_component(struct fsp_header *hdr, void *fsp_file, size_
{
void *raw_hdr = fsp_file + FSP_HDR_OFFSET;

if (file_size < FSP_HDR_OFFSET + FSP_HDR_LEN) {
if (file_size < FSP_HDR_OFFSET + fsp_hdr_get_expected_min_length()) {
printk(BIOS_CRIT, "FSP blob too small.\n");
return CB_ERR;
}
Expand All @@ -79,7 +98,7 @@ enum cb_err fsp_validate_component(struct fsp_header *hdr, void *fsp_file, size_
}

if (ENV_ROMSTAGE)
soc_validate_fsp_version(hdr);
soc_validate_fspm_header(hdr);

return CB_SUCCESS;
}
Expand Down Expand Up @@ -205,6 +224,6 @@ void lb_string_platform_blob_version(struct lb_header *header)
memcpy(rec->string, fsp_version, len+1);
}

__weak void soc_validate_fsp_version(const struct fsp_header *hdr)
__weak void soc_validate_fspm_header(const struct fsp_header *hdr)
{
}
3 changes: 2 additions & 1 deletion src/drivers/intel/i210/i210.c
Expand Up @@ -208,7 +208,8 @@ static void init(struct device *dev)

static void enable_bus_master(struct device *dev)
{
pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
if (CONFIG(PCI_ALLOW_BUS_MASTER_ANY_DEVICE))
pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
}

static struct device_operations i210_ops = {
Expand Down
1 change: 1 addition & 0 deletions src/drivers/intel/ish/ish.c
Expand Up @@ -54,6 +54,7 @@ static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_CNL_ISHB,
PCI_DEVICE_ID_INTEL_CML_ISHB,
PCI_DEVICE_ID_INTEL_TGL_ISHB,
PCI_DEVICE_ID_INTEL_TGL_H_ISHB,
0
};

Expand Down
40 changes: 40 additions & 0 deletions src/drivers/mipi/Kconfig
@@ -0,0 +1,40 @@
## SPDX-License-Identifier: GPL-2.0-only

# Mainboards should select the options in here to specify which panel parameter
# settings they want stored in their CBFS.

config MIPI_PANEL_AUO_B101UAN08_3
bool

config MIPI_PANEL_AUO_KD101N80_45NA
bool

config MIPI_PANEL_AUO_NT51021D8P
bool

config MIPI_PANEL_BOE_TV080WUM_NG0
bool

config MIPI_PANEL_BOE_TV101WUM_N53
bool

config MIPI_PANEL_BOE_TV101WUM_NG0
bool

config MIPI_PANEL_BOE_TV101WUM_NL6
bool

config MIPI_PANEL_BOE_TV105WUM_NW0
bool

config MIPI_PANEL_CMN_P097PFG_SSD2858
bool

config MIPI_PANEL_INX_OTA7290D10P
bool

config MIPI_PANEL_STA_2081101QFH032011_53G
bool

config MIPI_PANEL_VIS_RM69299
bool
30 changes: 30 additions & 0 deletions src/drivers/mipi/Makefile.inc
@@ -0,0 +1,30 @@
# SPDX-License-Identifier: GPL-2.0-only

ramstage-y += panel.c

panel-params-y :=

panel-params-$(CONFIG_MIPI_PANEL_AUO_B101UAN08_3) += panel-AUO_B101UAN08_3
panel-params-$(CONFIG_MIPI_PANEL_AUO_KD101N80_45NA) += panel-AUO_KD101N80_45NA
panel-params-$(CONFIG_MIPI_PANEL_AUO_NT51021D8P) += panel-AUO_NT51021D8P

panel-params-$(CONFIG_MIPI_PANEL_BOE_TV080WUM_NG0) += panel-BOE_TV080WUM_NG0
panel-params-$(CONFIG_MIPI_PANEL_BOE_TV101WUM_N53) += panel-BOE_TV101WUM_N53
panel-params-$(CONFIG_MIPI_PANEL_BOE_TV101WUM_NG0) += panel-BOE_TV101WUM_NG0
panel-params-$(CONFIG_MIPI_PANEL_BOE_TV101WUM_NL6) += panel-BOE_TV101WUM_NL6
panel-params-$(CONFIG_MIPI_PANEL_BOE_TV105WUM_NW0) += panel-BOE_TV105WUM_NW0

panel-params-$(CONFIG_MIPI_PANEL_CMN_P097PFG_SSD2858) += panel-CMN_P097PFG_SSD2858

panel-params-$(CONFIG_MIPI_PANEL_INX_OTA7290D10P) += panel-INX_OTA7290D10P

panel-params-$(CONFIG_MIPI_PANEL_STA_2081101QFH032011_53G) += panel-STA_2081101QFH032011_53G

panel-params-$(CONFIG_MIPI_PANEL_VIS_RM69299) += panel-VIS_RM69299

$(foreach params,$(panel-params-y), \
$(eval cbfs-files-y += $(params)) \
$(eval $(params)-file := $(params).c:struct) \
$(eval $(params)-type := struct) \
$(eval $(params)-compression := $(CBFS_COMPRESS_FLAG)) \
)
67 changes: 67 additions & 0 deletions src/drivers/mipi/panel-AUO_B101UAN08_3.c
@@ -0,0 +1,67 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#include <mipi/panel.h>

struct panel_serializable_data AUO_B101UAN08_3 = {
.edid = {
.ascii_string = "B101UAN08.3",
.manufacturer_name = "AUO",
.panel_bits_per_color = 8,
.panel_bits_per_pixel = 24,
.mode = {
.pixel_clock = 159192,
.lvds_dual_channel = 0,
.refresh = 60,
.ha = 1200, .hbl = 144, .hso = 60, .hspw = 4,
.va = 1920, .vbl = 60, .vso = 34, .vspw = 2,
.phsync = '-', .pvsync = '-',
.x_mm = 135, .y_mm = 216,
},
},
.init = {
PANEL_DELAY(24),
PANEL_DCS(0xB0, 0x01),
PANEL_DCS(0xC0, 0x48),
PANEL_DCS(0xC1, 0x48),
PANEL_DCS(0xC2, 0x47),
PANEL_DCS(0xC3, 0x47),
PANEL_DCS(0xC4, 0x46),
PANEL_DCS(0xC5, 0x46),
PANEL_DCS(0xC6, 0x45),
PANEL_DCS(0xC7, 0x45),
PANEL_DCS(0xC8, 0x64),
PANEL_DCS(0xC9, 0x64),
PANEL_DCS(0xCA, 0x4F),
PANEL_DCS(0xCB, 0x4F),
PANEL_DCS(0xCC, 0x40),
PANEL_DCS(0xCD, 0x40),
PANEL_DCS(0xCE, 0x66),
PANEL_DCS(0xCF, 0x66),
PANEL_DCS(0xD0, 0x4F),
PANEL_DCS(0xD1, 0x4F),
PANEL_DCS(0xD2, 0x41),
PANEL_DCS(0xD3, 0x41),
PANEL_DCS(0xD4, 0x48),
PANEL_DCS(0xD5, 0x48),
PANEL_DCS(0xD6, 0x47),
PANEL_DCS(0xD7, 0x47),
PANEL_DCS(0xD8, 0x46),
PANEL_DCS(0xD9, 0x46),
PANEL_DCS(0xDA, 0x45),
PANEL_DCS(0xDB, 0x45),
PANEL_DCS(0xDC, 0x64),
PANEL_DCS(0xDD, 0x64),
PANEL_DCS(0xDE, 0x4F),
PANEL_DCS(0xDF, 0x4F),
PANEL_DCS(0xE0, 0x40),
PANEL_DCS(0xE1, 0x40),
PANEL_DCS(0xE2, 0x66),
PANEL_DCS(0xE3, 0x66),
PANEL_DCS(0xE4, 0x4F),
PANEL_DCS(0xE5, 0x4F),
PANEL_DCS(0xE6, 0x41),
PANEL_DCS(0xE7, 0x41),
PANEL_DELAY(150),
PANEL_END,
},
};
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#include "../panel.h"
#include <mipi/panel.h>

struct panel_serializable_data AUO_KD101N80_45NA = {
.edid = {
Expand All @@ -18,13 +18,12 @@ struct panel_serializable_data AUO_KD101N80_45NA = {
.x_mm = 135, .y_mm = 216,
},
},
.orientation = LB_FB_ORIENTATION_LEFT_UP,
.init = {
INIT_DELAY_CMD(10),
INIT_DCS_CMD(0x11),
INIT_DELAY_CMD(120),
INIT_DCS_CMD(0x29),
INIT_DELAY_CMD(20),
INIT_END_CMD,
PANEL_DELAY(10),
PANEL_DCS(0x11),
PANEL_DELAY(120),
PANEL_DCS(0x29),
PANEL_DELAY(20),
PANEL_END,
},
};
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#include "../panel.h"
#include <mipi/panel.h>

struct panel_serializable_data AUO_NT51021D8P = {
.edid = {
Expand All @@ -19,10 +19,10 @@ struct panel_serializable_data AUO_NT51021D8P = {
},
},
.init = {
INIT_DCS_CMD(0x11),
INIT_DELAY_CMD(0x78),
INIT_DCS_CMD(0x29),
INIT_DELAY_CMD(0x14),
INIT_END_CMD,
PANEL_DCS(0x11),
PANEL_DELAY(0x78),
PANEL_DCS(0x29),
PANEL_DELAY(0x14),
PANEL_END,
},
};
337 changes: 337 additions & 0 deletions src/drivers/mipi/panel-BOE_TV080WUM_NG0.c
@@ -0,0 +1,337 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#include <mipi/panel.h>

struct panel_serializable_data BOE_TV080WUM_NG0 = {
.edid = {
.ascii_string = "TV080WUM-NG0",
.manufacturer_name = "BOE",
.panel_bits_per_color = 8,
.panel_bits_per_pixel = 24,
.mode = {
.pixel_clock = 159420,
.lvds_dual_channel = 0,
.refresh = 60,
.ha = 1200, .hbl = 164, .hso = 80, .hspw = 24,
.va = 1920, .vbl = 28, .vso = 10, .vspw = 4,
.phsync = '-', .pvsync = '-',
.x_mm = 107, .y_mm = 132,
},
},
.init = {
PANEL_DCS(0x10),
PANEL_DELAY(0x22),
PANEL_DCS(0xB0, 0x05),
PANEL_DCS(0xB1, 0xE5),
PANEL_DCS(0xB3, 0x52),
PANEL_DCS(0xB0, 0x00),
PANEL_DCS(0xB3, 0x88),
PANEL_DCS(0xB0, 0x04),
PANEL_DCS(0xB8, 0x00),
PANEL_DCS(0xB0, 0x00),
PANEL_DCS(0xB2, 0x50),
PANEL_DCS(0xB6, 0x03),
PANEL_DCS(0xBA, 0x8B),
PANEL_DCS(0xBF, 0x15),
PANEL_DCS(0xC0, 0x0F),
PANEL_DCS(0xC2, 0x0C),
PANEL_DCS(0xC3, 0x02),
PANEL_DCS(0xC4, 0x0C),
PANEL_DCS(0xC5, 0x02),
PANEL_DCS(0xB0, 0x01),
PANEL_DCS(0xE0, 0x26),
PANEL_DCS(0xE1, 0x26),
PANEL_DCS(0xDC, 0x00),
PANEL_DCS(0xDD, 0x00),
PANEL_DCS(0xCC, 0x26),
PANEL_DCS(0xCD, 0x26),
PANEL_DCS(0xC8, 0x00),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xD2, 0x04),
PANEL_DCS(0xD3, 0x04),
PANEL_DCS(0xE6, 0x03),
PANEL_DCS(0xE7, 0x03),
PANEL_DCS(0xC4, 0x08),
PANEL_DCS(0xC5, 0x08),
PANEL_DCS(0xD8, 0x07),
PANEL_DCS(0xD9, 0x07),
PANEL_DCS(0xC2, 0x06),
PANEL_DCS(0xC3, 0x06),
PANEL_DCS(0xD6, 0x05),
PANEL_DCS(0xD7, 0x05),
PANEL_DCS(0xC0, 0x0C),
PANEL_DCS(0xC1, 0x0C),
PANEL_DCS(0xD4, 0x0B),
PANEL_DCS(0xD5, 0x0B),
PANEL_DCS(0xCA, 0x0A),
PANEL_DCS(0xCB, 0x0A),
PANEL_DCS(0xDE, 0x09),
PANEL_DCS(0xDF, 0x09),
PANEL_DCS(0xC6, 0x26),
PANEL_DCS(0xC7, 0x26),
PANEL_DCS(0xCE, 0x00),
PANEL_DCS(0xCF, 0x00),
PANEL_DCS(0xDA, 0x26),
PANEL_DCS(0xDB, 0x26),
PANEL_DCS(0xE2, 0x00),
PANEL_DCS(0xE3, 0x00),
PANEL_DCS(0xB0, 0x02),
PANEL_DCS(0xC0, 0x00),
PANEL_DCS(0xC1, 0x07),
PANEL_DCS(0xC2, 0x0D),
PANEL_DCS(0xC3, 0x18),
PANEL_DCS(0xC4, 0x27),
PANEL_DCS(0xC5, 0x28),
PANEL_DCS(0xC6, 0x30),
PANEL_DCS(0xC7, 0x2E),
PANEL_DCS(0xC8, 0x2F),
PANEL_DCS(0xC9, 0x1A),
PANEL_DCS(0xCA, 0x20),
PANEL_DCS(0xCB, 0x29),
PANEL_DCS(0xCC, 0x26),
PANEL_DCS(0xCD, 0x32),
PANEL_DCS(0xCE, 0x33),
PANEL_DCS(0xCF, 0x31),
PANEL_DCS(0xD0, 0x06),
PANEL_DCS(0xD2, 0x00),
PANEL_DCS(0xD3, 0x07),
PANEL_DCS(0xD4, 0x12),
PANEL_DCS(0xD5, 0x26),
PANEL_DCS(0xD6, 0x3D),
PANEL_DCS(0xD7, 0x3F),
PANEL_DCS(0xD8, 0x3F),
PANEL_DCS(0xD9, 0x3F),
PANEL_DCS(0xDA, 0x3F),
PANEL_DCS(0xDB, 0x3F),
PANEL_DCS(0xDC, 0x3F),
PANEL_DCS(0xDD, 0x3F),
PANEL_DCS(0xDE, 0x3F),
PANEL_DCS(0xDF, 0x3A),
PANEL_DCS(0xE0, 0x37),
PANEL_DCS(0xE1, 0x35),
PANEL_DCS(0xE2, 0x07),
PANEL_DCS(0xB0, 0x03),
PANEL_DCS(0xC8, 0x0B),
PANEL_DCS(0xC9, 0x07),
PANEL_DCS(0xC3, 0x00),
PANEL_DCS(0xE7, 0x00),
PANEL_DCS(0xC5, 0x2A),
PANEL_DCS(0xDE, 0x2A),
PANEL_DCS(0xCA, 0x43),
PANEL_DCS(0xC9, 0x07),
PANEL_DCS(0xE4, 0xC0),
PANEL_DCS(0xE5, 0x0D),
PANEL_DCS(0xCB, 0x00),
PANEL_DCS(0xB0, 0x06),
PANEL_DCS(0xB8, 0xA5),
PANEL_DCS(0xC0, 0xA5),
PANEL_DCS(0xC7, 0x0F),
PANEL_DCS(0xD5, 0x32),
PANEL_DCS(0xB8, 0x00),
PANEL_DCS(0xC0, 0x00),
PANEL_DCS(0xBC, 0x00),
PANEL_DCS(0xB0, 0x07),
PANEL_DCS(0xB1, 0x00),
PANEL_DCS(0xB2, 0x09),
PANEL_DCS(0xB3, 0x19),
PANEL_DCS(0xB4, 0x2F),
PANEL_DCS(0xB5, 0x44),
PANEL_DCS(0xB6, 0x52),
PANEL_DCS(0xB7, 0x6A),
PANEL_DCS(0xB8, 0x8A),
PANEL_DCS(0xB9, 0xCA),
PANEL_DCS(0xBA, 0x0C),
PANEL_DCS(0xBB, 0x87),
PANEL_DELAY(0x05),
PANEL_DCS(0xBC, 0x06),
PANEL_DCS(0xBD, 0x0A),
PANEL_DCS(0xBE, 0x9B),
PANEL_DCS(0xBF, 0x0C),
PANEL_DCS(0xC0, 0x3D),
PANEL_DCS(0xC1, 0x71),
PANEL_DCS(0xC2, 0x90),
PANEL_DCS(0xC3, 0xA0),
PANEL_DCS(0xC4, 0xA8),
PANEL_DCS(0xC5, 0xB1),
PANEL_DCS(0xC6, 0xBB),
PANEL_DCS(0xC7, 0xC0),
PANEL_DCS(0xC8, 0xC4),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x08),
PANEL_DCS(0xB1, 0x04),
PANEL_DCS(0xB2, 0x08),
PANEL_DCS(0xB3, 0x19),
PANEL_DCS(0xB4, 0x31),
PANEL_DCS(0xB5, 0x46),
PANEL_DCS(0xB6, 0x55),
PANEL_DCS(0xB7, 0x6E),
PANEL_DCS(0xB8, 0x92),
PANEL_DCS(0xB9, 0xD4),
PANEL_DCS(0xBA, 0x1B),
PANEL_DCS(0xBB, 0x9B),
PANEL_DELAY(0x05),
PANEL_DCS(0xBC, 0x28),
PANEL_DCS(0xBD, 0x2D),
PANEL_DCS(0xBE, 0xC3),
PANEL_DCS(0xBF, 0x2F),
PANEL_DCS(0xC0, 0x62),
PANEL_DCS(0xC1, 0x99),
PANEL_DCS(0xC2, 0xAB),
PANEL_DCS(0xC3, 0xBF),
PANEL_DCS(0xC4, 0xCF),
PANEL_DCS(0xC5, 0xDF),
PANEL_DCS(0xC6, 0xF0),
PANEL_DCS(0xC7, 0xF9),
PANEL_DCS(0xC8, 0xFC),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x09),
PANEL_DCS(0xB1, 0x04),
PANEL_DCS(0xB2, 0x05),
PANEL_DCS(0xB3, 0x17),
PANEL_DCS(0xB4, 0x2E),
PANEL_DCS(0xB5, 0x42),
PANEL_DCS(0xB6, 0x51),
PANEL_DCS(0xB7, 0x69),
PANEL_DCS(0xB8, 0x88),
PANEL_DCS(0xB9, 0xC9),
PANEL_DCS(0xBA, 0x0C),
PANEL_DCS(0xBB, 0x86),
PANEL_DELAY(0x05),
PANEL_DCS(0xBC, 0x03),
PANEL_DCS(0xBD, 0x08),
PANEL_DCS(0xBE, 0x95),
PANEL_DCS(0xBF, 0x05),
PANEL_DCS(0xC0, 0x35),
PANEL_DCS(0xC1, 0x62),
PANEL_DCS(0xC2, 0x81),
PANEL_DCS(0xC3, 0x96),
PANEL_DCS(0xC4, 0x9E),
PANEL_DCS(0xC5, 0xA5),
PANEL_DCS(0xC6, 0xAD),
PANEL_DCS(0xC7, 0xB1),
PANEL_DCS(0xC8, 0xB4),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x0A),
PANEL_DCS(0xB1, 0x00),
PANEL_DCS(0xB2, 0x09),
PANEL_DCS(0xB3, 0x19),
PANEL_DCS(0xB4, 0x2F),
PANEL_DCS(0xB5, 0x44),
PANEL_DCS(0xB6, 0x52),
PANEL_DCS(0xB7, 0x6A),
PANEL_DCS(0xB8, 0x8A),
PANEL_DCS(0xB9, 0xCA),
PANEL_DCS(0xBA, 0x0C),
PANEL_DCS(0xBB, 0x87),
PANEL_DELAY(0x05),
PANEL_DCS(0xBC, 0x06),
PANEL_DCS(0xBD, 0x0A),
PANEL_DCS(0xBE, 0x9B),
PANEL_DCS(0xBF, 0x0C),
PANEL_DCS(0xC0, 0x3D),
PANEL_DCS(0xC1, 0x71),
PANEL_DCS(0xC2, 0x90),
PANEL_DCS(0xC3, 0xA0),
PANEL_DCS(0xC4, 0xA8),
PANEL_DCS(0xC5, 0xB1),
PANEL_DCS(0xC6, 0xBB),
PANEL_DCS(0xC7, 0xC0),
PANEL_DCS(0xC8, 0xC4),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x0B),
PANEL_DCS(0xB1, 0x04),
PANEL_DCS(0xB2, 0x08),
PANEL_DCS(0xB3, 0x19),
PANEL_DCS(0xB4, 0x31),
PANEL_DCS(0xB5, 0x46),
PANEL_DCS(0xB6, 0x55),
PANEL_DCS(0xB7, 0x6E),
PANEL_DCS(0xB8, 0x92),
PANEL_DCS(0xB9, 0xD4),
PANEL_DCS(0xBA, 0x1B),
PANEL_DCS(0xBB, 0x9B),
PANEL_DELAY(0x05),
PANEL_DCS(0xBC, 0x28),
PANEL_DCS(0xBD, 0x2D),
PANEL_DCS(0xBE, 0xC3),
PANEL_DCS(0xBF, 0x2F),
PANEL_DCS(0xC0, 0x62),
PANEL_DCS(0xC1, 0x99),
PANEL_DCS(0xC2, 0xAB),
PANEL_DCS(0xC3, 0xBF),
PANEL_DCS(0xC4, 0xCF),
PANEL_DCS(0xC5, 0xDF),
PANEL_DCS(0xC6, 0xF0),
PANEL_DCS(0xC7, 0xF9),
PANEL_DCS(0xC8, 0xFC),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x0C),
PANEL_DCS(0xB1, 0x04),
PANEL_DCS(0xB2, 0x05),
PANEL_DCS(0xB3, 0x17),
PANEL_DCS(0xB4, 0x2E),
PANEL_DCS(0xB5, 0x42),
PANEL_DCS(0xB6, 0x51),
PANEL_DCS(0xB7, 0x69),
PANEL_DCS(0xB8, 0x88),
PANEL_DCS(0xB9, 0xC9),
PANEL_DCS(0xBA, 0x0C),
PANEL_DCS(0xBB, 0x86),
PANEL_DELAY(0x05),
PANEL_DCS(0xBC, 0x03),
PANEL_DCS(0xBD, 0x08),
PANEL_DCS(0xBE, 0x95),
PANEL_DCS(0xBF, 0x05),
PANEL_DCS(0xC0, 0x35),
PANEL_DCS(0xC1, 0x62),
PANEL_DCS(0xC2, 0x81),
PANEL_DCS(0xC3, 0x96),
PANEL_DCS(0xC4, 0x9E),
PANEL_DCS(0xC5, 0xA5),
PANEL_DCS(0xC6, 0xAD),
PANEL_DCS(0xC7, 0xB1),
PANEL_DCS(0xC8, 0xB4),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DELAY(0x64),
PANEL_DCS(0xB0, 0x00),
PANEL_DCS(0xB3, 0x08),
PANEL_DCS(0xB0, 0x04),
PANEL_DCS(0xB8, 0x68),
PANEL_DELAY(0x0A),
PANEL_DCS(0x11),
PANEL_DELAY(0x78),
PANEL_DCS(0x29),
PANEL_DELAY(0x14),
PANEL_END,
},
};
316 changes: 316 additions & 0 deletions src/drivers/mipi/panel-BOE_TV101WUM_N53.c
@@ -0,0 +1,316 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#include <mipi/panel.h>

struct panel_serializable_data BOE_TV101WUM_N53 = {
.edid = {
.ascii_string = "TV101WUM-N53",
.manufacturer_name = "BOE",
.panel_bits_per_color = 8,
.panel_bits_per_pixel = 24,
.mode = {
.pixel_clock = 159916,
.lvds_dual_channel = 0,
.refresh = 60,
.ha = 1200, .hbl = 164, .hso = 80, .hspw = 24,
.va = 1920, .vbl = 34, .vso = 20, .vspw = 4,
.phsync = '-', .pvsync = '-',
.x_mm = 135, .y_mm = 216,
},
},
.init = {
PANEL_DELAY(24),
PANEL_DCS(0xB0, 0x05),
PANEL_DCS(0xB1, 0xE5),
PANEL_DCS(0xB3, 0x52),
PANEL_DCS(0xB0, 0x00),
PANEL_DCS(0xB3, 0x88),
PANEL_DCS(0xB0, 0x04),
PANEL_DCS(0xB8, 0x00),
PANEL_DCS(0xB0, 0x00),
PANEL_DCS(0xB6, 0x03),
PANEL_DCS(0xBA, 0x8B),
PANEL_DCS(0xBF, 0x1A),
PANEL_DCS(0xC0, 0x0F),
PANEL_DCS(0xC2, 0x0C),
PANEL_DCS(0xC3, 0x02),
PANEL_DCS(0xC4, 0x0C),
PANEL_DCS(0xC5, 0x02),
PANEL_DCS(0xB0, 0x01),
PANEL_DCS(0xE0, 0x26),
PANEL_DCS(0xE1, 0x26),
PANEL_DCS(0xDC, 0x00),
PANEL_DCS(0xDD, 0x00),
PANEL_DCS(0xCC, 0x26),
PANEL_DCS(0xCD, 0x26),
PANEL_DCS(0xC8, 0x00),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xD2, 0x03),
PANEL_DCS(0xD3, 0x03),
PANEL_DCS(0xE6, 0x04),
PANEL_DCS(0xE7, 0x04),
PANEL_DCS(0xC4, 0x09),
PANEL_DCS(0xC5, 0x09),
PANEL_DCS(0xD8, 0x0A),
PANEL_DCS(0xD9, 0x0A),
PANEL_DCS(0xC2, 0x0B),
PANEL_DCS(0xC3, 0x0B),
PANEL_DCS(0xD6, 0x0C),
PANEL_DCS(0xD7, 0x0C),
PANEL_DCS(0xC0, 0x05),
PANEL_DCS(0xC1, 0x05),
PANEL_DCS(0xD4, 0x06),
PANEL_DCS(0xD5, 0x06),
PANEL_DCS(0xCA, 0x07),
PANEL_DCS(0xCB, 0x07),
PANEL_DCS(0xDE, 0x08),
PANEL_DCS(0xDF, 0x08),
PANEL_DCS(0xB0, 0x02),
PANEL_DCS(0xC0, 0x00),
PANEL_DCS(0xC1, 0x0D),
PANEL_DCS(0xC2, 0x17),
PANEL_DCS(0xC3, 0x26),
PANEL_DCS(0xC4, 0x31),
PANEL_DCS(0xC5, 0x1C),
PANEL_DCS(0xC6, 0x2C),
PANEL_DCS(0xC7, 0x33),
PANEL_DCS(0xC8, 0x31),
PANEL_DCS(0xC9, 0x37),
PANEL_DCS(0xCA, 0x37),
PANEL_DCS(0xCB, 0x37),
PANEL_DCS(0xCC, 0x39),
PANEL_DCS(0xCD, 0x2E),
PANEL_DCS(0xCE, 0x2F),
PANEL_DCS(0xCF, 0x2F),
PANEL_DCS(0xD0, 0x07),
PANEL_DCS(0xD2, 0x00),
PANEL_DCS(0xD3, 0x0D),
PANEL_DCS(0xD4, 0x17),
PANEL_DCS(0xD5, 0x26),
PANEL_DCS(0xD6, 0x31),
PANEL_DCS(0xD7, 0x3F),
PANEL_DCS(0xD8, 0x3F),
PANEL_DCS(0xD9, 0x3F),
PANEL_DCS(0xDA, 0x3F),
PANEL_DCS(0xDB, 0x37),
PANEL_DCS(0xDC, 0x37),
PANEL_DCS(0xDD, 0x37),
PANEL_DCS(0xDE, 0x39),
PANEL_DCS(0xDF, 0x2E),
PANEL_DCS(0xE0, 0x2F),
PANEL_DCS(0xE1, 0x2F),
PANEL_DCS(0xE2, 0x07),
PANEL_DCS(0xB0, 0x03),
PANEL_DCS(0xC8, 0x0B),
PANEL_DCS(0xC9, 0x07),
PANEL_DCS(0xC3, 0x00),
PANEL_DCS(0xE7, 0x00),
PANEL_DCS(0xC5, 0x2A),
PANEL_DCS(0xDE, 0x2A),
PANEL_DCS(0xCA, 0x43),
PANEL_DCS(0xC9, 0x07),
PANEL_DCS(0xE4, 0xC0),
PANEL_DCS(0xE5, 0x0D),
PANEL_DCS(0xCB, 0x00),
PANEL_DCS(0xB0, 0x06),
PANEL_DCS(0xB8, 0xA5),
PANEL_DCS(0xC0, 0xA5),
PANEL_DCS(0xC7, 0x0F),
PANEL_DCS(0xD5, 0x32),
PANEL_DCS(0xB8, 0x00),
PANEL_DCS(0xC0, 0x00),
PANEL_DCS(0xBC, 0x00),
PANEL_DCS(0xB0, 0x07),
PANEL_DCS(0xB1, 0x00),
PANEL_DCS(0xB2, 0x02),
PANEL_DCS(0xB3, 0x0F),
PANEL_DCS(0xB4, 0x25),
PANEL_DCS(0xB5, 0x39),
PANEL_DCS(0xB6, 0x4E),
PANEL_DCS(0xB7, 0x72),
PANEL_DCS(0xB8, 0x97),
PANEL_DCS(0xB9, 0xDC),
PANEL_DCS(0xBA, 0x22),
PANEL_DCS(0xBB, 0xA4),
PANEL_DCS(0xBC, 0x2B),
PANEL_DCS(0xBD, 0x2F),
PANEL_DCS(0xBE, 0xA9),
PANEL_DCS(0xBF, 0x25),
PANEL_DCS(0xC0, 0x61),
PANEL_DCS(0xC1, 0x97),
PANEL_DCS(0xC2, 0xB2),
PANEL_DCS(0xC3, 0xCD),
PANEL_DCS(0xC4, 0xD9),
PANEL_DCS(0xC5, 0xE7),
PANEL_DCS(0xC6, 0xF4),
PANEL_DCS(0xC7, 0xFA),
PANEL_DCS(0xC8, 0xFC),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x08),
PANEL_DCS(0xB1, 0x04),
PANEL_DCS(0xB2, 0x05),
PANEL_DCS(0xB3, 0x11),
PANEL_DCS(0xB4, 0x24),
PANEL_DCS(0xB5, 0x39),
PANEL_DCS(0xB6, 0x4F),
PANEL_DCS(0xB7, 0x72),
PANEL_DCS(0xB8, 0x98),
PANEL_DCS(0xB9, 0xDC),
PANEL_DCS(0xBA, 0x23),
PANEL_DCS(0xBB, 0xA6),
PANEL_DCS(0xBC, 0x2C),
PANEL_DCS(0xBD, 0x30),
PANEL_DCS(0xBE, 0xAA),
PANEL_DCS(0xBF, 0x26),
PANEL_DCS(0xC0, 0x62),
PANEL_DCS(0xC1, 0x9B),
PANEL_DCS(0xC2, 0xB5),
PANEL_DCS(0xC3, 0xCF),
PANEL_DCS(0xC4, 0xDB),
PANEL_DCS(0xC5, 0xE8),
PANEL_DCS(0xC6, 0xF5),
PANEL_DCS(0xC7, 0xFA),
PANEL_DCS(0xC8, 0xFC),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x09),
PANEL_DCS(0xB1, 0x04),
PANEL_DCS(0xB2, 0x02),
PANEL_DCS(0xB3, 0x16),
PANEL_DCS(0xB4, 0x24),
PANEL_DCS(0xB5, 0x3B),
PANEL_DCS(0xB6, 0x4F),
PANEL_DCS(0xB7, 0x73),
PANEL_DCS(0xB8, 0x99),
PANEL_DCS(0xB9, 0xE0),
PANEL_DCS(0xBA, 0x26),
PANEL_DCS(0xBB, 0xAD),
PANEL_DCS(0xBC, 0x36),
PANEL_DCS(0xBD, 0x3A),
PANEL_DCS(0xBE, 0xAE),
PANEL_DCS(0xBF, 0x2A),
PANEL_DCS(0xC0, 0x66),
PANEL_DCS(0xC1, 0x9E),
PANEL_DCS(0xC2, 0xB8),
PANEL_DCS(0xC3, 0xD1),
PANEL_DCS(0xC4, 0xDD),
PANEL_DCS(0xC5, 0xE9),
PANEL_DCS(0xC6, 0xF6),
PANEL_DCS(0xC7, 0xFA),
PANEL_DCS(0xC8, 0xFC),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x0A),
PANEL_DCS(0xB1, 0x00),
PANEL_DCS(0xB2, 0x02),
PANEL_DCS(0xB3, 0x0F),
PANEL_DCS(0xB4, 0x25),
PANEL_DCS(0xB5, 0x39),
PANEL_DCS(0xB6, 0x4E),
PANEL_DCS(0xB7, 0x72),
PANEL_DCS(0xB8, 0x97),
PANEL_DCS(0xB9, 0xDC),
PANEL_DCS(0xBA, 0x22),
PANEL_DCS(0xBB, 0xA4),
PANEL_DCS(0xBC, 0x2B),
PANEL_DCS(0xBD, 0x2F),
PANEL_DCS(0xBE, 0xA9),
PANEL_DCS(0xBF, 0x25),
PANEL_DCS(0xC0, 0x61),
PANEL_DCS(0xC1, 0x97),
PANEL_DCS(0xC2, 0xB2),
PANEL_DCS(0xC3, 0xCD),
PANEL_DCS(0xC4, 0xD9),
PANEL_DCS(0xC5, 0xE7),
PANEL_DCS(0xC6, 0xF4),
PANEL_DCS(0xC7, 0xFA),
PANEL_DCS(0xC8, 0xFC),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x0B),
PANEL_DCS(0xB1, 0x04),
PANEL_DCS(0xB2, 0x05),
PANEL_DCS(0xB3, 0x11),
PANEL_DCS(0xB4, 0x24),
PANEL_DCS(0xB5, 0x39),
PANEL_DCS(0xB6, 0x4F),
PANEL_DCS(0xB7, 0x72),
PANEL_DCS(0xB8, 0x98),
PANEL_DCS(0xB9, 0xDC),
PANEL_DCS(0xBA, 0x23),
PANEL_DCS(0xBB, 0xA6),
PANEL_DCS(0xBC, 0x2C),
PANEL_DCS(0xBD, 0x30),
PANEL_DCS(0xBE, 0xAA),
PANEL_DCS(0xBF, 0x26),
PANEL_DCS(0xC0, 0x62),
PANEL_DCS(0xC1, 0x9B),
PANEL_DCS(0xC2, 0xB5),
PANEL_DCS(0xC3, 0xCF),
PANEL_DCS(0xC4, 0xDB),
PANEL_DCS(0xC5, 0xE8),
PANEL_DCS(0xC6, 0xF5),
PANEL_DCS(0xC7, 0xFA),
PANEL_DCS(0xC8, 0xFC),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x0C),
PANEL_DCS(0xB1, 0x04),
PANEL_DCS(0xB2, 0x02),
PANEL_DCS(0xB3, 0x16),
PANEL_DCS(0xB4, 0x24),
PANEL_DCS(0xB5, 0x3B),
PANEL_DCS(0xB6, 0x4F),
PANEL_DCS(0xB7, 0x73),
PANEL_DCS(0xB8, 0x99),
PANEL_DCS(0xB9, 0xE0),
PANEL_DCS(0xBA, 0x26),
PANEL_DCS(0xBB, 0xAD),
PANEL_DCS(0xBC, 0x36),
PANEL_DCS(0xBD, 0x3A),
PANEL_DCS(0xBE, 0xAE),
PANEL_DCS(0xBF, 0x2A),
PANEL_DCS(0xC0, 0x66),
PANEL_DCS(0xC1, 0x9E),
PANEL_DCS(0xC2, 0xB8),
PANEL_DCS(0xC3, 0xD1),
PANEL_DCS(0xC4, 0xDD),
PANEL_DCS(0xC5, 0xE9),
PANEL_DCS(0xC6, 0xF6),
PANEL_DCS(0xC7, 0xFA),
PANEL_DCS(0xC8, 0xFC),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x00),
PANEL_DCS(0xB3, 0x08),
PANEL_DCS(0xB0, 0x04),
PANEL_DCS(0xB8, 0x68),
PANEL_DELAY(150),
PANEL_END,
},
};