669 changes: 0 additions & 669 deletions configs/pcengines_apu1.config

This file was deleted.

684 changes: 0 additions & 684 deletions configs/pcengines_apu2.config

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684 changes: 0 additions & 684 deletions configs/pcengines_apu3.config

This file was deleted.

684 changes: 0 additions & 684 deletions configs/pcengines_apu4.config

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682 changes: 0 additions & 682 deletions configs/pcengines_apu5.config

This file was deleted.

2 changes: 1 addition & 1 deletion payloads/external/SeaBIOS/Kconfig
Expand Up @@ -5,7 +5,7 @@ choice
default SEABIOS_STABLE

config SEABIOS_STABLE
bool "1.11.0.4"
bool "1.11.0.5"
help
Stable SeaBIOS version
config SEABIOS_MASTER
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2 changes: 1 addition & 1 deletion payloads/external/SeaBIOS/Makefile
@@ -1,5 +1,5 @@
TAG-$(CONFIG_SEABIOS_MASTER)=origin/master
TAG-$(CONFIG_SEABIOS_STABLE)=rel-1.11.0.4
TAG-$(CONFIG_SEABIOS_STABLE)=rel-1.11.0.5
TAG-$(CONFIG_SEABIOS_REVISION)=$(CONFIG_SEABIOS_REVISION_ID)

project_git_repo=https://github.com/pcengines/seabios.git
Expand Down
4 changes: 2 additions & 2 deletions payloads/external/iPXE/Kconfig
Expand Up @@ -90,13 +90,13 @@ config PXE_ROM_ID

config PXE_CUSTOM_GENERAL_H
string "iPXE custom general.h file"
default "../../../../apu2-documentation/ipxe/general.h"
default "general.h"
help
This option allows user to customize feature set built-in into iPXE ROM.

config PXE_CUSTOM_BOOTMENU_FILE
string "iPXE custom menu.ipxe file"
default "../../../../apu2-documentation/ipxe/menu.ipxe"
default "menu.ipxe"
help
This option allows user to customize boot menu for iPXE ROM.

Expand Down
2 changes: 1 addition & 1 deletion payloads/external/sortbootorder/Makefile
@@ -1,4 +1,4 @@
version=4.6.8
version=4.6.9
branch_name=v$(version)
project_url=https://github.com/pcengines/sortbootorder/archive/$(branch_name).tar.gz
archive_name=$(branch_name).tar.gz
Expand Down
2 changes: 2 additions & 0 deletions src/mainboard/pcengines/apu2/Makefile.inc
Expand Up @@ -17,11 +17,13 @@ romstage-y += bios_knobs.c
romstage-y += BiosCallOuts.c
romstage-y += OemCustomize.c
romstage-y += gpio_ftns.c
romstage-y += s1_button.c

ramstage-y += bios_knobs.c
ramstage-y += BiosCallOuts.c
ramstage-y += OemCustomize.c
ramstage-y += gpio_ftns.c
ramstage-y += s1_button.c

# Order of names in SPD_SOURCES is important!
SPD_SOURCES = HYNIX-2G-1333
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2 changes: 2 additions & 0 deletions src/mainboard/pcengines/apu2/gpio_ftns.h
Expand Up @@ -29,6 +29,7 @@ int get_spd_offset(void);
// http://www.pcengines.ch/schema/apu2c.pdf
// http://www.pcengines.ch/schema/apu3a.pdf
//
#define IOMUX_GPIO_22 0x09 // MODESW (APU5)
#define IOMUX_GPIO_32 0x59 // MODESW (SIMSWAP2 on APU5)
#define IOMUX_GPIO_33 0x5A // SIMSWAP (SIMSWAP3 on APU5)
#define IOMUX_GPIO_49 0x40 // STRAP0
Expand All @@ -43,6 +44,7 @@ int get_spd_offset(void);
#define IOMUX_GPIO_68 0x48 // PE4_WDIS (SIMSWAP1 on APU5)
#define IOMUX_GPIO_71 0x4D // PROCHOT

#define GPIO_22 0x24 // MODESW (APU5)
#define GPIO_32 0x164 // MODESW (SIMSWAP2 on APU5)
#define GPIO_33 0x168 // SIMSWAP (SIMSWAP3 on APU5)
#define GPIO_49 0x100 // STRAP0
Expand Down
149 changes: 6 additions & 143 deletions src/mainboard/pcengines/apu2/mainboard.c
Expand Up @@ -34,12 +34,9 @@
#include <spd_bin.h>
#include <spi_flash.h>
#include <spi-generic.h>
#include <boot_device.h>
#include <cbfs.h>
#include <commonlib/region.h>
#include <commonlib/cbfs.h>
#include "gpio_ftns.h"
#include "bios_knobs.h"
#include "s1_button.h"

#define PM_RTC_CONTROL 0x56
#define PM_RTC_SHADOW 0x5B
Expand All @@ -48,8 +45,6 @@
#define SEC_REG_SERIAL_ADDR 0x1000
#define MAX_SERIAL_LEN 10

#define BOOTORDER_FILE "bootorder"

/***********************************************************
* These arrays set up the FCH PCI_INTR registers 0xC00/0xC01.
* This table is responsible for physically routing the PIC and
Expand Down Expand Up @@ -204,67 +199,6 @@ static void config_gpio_mux(void)
}
}

size_t get_bootorder_cbfs_offset(const char *name, uint32_t type)
{
struct region_device rdev;
const struct region_device *boot_dev;
struct cbfs_props props;
struct cbfsf fh;

boot_dev = boot_device_ro();

if (boot_dev == NULL) {
printk(BIOS_WARNING, "Can't init CBFS boot device\n");
return 0;
}

if (cbfs_boot_region_properties(&props)) {
printk(BIOS_WARNING, "Can't locate CBFS\n");
return 0;
}

if (rdev_chain(&rdev, boot_dev, props.offset, props.size)) {
printk(BIOS_WARNING, "Rdev chain failed\n");
return 0;
}

if (cbfs_locate(&fh, &rdev, name, &type)) {
printk(BIOS_WARNING, "Can't locate file in CBFS\n");
return 0;
}

return (size_t) rdev_relative_offset(boot_dev, &fh.data);
}

int find_knob_index(const char *s, const char *pattern)
{

int pattern_index = 0;
char *result = (char *) s;
char *lpattern = (char *) pattern;

while (*result && *pattern ) {
if ( *lpattern == 0) // the pattern matches return the pointer
return pattern_index;
if ( *result == 0) // We're at the end of the file content but don't have a patter match yet
return -1;
if (*result == *lpattern ) {
// The string matches, simply advance
result++;
pattern_index++;
lpattern++;
} else {
// The string doesn't match restart the pattern
result++;
pattern_index++;
lpattern = (char *) pattern;
}
}

return -1;

}

/**********************************************
* enable the dedicated function in mainboard.
**********************************************/
Expand Down Expand Up @@ -327,90 +261,19 @@ static void mainboard_final(void *chip_info)
write_gpio(GPIO_58, 1);
write_gpio(GPIO_59, 1);

#if CONFIG_BOARD_PCENGINES_APU2 || CONFIG_BOARD_PCENGINES_APU3 || CONFIG_BOARD_PCENGINES_APU4
if (!check_console()) {

//
// The console is disabled, check if S1 is pressed and enable if so
//
#if CONFIG_BOARD_PCENGINES_APU5
if (!read_gpio(GPIO_22)) {
#else
if (!read_gpio(GPIO_32)) {

#endif
printk(BIOS_INFO, "S1 PRESSED\n");

const struct spi_flash *flash = NULL;
size_t fsize, offset;
char* bootorder_file = NULL;
int knob_index;
char *bootorder_copy;

bootorder_file = cbfs_boot_map_with_leak("bootorder", CBFS_TYPE_RAW, &fsize);

if (bootorder_file == NULL){
printk(BIOS_WARNING, "Could not mmap bootorder\n");
return;
}

if (fsize & 0xFFF) {
printk(BIOS_WARNING,"The bootorder file is not 4k aligned\n");
return;
}

offset = get_bootorder_cbfs_offset("bootorder", CBFS_TYPE_RAW);

if(offset == -1) {
printk(BIOS_WARNING,"Failed to retrieve bootorder file offset\n");
return;
}

bootorder_copy = (char *)malloc(fsize);

if(bootorder_copy == NULL) {
printk(BIOS_WARNING,"Failed to allocate memory for bootorder\n");
return;
}

if(memcpy(bootorder_copy, bootorder_file, fsize) == NULL) {
printk(BIOS_WARNING,"Copying bootorder failed\n");
free(bootorder_copy);
return;
}

knob_index = find_knob_index(bootorder_copy, "scon");

if(knob_index == -1){
printk(BIOS_WARNING,"scon knob not found in bootorder\n");
free(bootorder_copy);
return;
}

*(bootorder_copy + knob_index) = '1';

flash = boot_device_spi_flash();

if (flash == NULL) {
printk(BIOS_WARNING, "Can't get boot flash device\n");
free(bootorder_copy);
return;
}

if (spi_flash_erase(flash, (u32) offset, fsize)) {
printk(BIOS_WARNING, "SPI erase failed\n");
free(bootorder_copy);
return;
}

if (spi_flash_write(flash, offset, fsize, bootorder_copy)) {
printk(BIOS_WARNING, "SPI write failed\n");
free(bootorder_copy);
return;
} else {
printk(BIOS_INFO, "Bootorder write successed\n");
}

free(bootorder_copy);
enable_console();
}
}
#endif
}

/*
Expand Down
4 changes: 4 additions & 0 deletions src/mainboard/pcengines/apu2/romstage.c
Expand Up @@ -176,6 +176,10 @@ static void early_lpc_init(void)
//
// Configure output disabled, value low, pull up/down disabled
//
#if CONFIG_BOARD_PCENGINES_APU5
configure_gpio(IOMUX_GPIO_22, Function0, GPIO_22, setting);
#endif

#if CONFIG_BOARD_PCENGINES_APU2 || CONFIG_BOARD_PCENGINES_APU3 || CONFIG_BOARD_PCENGINES_APU4
configure_gpio(IOMUX_GPIO_32, Function0, GPIO_32, setting);
#endif
Expand Down
170 changes: 170 additions & 0 deletions src/mainboard/pcengines/apu2/s1_button.c
@@ -0,0 +1,170 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2018 PC Engines GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/

#include <console/console.h>
#include <string.h>
#include <stdlib.h>
#include "s1_button.h"
#include <spi_flash.h>
#include <spi-generic.h>
#include <boot_device.h>
#include <cbfs.h>
#include <commonlib/region.h>
#include <commonlib/cbfs.h>

#define BOOTORDER_FILE "bootorder"

static int find_knob_index(const char *s, const char *pattern)
{

int pattern_index = 0;
char *result = (char *) s;
char *lpattern = (char *) pattern;

while (*result && *pattern ) {
if ( *lpattern == 0) // the pattern matches return the pointer
return pattern_index;
if ( *result == 0) // We're at the end of the file content but don't have a patter match yet
return -1;
if (*result == *lpattern ) {
// The string matches, simply advance
result++;
pattern_index++;
lpattern++;
} else {
// The string doesn't match restart the pattern
result++;
pattern_index++;
lpattern = (char *) pattern;
}
}

return -1;
}

static size_t get_bootorder_cbfs_offset(const char *name, uint32_t type)
{
struct region_device rdev;
const struct region_device *boot_dev;
struct cbfs_props props;
struct cbfsf fh;

boot_dev = boot_device_ro();

if (boot_dev == NULL) {
printk(BIOS_WARNING, "Can't init CBFS boot device\n");
return 0;
}

if (cbfs_boot_region_properties(&props)) {
printk(BIOS_WARNING, "Can't locate CBFS\n");
return 0;
}

if (rdev_chain(&rdev, boot_dev, props.offset, props.size)) {
printk(BIOS_WARNING, "Rdev chain failed\n");
return 0;
}

if (cbfs_locate(&fh, &rdev, name, &type)) {
printk(BIOS_WARNING, "Can't locate file in CBFS\n");
return 0;
}

return (size_t) rdev_relative_offset(boot_dev, &fh.data);
}

static int flash_bootorder(size_t offset, size_t fsize, char *buffer)
{
const struct spi_flash *flash;

flash = boot_device_spi_flash();

if (flash == NULL) {
printk(BIOS_WARNING, "Can't get boot flash device\n");
return -1;
}

if (spi_flash_erase(flash, (u32) offset, fsize)) {
printk(BIOS_WARNING, "SPI erase failed\n");
return -1;
}

if (spi_flash_write(flash, offset, fsize, buffer)) {
printk(BIOS_WARNING, "SPI write failed\n");
return -1;
}

printk(BIOS_INFO, "Bootorder write successed\n");
return 0;
}

void enable_console(void)
{
size_t fsize, offset;
char* bootorder_file = NULL;
int knob_index;
char *bootorder_copy;

bootorder_file = cbfs_boot_map_with_leak("bootorder", CBFS_TYPE_RAW, &fsize);

if (bootorder_file == NULL){
printk(BIOS_WARNING, "Could not mmap bootorder\n");
return;
}

if (fsize & 0xFFF) {
printk(BIOS_WARNING,"The bootorder file is not 4k aligned\n");
return;
}

offset = get_bootorder_cbfs_offset("bootorder", CBFS_TYPE_RAW);

if(offset == -1) {
printk(BIOS_WARNING,"Failed to retrieve bootorder file offset\n");
return;
}

bootorder_copy = (char *) malloc(fsize);

if(bootorder_copy == NULL) {
printk(BIOS_WARNING,"Failed to allocate memory for bootorder\n");
return;
}

if(memcpy(bootorder_copy, bootorder_file, fsize) == NULL) {
printk(BIOS_WARNING,"Copying bootorder failed\n");
free(bootorder_copy);
return;
}

knob_index = find_knob_index(bootorder_copy, "scon");

if(knob_index == -1){
printk(BIOS_WARNING,"scon knob not found in bootorder\n");
free(bootorder_copy);
return;
}

*(bootorder_copy + knob_index) = '1';

if(flash_bootorder(offset, fsize, bootorder_copy)) {
printk(BIOS_WARNING, "Failed to flash bootorder\n");
}
}
16 changes: 16 additions & 0 deletions src/mainboard/pcengines/apu2/s1_button.h
@@ -0,0 +1,16 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2018 PC Engines GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/

void enable_console(void);
3 changes: 3 additions & 0 deletions util/genbuild_h/genbuild_h.sh
Expand Up @@ -33,6 +33,9 @@ if [ "${BUILD_TIMELESS}" = "1" ]; then
elif [ -e "${top}/.git" -a -x "$(command -v git)" ]; then
GITREV=$(LANG= git log -1 --format=format:%h)
GITTAG=$(LANG= git describe --tags --exact-match $GITREV)
if [ -z $GITTAG ]; then
GITTAG=$KERNELVERSION
fi
TIMESOURCE=git
DATE=$(git log --pretty=format:%ct -1)
else
Expand Down