337 changes: 337 additions & 0 deletions src/drivers/mipi/panel-BOE_TV101WUM_NG0.c
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@@ -0,0 +1,337 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#include <mipi/panel.h>

struct panel_serializable_data BOE_TV101WUM_NG0 = {
.edid = {
.ascii_string = "TV101WUM-NG0",
.manufacturer_name = "BOE",
.panel_bits_per_color = 8,
.panel_bits_per_pixel = 24,
.mode = {
.pixel_clock = 159420,
.lvds_dual_channel = 0,
.refresh = 60,
.ha = 1200, .hbl = 164, .hso = 80, .hspw = 24,
.va = 1920, .vbl = 28, .vso = 10, .vspw = 4,
.phsync = '-', .pvsync = '-',
.x_mm = 135, .y_mm = 216,
},
},
.init = {
PANEL_DCS(0x10),
PANEL_DELAY(0x22),
PANEL_DCS(0xB0, 0x05),
PANEL_DCS(0xB1, 0xE5),
PANEL_DCS(0xB3, 0x52),
PANEL_DCS(0xB0, 0x00),
PANEL_DCS(0xB3, 0x88),
PANEL_DCS(0xB0, 0x04),
PANEL_DCS(0xB8, 0x00),
PANEL_DCS(0xB0, 0x00),
PANEL_DCS(0xB2, 0x50),
PANEL_DCS(0xB6, 0x03),
PANEL_DCS(0xBA, 0x8B),
PANEL_DCS(0xBF, 0x15),
PANEL_DCS(0xC0, 0x0F),
PANEL_DCS(0xC2, 0x0C),
PANEL_DCS(0xC3, 0x02),
PANEL_DCS(0xC4, 0x0C),
PANEL_DCS(0xC5, 0x02),
PANEL_DCS(0xB0, 0x01),
PANEL_DCS(0xE0, 0x26),
PANEL_DCS(0xE1, 0x26),
PANEL_DCS(0xDC, 0x00),
PANEL_DCS(0xDD, 0x00),
PANEL_DCS(0xCC, 0x26),
PANEL_DCS(0xCD, 0x26),
PANEL_DCS(0xC8, 0x00),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xD2, 0x04),
PANEL_DCS(0xD3, 0x04),
PANEL_DCS(0xE6, 0x03),
PANEL_DCS(0xE7, 0x03),
PANEL_DCS(0xC4, 0x08),
PANEL_DCS(0xC5, 0x08),
PANEL_DCS(0xD8, 0x07),
PANEL_DCS(0xD9, 0x07),
PANEL_DCS(0xC2, 0x06),
PANEL_DCS(0xC3, 0x06),
PANEL_DCS(0xD6, 0x05),
PANEL_DCS(0xD7, 0x05),
PANEL_DCS(0xC0, 0x0C),
PANEL_DCS(0xC1, 0x0C),
PANEL_DCS(0xD4, 0x0B),
PANEL_DCS(0xD5, 0x0B),
PANEL_DCS(0xCA, 0x0A),
PANEL_DCS(0xCB, 0x0A),
PANEL_DCS(0xDE, 0x09),
PANEL_DCS(0xDF, 0x09),
PANEL_DCS(0xC6, 0x26),
PANEL_DCS(0xC7, 0x26),
PANEL_DCS(0xCE, 0x00),
PANEL_DCS(0xCF, 0x00),
PANEL_DCS(0xDA, 0x26),
PANEL_DCS(0xDB, 0x26),
PANEL_DCS(0xE2, 0x00),
PANEL_DCS(0xE3, 0x00),
PANEL_DCS(0xB0, 0x02),
PANEL_DCS(0xC0, 0x00),
PANEL_DCS(0xC1, 0x07),
PANEL_DCS(0xC2, 0x0D),
PANEL_DCS(0xC3, 0x18),
PANEL_DCS(0xC4, 0x27),
PANEL_DCS(0xC5, 0x28),
PANEL_DCS(0xC6, 0x30),
PANEL_DCS(0xC7, 0x2E),
PANEL_DCS(0xC8, 0x2F),
PANEL_DCS(0xC9, 0x1A),
PANEL_DCS(0xCA, 0x20),
PANEL_DCS(0xCB, 0x29),
PANEL_DCS(0xCC, 0x26),
PANEL_DCS(0xCD, 0x32),
PANEL_DCS(0xCE, 0x33),
PANEL_DCS(0xCF, 0x31),
PANEL_DCS(0xD0, 0x06),
PANEL_DCS(0xD2, 0x00),
PANEL_DCS(0xD3, 0x07),
PANEL_DCS(0xD4, 0x12),
PANEL_DCS(0xD5, 0x26),
PANEL_DCS(0xD6, 0x3D),
PANEL_DCS(0xD7, 0x3F),
PANEL_DCS(0xD8, 0x3F),
PANEL_DCS(0xD9, 0x3F),
PANEL_DCS(0xDA, 0x3F),
PANEL_DCS(0xDB, 0x3F),
PANEL_DCS(0xDC, 0x3F),
PANEL_DCS(0xDD, 0x3F),
PANEL_DCS(0xDE, 0x3F),
PANEL_DCS(0xDF, 0x3A),
PANEL_DCS(0xE0, 0x37),
PANEL_DCS(0xE1, 0x35),
PANEL_DCS(0xE2, 0x07),
PANEL_DCS(0xB0, 0x03),
PANEL_DCS(0xC8, 0x0B),
PANEL_DCS(0xC9, 0x07),
PANEL_DCS(0xC3, 0x00),
PANEL_DCS(0xE7, 0x00),
PANEL_DCS(0xC5, 0x2A),
PANEL_DCS(0xDE, 0x2A),
PANEL_DCS(0xCA, 0x43),
PANEL_DCS(0xC9, 0x07),
PANEL_DCS(0xE4, 0xC0),
PANEL_DCS(0xE5, 0x0D),
PANEL_DCS(0xCB, 0x00),
PANEL_DCS(0xB0, 0x06),
PANEL_DCS(0xB8, 0xA5),
PANEL_DCS(0xC0, 0xA5),
PANEL_DCS(0xC7, 0x0F),
PANEL_DCS(0xD5, 0x32),
PANEL_DCS(0xB8, 0x00),
PANEL_DCS(0xC0, 0x00),
PANEL_DCS(0xBC, 0x00),
PANEL_DCS(0xB0, 0x07),
PANEL_DCS(0xB1, 0x00),
PANEL_DCS(0xB2, 0x09),
PANEL_DCS(0xB3, 0x19),
PANEL_DCS(0xB4, 0x2F),
PANEL_DCS(0xB5, 0x44),
PANEL_DCS(0xB6, 0x52),
PANEL_DCS(0xB7, 0x6A),
PANEL_DCS(0xB8, 0x8A),
PANEL_DCS(0xB9, 0xCA),
PANEL_DCS(0xBA, 0x0C),
PANEL_DCS(0xBB, 0x87),
PANEL_DELAY(0x05),
PANEL_DCS(0xBC, 0x06),
PANEL_DCS(0xBD, 0x0A),
PANEL_DCS(0xBE, 0x9B),
PANEL_DCS(0xBF, 0x0C),
PANEL_DCS(0xC0, 0x3D),
PANEL_DCS(0xC1, 0x71),
PANEL_DCS(0xC2, 0x90),
PANEL_DCS(0xC3, 0xA0),
PANEL_DCS(0xC4, 0xA8),
PANEL_DCS(0xC5, 0xB1),
PANEL_DCS(0xC6, 0xBB),
PANEL_DCS(0xC7, 0xC0),
PANEL_DCS(0xC8, 0xC4),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x08),
PANEL_DCS(0xB1, 0x04),
PANEL_DCS(0xB2, 0x08),
PANEL_DCS(0xB3, 0x19),
PANEL_DCS(0xB4, 0x31),
PANEL_DCS(0xB5, 0x46),
PANEL_DCS(0xB6, 0x55),
PANEL_DCS(0xB7, 0x6E),
PANEL_DCS(0xB8, 0x92),
PANEL_DCS(0xB9, 0xD4),
PANEL_DCS(0xBA, 0x1B),
PANEL_DCS(0xBB, 0x9B),
PANEL_DELAY(0x05),
PANEL_DCS(0xBC, 0x28),
PANEL_DCS(0xBD, 0x2D),
PANEL_DCS(0xBE, 0xC3),
PANEL_DCS(0xBF, 0x2F),
PANEL_DCS(0xC0, 0x62),
PANEL_DCS(0xC1, 0x99),
PANEL_DCS(0xC2, 0xAB),
PANEL_DCS(0xC3, 0xBF),
PANEL_DCS(0xC4, 0xCF),
PANEL_DCS(0xC5, 0xDF),
PANEL_DCS(0xC6, 0xF0),
PANEL_DCS(0xC7, 0xF9),
PANEL_DCS(0xC8, 0xFC),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x09),
PANEL_DCS(0xB1, 0x04),
PANEL_DCS(0xB2, 0x05),
PANEL_DCS(0xB3, 0x17),
PANEL_DCS(0xB4, 0x2E),
PANEL_DCS(0xB5, 0x42),
PANEL_DCS(0xB6, 0x51),
PANEL_DCS(0xB7, 0x69),
PANEL_DCS(0xB8, 0x88),
PANEL_DCS(0xB9, 0xC9),
PANEL_DCS(0xBA, 0x0C),
PANEL_DCS(0xBB, 0x86),
PANEL_DELAY(0x05),
PANEL_DCS(0xBC, 0x03),
PANEL_DCS(0xBD, 0x08),
PANEL_DCS(0xBE, 0x95),
PANEL_DCS(0xBF, 0x05),
PANEL_DCS(0xC0, 0x35),
PANEL_DCS(0xC1, 0x62),
PANEL_DCS(0xC2, 0x81),
PANEL_DCS(0xC3, 0x96),
PANEL_DCS(0xC4, 0x9E),
PANEL_DCS(0xC5, 0xA5),
PANEL_DCS(0xC6, 0xAD),
PANEL_DCS(0xC7, 0xB1),
PANEL_DCS(0xC8, 0xB4),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x0A),
PANEL_DCS(0xB1, 0x00),
PANEL_DCS(0xB2, 0x09),
PANEL_DCS(0xB3, 0x19),
PANEL_DCS(0xB4, 0x2F),
PANEL_DCS(0xB5, 0x44),
PANEL_DCS(0xB6, 0x52),
PANEL_DCS(0xB7, 0x6A),
PANEL_DCS(0xB8, 0x8A),
PANEL_DCS(0xB9, 0xCA),
PANEL_DCS(0xBA, 0x0C),
PANEL_DCS(0xBB, 0x87),
PANEL_DELAY(0x05),
PANEL_DCS(0xBC, 0x06),
PANEL_DCS(0xBD, 0x0A),
PANEL_DCS(0xBE, 0x9B),
PANEL_DCS(0xBF, 0x0C),
PANEL_DCS(0xC0, 0x3D),
PANEL_DCS(0xC1, 0x71),
PANEL_DCS(0xC2, 0x90),
PANEL_DCS(0xC3, 0xA0),
PANEL_DCS(0xC4, 0xA8),
PANEL_DCS(0xC5, 0xB1),
PANEL_DCS(0xC6, 0xBB),
PANEL_DCS(0xC7, 0xC0),
PANEL_DCS(0xC8, 0xC4),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x0B),
PANEL_DCS(0xB1, 0x04),
PANEL_DCS(0xB2, 0x08),
PANEL_DCS(0xB3, 0x19),
PANEL_DCS(0xB4, 0x31),
PANEL_DCS(0xB5, 0x46),
PANEL_DCS(0xB6, 0x55),
PANEL_DCS(0xB7, 0x6E),
PANEL_DCS(0xB8, 0x92),
PANEL_DCS(0xB9, 0xD4),
PANEL_DCS(0xBA, 0x1B),
PANEL_DCS(0xBB, 0x9B),
PANEL_DELAY(0x05),
PANEL_DCS(0xBC, 0x28),
PANEL_DCS(0xBD, 0x2D),
PANEL_DCS(0xBE, 0xC3),
PANEL_DCS(0xBF, 0x2F),
PANEL_DCS(0xC0, 0x62),
PANEL_DCS(0xC1, 0x99),
PANEL_DCS(0xC2, 0xAB),
PANEL_DCS(0xC3, 0xBF),
PANEL_DCS(0xC4, 0xCF),
PANEL_DCS(0xC5, 0xDF),
PANEL_DCS(0xC6, 0xF0),
PANEL_DCS(0xC7, 0xF9),
PANEL_DCS(0xC8, 0xFC),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x0C),
PANEL_DCS(0xB1, 0x04),
PANEL_DCS(0xB2, 0x05),
PANEL_DCS(0xB3, 0x17),
PANEL_DCS(0xB4, 0x2E),
PANEL_DCS(0xB5, 0x42),
PANEL_DCS(0xB6, 0x51),
PANEL_DCS(0xB7, 0x69),
PANEL_DCS(0xB8, 0x88),
PANEL_DCS(0xB9, 0xC9),
PANEL_DCS(0xBA, 0x0C),
PANEL_DCS(0xBB, 0x86),
PANEL_DELAY(0x05),
PANEL_DCS(0xBC, 0x03),
PANEL_DCS(0xBD, 0x08),
PANEL_DCS(0xBE, 0x95),
PANEL_DCS(0xBF, 0x05),
PANEL_DCS(0xC0, 0x35),
PANEL_DCS(0xC1, 0x62),
PANEL_DCS(0xC2, 0x81),
PANEL_DCS(0xC3, 0x96),
PANEL_DCS(0xC4, 0x9E),
PANEL_DCS(0xC5, 0xA5),
PANEL_DCS(0xC6, 0xAD),
PANEL_DCS(0xC7, 0xB1),
PANEL_DCS(0xC8, 0xB4),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DELAY(0x64),
PANEL_DCS(0xB0, 0x00),
PANEL_DCS(0xB3, 0x08),
PANEL_DCS(0xB0, 0x04),
PANEL_DCS(0xB8, 0x68),
PANEL_DELAY(0x0A),
PANEL_DCS(0x11),
PANEL_DELAY(0x78),
PANEL_DCS(0x29),
PANEL_DELAY(0x14),
PANEL_END,
},
};
316 changes: 316 additions & 0 deletions src/drivers/mipi/panel-BOE_TV101WUM_NL6.c
View file
@@ -0,0 +1,316 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#include <mipi/panel.h>

struct panel_serializable_data BOE_TV101WUM_NL6 = {
.edid = {
.ascii_string = "TV101WUM-NL6",
.manufacturer_name = "BOE",
.panel_bits_per_color = 8,
.panel_bits_per_pixel = 24,
.mode = {
.pixel_clock = 159425,
.lvds_dual_channel = 0,
.refresh = 60,
.ha = 1200, .hbl = 164, .hso = 100, .hspw = 24,
.va = 1920, .vbl = 28, .vso = 10, .vspw = 4,
.phsync = '-', .pvsync = '-',
.x_mm = 135, .y_mm = 216,
},
},
.init = {
PANEL_DELAY(24),
PANEL_DCS(0xB0, 0x05),
PANEL_DCS(0xB1, 0xE5),
PANEL_DCS(0xB3, 0x52),
PANEL_DCS(0xB0, 0x00),
PANEL_DCS(0xB3, 0x88),
PANEL_DCS(0xB0, 0x04),
PANEL_DCS(0xB8, 0x00),
PANEL_DCS(0xB0, 0x00),
PANEL_DCS(0xB6, 0x03),
PANEL_DCS(0xBA, 0x8B),
PANEL_DCS(0xBF, 0x1A),
PANEL_DCS(0xC0, 0x0F),
PANEL_DCS(0xC2, 0x0C),
PANEL_DCS(0xC3, 0x02),
PANEL_DCS(0xC4, 0x0C),
PANEL_DCS(0xC5, 0x02),
PANEL_DCS(0xB0, 0x01),
PANEL_DCS(0xE0, 0x26),
PANEL_DCS(0xE1, 0x26),
PANEL_DCS(0xDC, 0x00),
PANEL_DCS(0xDD, 0x00),
PANEL_DCS(0xCC, 0x26),
PANEL_DCS(0xCD, 0x26),
PANEL_DCS(0xC8, 0x00),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xD2, 0x03),
PANEL_DCS(0xD3, 0x03),
PANEL_DCS(0xE6, 0x04),
PANEL_DCS(0xE7, 0x04),
PANEL_DCS(0xC4, 0x09),
PANEL_DCS(0xC5, 0x09),
PANEL_DCS(0xD8, 0x0A),
PANEL_DCS(0xD9, 0x0A),
PANEL_DCS(0xC2, 0x0B),
PANEL_DCS(0xC3, 0x0B),
PANEL_DCS(0xD6, 0x0C),
PANEL_DCS(0xD7, 0x0C),
PANEL_DCS(0xC0, 0x05),
PANEL_DCS(0xC1, 0x05),
PANEL_DCS(0xD4, 0x06),
PANEL_DCS(0xD5, 0x06),
PANEL_DCS(0xCA, 0x07),
PANEL_DCS(0xCB, 0x07),
PANEL_DCS(0xDE, 0x08),
PANEL_DCS(0xDF, 0x08),
PANEL_DCS(0xB0, 0x02),
PANEL_DCS(0xC0, 0x00),
PANEL_DCS(0xC1, 0x0D),
PANEL_DCS(0xC2, 0x17),
PANEL_DCS(0xC3, 0x26),
PANEL_DCS(0xC4, 0x31),
PANEL_DCS(0xC5, 0x1C),
PANEL_DCS(0xC6, 0x2C),
PANEL_DCS(0xC7, 0x33),
PANEL_DCS(0xC8, 0x31),
PANEL_DCS(0xC9, 0x37),
PANEL_DCS(0xCA, 0x37),
PANEL_DCS(0xCB, 0x37),
PANEL_DCS(0xCC, 0x39),
PANEL_DCS(0xCD, 0x2E),
PANEL_DCS(0xCE, 0x2F),
PANEL_DCS(0xCF, 0x2F),
PANEL_DCS(0xD0, 0x07),
PANEL_DCS(0xD2, 0x00),
PANEL_DCS(0xD3, 0x0D),
PANEL_DCS(0xD4, 0x17),
PANEL_DCS(0xD5, 0x26),
PANEL_DCS(0xD6, 0x31),
PANEL_DCS(0xD7, 0x3F),
PANEL_DCS(0xD8, 0x3F),
PANEL_DCS(0xD9, 0x3F),
PANEL_DCS(0xDA, 0x3F),
PANEL_DCS(0xDB, 0x37),
PANEL_DCS(0xDC, 0x37),
PANEL_DCS(0xDD, 0x37),
PANEL_DCS(0xDE, 0x39),
PANEL_DCS(0xDF, 0x2E),
PANEL_DCS(0xE0, 0x2F),
PANEL_DCS(0xE1, 0x2F),
PANEL_DCS(0xE2, 0x07),
PANEL_DCS(0xB0, 0x03),
PANEL_DCS(0xC8, 0x0B),
PANEL_DCS(0xC9, 0x07),
PANEL_DCS(0xC3, 0x00),
PANEL_DCS(0xE7, 0x00),
PANEL_DCS(0xC5, 0x2A),
PANEL_DCS(0xDE, 0x2A),
PANEL_DCS(0xCA, 0x43),
PANEL_DCS(0xC9, 0x07),
PANEL_DCS(0xE4, 0xC0),
PANEL_DCS(0xE5, 0x0D),
PANEL_DCS(0xCB, 0x00),
PANEL_DCS(0xB0, 0x06),
PANEL_DCS(0xB8, 0xA5),
PANEL_DCS(0xC0, 0xA5),
PANEL_DCS(0xC7, 0x0F),
PANEL_DCS(0xD5, 0x32),
PANEL_DCS(0xB8, 0x00),
PANEL_DCS(0xC0, 0x00),
PANEL_DCS(0xBC, 0x00),
PANEL_DCS(0xB0, 0x07),
PANEL_DCS(0xB1, 0x00),
PANEL_DCS(0xB2, 0x02),
PANEL_DCS(0xB3, 0x0F),
PANEL_DCS(0xB4, 0x25),
PANEL_DCS(0xB5, 0x39),
PANEL_DCS(0xB6, 0x4E),
PANEL_DCS(0xB7, 0x72),
PANEL_DCS(0xB8, 0x97),
PANEL_DCS(0xB9, 0xDC),
PANEL_DCS(0xBA, 0x22),
PANEL_DCS(0xBB, 0xA4),
PANEL_DCS(0xBC, 0x2B),
PANEL_DCS(0xBD, 0x2F),
PANEL_DCS(0xBE, 0xA9),
PANEL_DCS(0xBF, 0x25),
PANEL_DCS(0xC0, 0x61),
PANEL_DCS(0xC1, 0x97),
PANEL_DCS(0xC2, 0xB2),
PANEL_DCS(0xC3, 0xCD),
PANEL_DCS(0xC4, 0xD9),
PANEL_DCS(0xC5, 0xE7),
PANEL_DCS(0xC6, 0xF4),
PANEL_DCS(0xC7, 0xFA),
PANEL_DCS(0xC8, 0xFC),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x08),
PANEL_DCS(0xB1, 0x04),
PANEL_DCS(0xB2, 0x05),
PANEL_DCS(0xB3, 0x11),
PANEL_DCS(0xB4, 0x24),
PANEL_DCS(0xB5, 0x39),
PANEL_DCS(0xB6, 0x4F),
PANEL_DCS(0xB7, 0x72),
PANEL_DCS(0xB8, 0x98),
PANEL_DCS(0xB9, 0xDC),
PANEL_DCS(0xBA, 0x23),
PANEL_DCS(0xBB, 0xA6),
PANEL_DCS(0xBC, 0x2C),
PANEL_DCS(0xBD, 0x30),
PANEL_DCS(0xBE, 0xAA),
PANEL_DCS(0xBF, 0x26),
PANEL_DCS(0xC0, 0x62),
PANEL_DCS(0xC1, 0x9B),
PANEL_DCS(0xC2, 0xB5),
PANEL_DCS(0xC3, 0xCF),
PANEL_DCS(0xC4, 0xDB),
PANEL_DCS(0xC5, 0xE8),
PANEL_DCS(0xC6, 0xF5),
PANEL_DCS(0xC7, 0xFA),
PANEL_DCS(0xC8, 0xFC),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x09),
PANEL_DCS(0xB1, 0x04),
PANEL_DCS(0xB2, 0x02),
PANEL_DCS(0xB3, 0x16),
PANEL_DCS(0xB4, 0x24),
PANEL_DCS(0xB5, 0x3B),
PANEL_DCS(0xB6, 0x4F),
PANEL_DCS(0xB7, 0x73),
PANEL_DCS(0xB8, 0x99),
PANEL_DCS(0xB9, 0xE0),
PANEL_DCS(0xBA, 0x26),
PANEL_DCS(0xBB, 0xAD),
PANEL_DCS(0xBC, 0x36),
PANEL_DCS(0xBD, 0x3A),
PANEL_DCS(0xBE, 0xAE),
PANEL_DCS(0xBF, 0x2A),
PANEL_DCS(0xC0, 0x66),
PANEL_DCS(0xC1, 0x9E),
PANEL_DCS(0xC2, 0xB8),
PANEL_DCS(0xC3, 0xD1),
PANEL_DCS(0xC4, 0xDD),
PANEL_DCS(0xC5, 0xE9),
PANEL_DCS(0xC6, 0xF6),
PANEL_DCS(0xC7, 0xFA),
PANEL_DCS(0xC8, 0xFC),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x0A),
PANEL_DCS(0xB1, 0x00),
PANEL_DCS(0xB2, 0x02),
PANEL_DCS(0xB3, 0x0F),
PANEL_DCS(0xB4, 0x25),
PANEL_DCS(0xB5, 0x39),
PANEL_DCS(0xB6, 0x4E),
PANEL_DCS(0xB7, 0x72),
PANEL_DCS(0xB8, 0x97),
PANEL_DCS(0xB9, 0xDC),
PANEL_DCS(0xBA, 0x22),
PANEL_DCS(0xBB, 0xA4),
PANEL_DCS(0xBC, 0x2B),
PANEL_DCS(0xBD, 0x2F),
PANEL_DCS(0xBE, 0xA9),
PANEL_DCS(0xBF, 0x25),
PANEL_DCS(0xC0, 0x61),
PANEL_DCS(0xC1, 0x97),
PANEL_DCS(0xC2, 0xB2),
PANEL_DCS(0xC3, 0xCD),
PANEL_DCS(0xC4, 0xD9),
PANEL_DCS(0xC5, 0xE7),
PANEL_DCS(0xC6, 0xF4),
PANEL_DCS(0xC7, 0xFA),
PANEL_DCS(0xC8, 0xFC),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x0B),
PANEL_DCS(0xB1, 0x04),
PANEL_DCS(0xB2, 0x05),
PANEL_DCS(0xB3, 0x11),
PANEL_DCS(0xB4, 0x24),
PANEL_DCS(0xB5, 0x39),
PANEL_DCS(0xB6, 0x4F),
PANEL_DCS(0xB7, 0x72),
PANEL_DCS(0xB8, 0x98),
PANEL_DCS(0xB9, 0xDC),
PANEL_DCS(0xBA, 0x23),
PANEL_DCS(0xBB, 0xA6),
PANEL_DCS(0xBC, 0x2C),
PANEL_DCS(0xBD, 0x30),
PANEL_DCS(0xBE, 0xAA),
PANEL_DCS(0xBF, 0x26),
PANEL_DCS(0xC0, 0x62),
PANEL_DCS(0xC1, 0x9B),
PANEL_DCS(0xC2, 0xB5),
PANEL_DCS(0xC3, 0xCF),
PANEL_DCS(0xC4, 0xDB),
PANEL_DCS(0xC5, 0xE8),
PANEL_DCS(0xC6, 0xF5),
PANEL_DCS(0xC7, 0xFA),
PANEL_DCS(0xC8, 0xFC),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x0C),
PANEL_DCS(0xB1, 0x04),
PANEL_DCS(0xB2, 0x02),
PANEL_DCS(0xB3, 0x16),
PANEL_DCS(0xB4, 0x24),
PANEL_DCS(0xB5, 0x3B),
PANEL_DCS(0xB6, 0x4F),
PANEL_DCS(0xB7, 0x73),
PANEL_DCS(0xB8, 0x99),
PANEL_DCS(0xB9, 0xE0),
PANEL_DCS(0xBA, 0x26),
PANEL_DCS(0xBB, 0xAD),
PANEL_DCS(0xBC, 0x36),
PANEL_DCS(0xBD, 0x3A),
PANEL_DCS(0xBE, 0xAE),
PANEL_DCS(0xBF, 0x2A),
PANEL_DCS(0xC0, 0x66),
PANEL_DCS(0xC1, 0x9E),
PANEL_DCS(0xC2, 0xB8),
PANEL_DCS(0xC3, 0xD1),
PANEL_DCS(0xC4, 0xDD),
PANEL_DCS(0xC5, 0xE9),
PANEL_DCS(0xC6, 0xF6),
PANEL_DCS(0xC7, 0xFA),
PANEL_DCS(0xC8, 0xFC),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x00),
PANEL_DCS(0xB3, 0x08),
PANEL_DCS(0xB0, 0x04),
PANEL_DCS(0xB8, 0x68),
PANEL_DELAY(150),
PANEL_END,
},
};
320 changes: 320 additions & 0 deletions src/drivers/mipi/panel-BOE_TV105WUM_NW0.c
View file
@@ -0,0 +1,320 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#include <mipi/panel.h>

struct panel_serializable_data BOE_TV105WUM_NW0 = {
.edid = {
.ascii_string = "TV105WUM-NW0",
.manufacturer_name = "BOE",
.panel_bits_per_color = 8,
.panel_bits_per_pixel = 24,
.mode = {
.pixel_clock = 159916,
.lvds_dual_channel = 0,
.refresh = 60,
.ha = 1200, .hbl = 164, .hso = 80, .hspw = 24,
.va = 1920, .vbl = 34, .vso = 20, .vspw = 4,
.phsync = '-', .pvsync = '-',
.x_mm = 147, .y_mm = 236,
},
},
.init = {
PANEL_DCS(0x10),
PANEL_DELAY(34),
PANEL_DCS(0xB0, 0x05),
PANEL_DCS(0xB1, 0xE5),
PANEL_DCS(0xB3, 0x52),
PANEL_DCS(0xB0, 0x00),
PANEL_DCS(0xB3, 0x88),
PANEL_DCS(0xB0, 0x04),
PANEL_DCS(0xB8, 0x00),
PANEL_DCS(0xB0, 0x00),
PANEL_DCS(0xB6, 0x03),
PANEL_DCS(0xBA, 0x87),
PANEL_DCS(0xBF, 0x1F),
PANEL_DCS(0xC0, 0x0F),
PANEL_DCS(0xC2, 0x0E),
PANEL_DCS(0xC3, 0x02),
PANEL_DCS(0xC4, 0x0A),
PANEL_DCS(0xC5, 0x02),
PANEL_DCS(0xB0, 0x01),
PANEL_DCS(0xE0, 0x26),
PANEL_DCS(0xE1, 0x26),
PANEL_DCS(0xDC, 0x00),
PANEL_DCS(0xDD, 0x00),
PANEL_DCS(0xCC, 0x26),
PANEL_DCS(0xCD, 0x26),
PANEL_DCS(0xC8, 0x00),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xD2, 0x03),
PANEL_DCS(0xD3, 0x03),
PANEL_DCS(0xE6, 0x04),
PANEL_DCS(0xE7, 0x04),
PANEL_DCS(0xC4, 0x09),
PANEL_DCS(0xC5, 0x09),
PANEL_DCS(0xD8, 0x0A),
PANEL_DCS(0xD9, 0x0A),
PANEL_DCS(0xC2, 0x0B),
PANEL_DCS(0xC3, 0x0B),
PANEL_DCS(0xD6, 0x0C),
PANEL_DCS(0xD7, 0x0C),
PANEL_DCS(0xC0, 0x05),
PANEL_DCS(0xC1, 0x05),
PANEL_DCS(0xD4, 0x06),
PANEL_DCS(0xD5, 0x06),
PANEL_DCS(0xCA, 0x07),
PANEL_DCS(0xCB, 0x07),
PANEL_DCS(0xDE, 0x08),
PANEL_DCS(0xDF, 0x08),
PANEL_DCS(0xB0, 0x02),
PANEL_DCS(0xC0, 0x00),
PANEL_DCS(0xC1, 0x0F),
PANEL_DCS(0xC2, 0x1A),
PANEL_DCS(0xC3, 0x2B),
PANEL_DCS(0xC4, 0x38),
PANEL_DCS(0xC5, 0x39),
PANEL_DCS(0xC6, 0x38),
PANEL_DCS(0xC7, 0x38),
PANEL_DCS(0xC8, 0x36),
PANEL_DCS(0xC9, 0x34),
PANEL_DCS(0xCA, 0x35),
PANEL_DCS(0xCB, 0x36),
PANEL_DCS(0xCC, 0x39),
PANEL_DCS(0xCD, 0x2D),
PANEL_DCS(0xCE, 0x2E),
PANEL_DCS(0xCF, 0x2F),
PANEL_DCS(0xD0, 0x07),
PANEL_DCS(0xD2, 0x00),
PANEL_DCS(0xD3, 0x0F),
PANEL_DCS(0xD4, 0x1A),
PANEL_DCS(0xD5, 0x2B),
PANEL_DCS(0xD6, 0x38),
PANEL_DCS(0xD7, 0x39),
PANEL_DCS(0xD8, 0x38),
PANEL_DCS(0xD9, 0x38),
PANEL_DCS(0xDA, 0x36),
PANEL_DCS(0xDB, 0x34),
PANEL_DCS(0xDC, 0x35),
PANEL_DCS(0xDD, 0x36),
PANEL_DCS(0xDE, 0x39),
PANEL_DCS(0xDF, 0x2D),
PANEL_DCS(0xE0, 0x2E),
PANEL_DCS(0xE1, 0x2F),
PANEL_DCS(0xE2, 0x07),
PANEL_DCS(0xB0, 0x03),
PANEL_DCS(0xC8, 0x0B),
PANEL_DCS(0xC9, 0x07),
PANEL_DCS(0xC3, 0x00),
PANEL_DCS(0xE7, 0x00),
PANEL_DCS(0xC5, 0x2A),
PANEL_DCS(0xDE, 0x2A),
PANEL_DCS(0xCA, 0x43),
PANEL_DCS(0xC9, 0x07),
PANEL_DCS(0xE4, 0xC0),
PANEL_DCS(0xE5, 0x0D),
PANEL_DCS(0xCB, 0x00),
PANEL_DCS(0xB0, 0x06),
PANEL_DCS(0xB8, 0xA5),
PANEL_DCS(0xC0, 0xA5),
PANEL_DCS(0xC7, 0x0F),
PANEL_DCS(0xD5, 0x32),
PANEL_DCS(0xBC, 0x33),
PANEL_DCS(0xB0, 0x07),
PANEL_DCS(0xB1, 0x00),
PANEL_DCS(0xB2, 0x04),
PANEL_DCS(0xB3, 0x0A),
PANEL_DCS(0xB4, 0x1A),
PANEL_DCS(0xB5, 0x29),
PANEL_DCS(0xB6, 0x38),
PANEL_DCS(0xB7, 0x5A),
PANEL_DCS(0xB8, 0x79),
PANEL_DCS(0xB9, 0xBF),
PANEL_DCS(0xBA, 0x05),
PANEL_DCS(0xBB, 0x88),
PANEL_DCS(0xBC, 0x14),
PANEL_DCS(0xBD, 0x18),
PANEL_DCS(0xBE, 0x97),
PANEL_DCS(0xBF, 0x11),
PANEL_DCS(0xC0, 0x4B),
PANEL_DCS(0xC1, 0x82),
PANEL_DCS(0xC2, 0x9B),
PANEL_DCS(0xC3, 0xB6),
PANEL_DCS(0xC4, 0xC3),
PANEL_DCS(0xC5, 0xD0),
PANEL_DCS(0xC6, 0xDB),
PANEL_DCS(0xC7, 0xE1),
PANEL_DCS(0xC8, 0xE4),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x08),
PANEL_DCS(0xB1, 0x00),
PANEL_DCS(0xB2, 0x03),
PANEL_DCS(0xB3, 0x0A),
PANEL_DCS(0xB4, 0x1A),
PANEL_DCS(0xB5, 0x29),
PANEL_DCS(0xB6, 0x38),
PANEL_DCS(0xB7, 0x5A),
PANEL_DCS(0xB8, 0x7A),
PANEL_DCS(0xB9, 0xC1),
PANEL_DCS(0xBA, 0x07),
PANEL_DCS(0xBB, 0x8B),
PANEL_DCS(0xBC, 0x17),
PANEL_DCS(0xBD, 0x1B),
PANEL_DCS(0xBE, 0x99),
PANEL_DCS(0xBF, 0x13),
PANEL_DCS(0xC0, 0x4C),
PANEL_DCS(0xC1, 0x84),
PANEL_DCS(0xC2, 0x9D),
PANEL_DCS(0xC3, 0xB7),
PANEL_DCS(0xC4, 0xC4),
PANEL_DCS(0xC5, 0xD0),
PANEL_DCS(0xC6, 0xDB),
PANEL_DCS(0xC7, 0xE1),
PANEL_DCS(0xC8, 0xE4),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x09),
PANEL_DCS(0xB1, 0x04),
PANEL_DCS(0xB2, 0x04),
PANEL_DCS(0xB3, 0x09),
PANEL_DCS(0xB4, 0x1A),
PANEL_DCS(0xB5, 0x2B),
PANEL_DCS(0xB6, 0x3A),
PANEL_DCS(0xB7, 0x5D),
PANEL_DCS(0xB8, 0x80),
PANEL_DCS(0xB9, 0xCA),
PANEL_DCS(0xBA, 0x13),
PANEL_DCS(0xBB, 0x9D),
PANEL_DCS(0xBC, 0x30),
PANEL_DCS(0xBD, 0x34),
PANEL_DCS(0xBE, 0xBB),
PANEL_DCS(0xBF, 0x30),
PANEL_DCS(0xC0, 0x6A),
PANEL_DCS(0xC1, 0xA1),
PANEL_DCS(0xC2, 0xBC),
PANEL_DCS(0xC3, 0xD4),
PANEL_DCS(0xC4, 0xE0),
PANEL_DCS(0xC5, 0xEB),
PANEL_DCS(0xC6, 0xF6),
PANEL_DCS(0xC7, 0xFA),
PANEL_DCS(0xC8, 0xFC),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x0A),
PANEL_DCS(0xB1, 0x00),
PANEL_DCS(0xB2, 0x04),
PANEL_DCS(0xB3, 0x0A),
PANEL_DCS(0xB4, 0x1A),
PANEL_DCS(0xB5, 0x29),
PANEL_DCS(0xB6, 0x38),
PANEL_DCS(0xB7, 0x5A),
PANEL_DCS(0xB8, 0x79),
PANEL_DCS(0xB9, 0xBF),
PANEL_DCS(0xBA, 0x05),
PANEL_DCS(0xBB, 0x88),
PANEL_DCS(0xBC, 0x14),
PANEL_DCS(0xBD, 0x18),
PANEL_DCS(0xBE, 0x97),
PANEL_DCS(0xBF, 0x11),
PANEL_DCS(0xC0, 0x4B),
PANEL_DCS(0xC1, 0x82),
PANEL_DCS(0xC2, 0x9B),
PANEL_DCS(0xC3, 0xB6),
PANEL_DCS(0xC4, 0xC3),
PANEL_DCS(0xC5, 0xD0),
PANEL_DCS(0xC6, 0xDB),
PANEL_DCS(0xC7, 0xE1),
PANEL_DCS(0xC8, 0xE4),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x0B),
PANEL_DCS(0xB1, 0x00),
PANEL_DCS(0xB2, 0x03),
PANEL_DCS(0xB3, 0x0A),
PANEL_DCS(0xB4, 0x1A),
PANEL_DCS(0xB5, 0x29),
PANEL_DCS(0xB6, 0x38),
PANEL_DCS(0xB7, 0x5A),
PANEL_DCS(0xB8, 0x7A),
PANEL_DCS(0xB9, 0xC1),
PANEL_DCS(0xBA, 0x07),
PANEL_DCS(0xBB, 0x8B),
PANEL_DCS(0xBC, 0x17),
PANEL_DCS(0xBD, 0x1B),
PANEL_DCS(0xBE, 0x99),
PANEL_DCS(0xBF, 0x13),
PANEL_DCS(0xC0, 0x4C),
PANEL_DCS(0xC1, 0x84),
PANEL_DCS(0xC2, 0x9D),
PANEL_DCS(0xC3, 0xB7),
PANEL_DCS(0xC4, 0xC4),
PANEL_DCS(0xC5, 0xD0),
PANEL_DCS(0xC6, 0xDB),
PANEL_DCS(0xC7, 0xE1),
PANEL_DCS(0xC8, 0xE4),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DCS(0xB0, 0x0C),
PANEL_DCS(0xB1, 0x04),
PANEL_DCS(0xB2, 0x04),
PANEL_DCS(0xB3, 0x09),
PANEL_DCS(0xB4, 0x1A),
PANEL_DCS(0xB5, 0x2B),
PANEL_DCS(0xB6, 0x3A),
PANEL_DCS(0xB7, 0x5D),
PANEL_DCS(0xB8, 0x80),
PANEL_DCS(0xB9, 0xCA),
PANEL_DCS(0xBA, 0x13),
PANEL_DCS(0xBB, 0x9D),
PANEL_DCS(0xBC, 0x30),
PANEL_DCS(0xBD, 0x34),
PANEL_DCS(0xBE, 0xBB),
PANEL_DCS(0xBF, 0x30),
PANEL_DCS(0xC0, 0x6A),
PANEL_DCS(0xC1, 0xA1),
PANEL_DCS(0xC2, 0xBC),
PANEL_DCS(0xC3, 0xD4),
PANEL_DCS(0xC4, 0xE0),
PANEL_DCS(0xC5, 0xEB),
PANEL_DCS(0xC6, 0xF6),
PANEL_DCS(0xC7, 0xFA),
PANEL_DCS(0xC8, 0xFC),
PANEL_DCS(0xC9, 0x00),
PANEL_DCS(0xCA, 0x00),
PANEL_DCS(0xCB, 0x16),
PANEL_DCS(0xCC, 0xAF),
PANEL_DCS(0xCD, 0xFF),
PANEL_DCS(0xCE, 0xFF),
PANEL_DELAY(100),
PANEL_DCS(0xB0, 0x00),
PANEL_DCS(0xB3, 0x08),
PANEL_DCS(0xB0, 0x04),
PANEL_DCS(0xB8, 0x68),
PANEL_DELAY(10),
PANEL_DCS(0x11),
PANEL_DELAY(100),
PANEL_DCS(0x29),
PANEL_DELAY(50),
PANEL_END,
},
};
71 changes: 71 additions & 0 deletions src/drivers/mipi/panel-CMN_P097PFG_SSD2858.c
View file
@@ -0,0 +1,71 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#include <mipi/panel.h>

struct panel_serializable_data P097PFG_SSD2858 = {
.edid = {
.ascii_string = "P097PFG",
.manufacturer_name = "CMN",
.panel_bits_per_color = 8,
.panel_bits_per_pixel = 24,
.mode = {
.pixel_clock = 211660,
.lvds_dual_channel = 0,
.refresh = 60,
.ha = 1536, .hbl = 160, .hso = 140, .hspw = 10,
.va = 2048, .vbl = 32, .vso = 20, .vspw = 2,
.phsync = '-', .pvsync = '-',
.x_mm = 147, .y_mm = 196,
},
},
.init = {
PANEL_GENERIC(0xff, 0x00),
/* LOCKCNT=0x1f4, MRX=0, POSTDIV=1 (/2} }, MULT=0x49
* 27 Mhz => 985.5 Mhz */
PANEL_GENERIC(0x00, 0x08, 0x01, 0xf4, 0x01, 0x49),
/* MTXDIV=1, SYSDIV=3 (=> 4) */
PANEL_GENERIC(0x00, 0x0c, 0x00, 0x00, 0x00, 0x03),
/* MTXVPF=24bpp, MRXLS=4 lanes, MRXVB=bypass, MRXECC=1,
* MRXEOT=1, MRXEE=1 */
PANEL_GENERIC(0x00, 0x14, 0x0c, 0x3d, 0x80, 0x0f),
PANEL_GENERIC(0x00, 0x20, 0x15, 0x92, 0x56, 0x7d),
PANEL_GENERIC(0x00, 0x24, 0x00, 0x00, 0x30, 0x00),

PANEL_GENERIC(0x10, 0x08, 0x01, 0x20, 0x08, 0x45),
PANEL_GENERIC(0x10, 0x1c, 0x00, 0x00, 0x00, 0x00),
PANEL_GENERIC(0x20, 0x0c, 0x00, 0x00, 0x00, 0x04),
/* Pixel clock 985.5 Mhz * 0x49/0x4b = 959 Mhz */
PANEL_GENERIC(0x20, 0x10, 0x00, 0x4b, 0x00, 0x49),
PANEL_GENERIC(0x20, 0xa0, 0x00, 0x00, 0x00, 0x00),
/* EOT=1, LPE = 0, LSOUT=4 lanes, LPD=25 */
PANEL_GENERIC(0x60, 0x08, 0x00, 0xd9, 0x00, 0x08),
PANEL_GENERIC(0x60, 0x14, 0x01, 0x00, 0x01, 0x06),
/* DSI0 enable (default: probably not needed) */
PANEL_GENERIC(0x60, 0x80, 0x00, 0x00, 0x00, 0x0f),
/* DSI1 enable */
PANEL_GENERIC(0x60, 0xa0, 0x00, 0x00, 0x00, 0x0f),

/* HSA=0x18, VSA=0x02, HBP=0x50, VBP=0x0c */
PANEL_GENERIC(0x60, 0x0c, 0x0c, 0x50, 0x02, 0x18),
/* VACT= 0x800 (2048} }, VFP= 0x14, HFP=0x50 */
PANEL_GENERIC(0x60, 0x10, 0x08, 0x00, 0x14, 0x50),
/* HACT=0x300 (768) */
PANEL_GENERIC(0x60, 0x84, 0x00, 0x00, 0x03, 0x00),
PANEL_GENERIC(0x60, 0xa4, 0x00, 0x00, 0x03, 0x00),

/* Take panel out of sleep. */
PANEL_GENERIC(0xff, 0x01),
PANEL_DCS(0x11),
PANEL_DELAY(120),
PANEL_DCS(0x29),
PANEL_DELAY(20),
PANEL_GENERIC(0xff, 0x00),

PANEL_DELAY(120),
PANEL_DCS(0x11),
PANEL_DELAY(120),
PANEL_DCS(0x29),
PANEL_DELAY(20),
PANEL_END,
},
};
281 changes: 281 additions & 0 deletions src/drivers/mipi/panel-INX_OTA7290D10P.c
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@@ -0,0 +1,281 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#include <mipi/panel.h>

struct panel_serializable_data INX_OTA7290D10P = {
.edid = {
.ascii_string = "OTA7290D10P",
.manufacturer_name = "INX",
.panel_bits_per_color = 8,
.panel_bits_per_pixel = 24,
.mode = {
.pixel_clock = 159420,
.lvds_dual_channel = 0,
.refresh = 60,
.ha = 1200, .hbl = 141, .hso = 80, .hspw = 1,
.va = 1920, .vbl = 61, .vso = 35, .vspw = 1,
.phsync = '-', .pvsync = '-',
.x_mm = 135, .y_mm = 216,
},
},
.init = {
PANEL_DCS(0xB0, 0x5A),
PANEL_DCS(0xB1, 0x00),
PANEL_DCS(0x89, 0x01),
PANEL_DCS(0x91, 0x17),
PANEL_DCS(0xB1, 0x03),
PANEL_DCS(0x2C, 0x28),
PANEL_DCS(0x00, 0xF1),
PANEL_DCS(0x01, 0x78),
PANEL_DCS(0x02, 0x3C),
PANEL_DCS(0x03, 0x1E),
PANEL_DCS(0x04, 0x8F),
PANEL_DCS(0x05, 0x01),
PANEL_DCS(0x06, 0x00),
PANEL_DCS(0x07, 0x00),
PANEL_DCS(0x08, 0x00),
PANEL_DCS(0x09, 0x00),
PANEL_DCS(0x0A, 0x01),
PANEL_DCS(0x0B, 0x3C),
PANEL_DCS(0x0C, 0x00),
PANEL_DCS(0x0D, 0x00),
PANEL_DCS(0x0E, 0x24),
PANEL_DCS(0x0F, 0x1C),
PANEL_DCS(0x10, 0xC8),
PANEL_DCS(0x11, 0x60),
PANEL_DCS(0x12, 0x70),
PANEL_DCS(0x13, 0x01),
PANEL_DCS(0x14, 0xE3),
PANEL_DCS(0x15, 0xFF),
PANEL_DCS(0x16, 0x3D),
PANEL_DCS(0x17, 0x0E),
PANEL_DCS(0x18, 0x01),
PANEL_DCS(0x19, 0x00),
PANEL_DCS(0x1A, 0x00),
PANEL_DCS(0x1B, 0xFC),
PANEL_DCS(0x1C, 0x0B),
PANEL_DCS(0x1D, 0xA0),
PANEL_DCS(0x1E, 0x03),
PANEL_DCS(0x1F, 0x04),
PANEL_DCS(0x20, 0x0C),
PANEL_DCS(0x21, 0x00),
PANEL_DCS(0x22, 0x04),
PANEL_DCS(0x23, 0x81),
PANEL_DCS(0x24, 0x1F),
PANEL_DCS(0x25, 0x10),
PANEL_DCS(0x26, 0x9B),
PANEL_DCS(0x2D, 0x01),
PANEL_DCS(0x2E, 0x84),
PANEL_DCS(0x2F, 0x00),
PANEL_DCS(0x30, 0x02),
PANEL_DCS(0x31, 0x08),
PANEL_DCS(0x32, 0x01),
PANEL_DCS(0x33, 0x1C),
PANEL_DCS(0x34, 0x70),
PANEL_DCS(0x35, 0xFF),
PANEL_DCS(0x36, 0xFF),
PANEL_DCS(0x37, 0xFF),
PANEL_DCS(0x38, 0xFF),
PANEL_DCS(0x39, 0xFF),
PANEL_DCS(0x3A, 0x05),
PANEL_DCS(0x3B, 0x00),
PANEL_DCS(0x3C, 0x00),
PANEL_DCS(0x3D, 0x00),
PANEL_DCS(0x3E, 0x0F),
PANEL_DCS(0x3F, 0xA4),
PANEL_DCS(0x40, 0x28),
PANEL_DCS(0x41, 0xFC),
PANEL_DCS(0x42, 0x01),
PANEL_DCS(0x43, 0x08),
PANEL_DCS(0x44, 0x05),
PANEL_DCS(0x45, 0xF0),
PANEL_DCS(0x46, 0x01),
PANEL_DCS(0x47, 0x02),
PANEL_DCS(0x48, 0x00),
PANEL_DCS(0x49, 0x58),
PANEL_DCS(0x4A, 0x00),
PANEL_DCS(0x4B, 0x05),
PANEL_DCS(0x4C, 0x03),
PANEL_DCS(0x4D, 0xD0),
PANEL_DCS(0x4E, 0x13),
PANEL_DCS(0x4F, 0xFF),
PANEL_DCS(0x50, 0x0A),
PANEL_DCS(0x51, 0x53),
PANEL_DCS(0x52, 0x26),
PANEL_DCS(0x53, 0x22),
PANEL_DCS(0x54, 0x09),
PANEL_DCS(0x55, 0x22),
PANEL_DCS(0x56, 0x00),
PANEL_DCS(0x57, 0x1C),
PANEL_DCS(0x58, 0x03),
PANEL_DCS(0x59, 0x3F),
PANEL_DCS(0x5A, 0x28),
PANEL_DCS(0x5B, 0x01),
PANEL_DCS(0x5C, 0xCC),
PANEL_DCS(0x5D, 0x21),
PANEL_DCS(0x5E, 0x04),
PANEL_DCS(0x5F, 0x13),
PANEL_DCS(0x60, 0x42),
PANEL_DCS(0x61, 0x08),
PANEL_DCS(0x62, 0x64),
PANEL_DCS(0x63, 0xEB),
PANEL_DCS(0x64, 0x10),
PANEL_DCS(0x65, 0xA8),
PANEL_DCS(0x66, 0x84),
PANEL_DCS(0x67, 0x8E),
PANEL_DCS(0x68, 0x29),
PANEL_DCS(0x69, 0x11),
PANEL_DCS(0x6A, 0x42),
PANEL_DCS(0x6B, 0x38),
PANEL_DCS(0x6C, 0x21),
PANEL_DCS(0x6D, 0x84),
PANEL_DCS(0x6E, 0x50),
PANEL_DCS(0x6F, 0xB6),
PANEL_DCS(0x70, 0x0E),
PANEL_DCS(0x71, 0xA1),
PANEL_DCS(0x72, 0xCE),
PANEL_DCS(0x73, 0xF8),
PANEL_DCS(0x74, 0xDA),
PANEL_DCS(0x75, 0x1A),
PANEL_DCS(0x76, 0x00),
PANEL_DCS(0x77, 0x00),
PANEL_DCS(0x78, 0x5F),
PANEL_DCS(0x79, 0xE0),
PANEL_DCS(0x7A, 0x01),
PANEL_DCS(0x7B, 0xFF),
PANEL_DCS(0x7C, 0xFF),
PANEL_DCS(0x7D, 0xFF),
PANEL_DCS(0x7E, 0xFF),
PANEL_DCS(0x7F, 0xFE),
PANEL_DCS(0xB1, 0x02),
PANEL_DCS(0x00, 0xFF),
PANEL_DCS(0x01, 0x01),
PANEL_DCS(0x02, 0x00),
PANEL_DCS(0x03, 0x00),
PANEL_DCS(0x04, 0x00),
PANEL_DCS(0x05, 0x00),
PANEL_DCS(0x06, 0x00),
PANEL_DCS(0x07, 0x00),
PANEL_DCS(0x08, 0xC0),
PANEL_DCS(0x09, 0x00),
PANEL_DCS(0x0A, 0x00),
PANEL_DCS(0x0B, 0x04),
PANEL_DCS(0x0C, 0xE6),
PANEL_DCS(0x0D, 0x0D),
PANEL_DCS(0x0F, 0x08),
PANEL_DCS(0x10, 0xE5),
PANEL_DCS(0x11, 0xA8),
PANEL_DCS(0x12, 0xEC),
PANEL_DCS(0x13, 0x54),
PANEL_DCS(0x14, 0x5A),
PANEL_DCS(0x15, 0xD5),
PANEL_DCS(0x16, 0x23),
PANEL_DCS(0x17, 0x11),
PANEL_DCS(0x18, 0x2F),
PANEL_DCS(0x19, 0x93),
PANEL_DCS(0x1A, 0xA6),
PANEL_DCS(0x1B, 0x0F),
PANEL_DCS(0x1C, 0xFF),
PANEL_DCS(0x1D, 0xFF),
PANEL_DCS(0x1E, 0xFF),
PANEL_DCS(0x1F, 0xFF),
PANEL_DCS(0x20, 0xFF),
PANEL_DCS(0x21, 0xFF),
PANEL_DCS(0x22, 0xFF),
PANEL_DCS(0x23, 0xFF),
PANEL_DCS(0x24, 0xFF),
PANEL_DCS(0x25, 0xFF),
PANEL_DCS(0x26, 0xFF),
PANEL_DCS(0x27, 0x1F),
PANEL_DCS(0x28, 0xC8),
PANEL_DCS(0x29, 0xFF),
PANEL_DCS(0x2A, 0xFF),
PANEL_DCS(0x2B, 0xFF),
PANEL_DCS(0x2C, 0x07),
PANEL_DCS(0x2D, 0x03),
PANEL_DCS(0x33, 0x09),
PANEL_DCS(0x35, 0x7F),
PANEL_DCS(0x36, 0x0C),
PANEL_DCS(0x38, 0x7F),
PANEL_DCS(0x3A, 0x80),
PANEL_DCS(0x3B, 0x55),
PANEL_DCS(0x3C, 0xE2),
PANEL_DCS(0x3D, 0x32),
PANEL_DCS(0x3E, 0x00),
PANEL_DCS(0x3F, 0x58),
PANEL_DCS(0x40, 0x06),
PANEL_DCS(0x41, 0x80),
PANEL_DCS(0x42, 0xCB),
PANEL_DCS(0x43, 0x2C),
PANEL_DCS(0x44, 0x61),
PANEL_DCS(0x45, 0x39),
PANEL_DCS(0x46, 0x00),
PANEL_DCS(0x47, 0x00),
PANEL_DCS(0x48, 0x8B),
PANEL_DCS(0x49, 0xD2),
PANEL_DCS(0x4A, 0x01),
PANEL_DCS(0x4B, 0x00),
PANEL_DCS(0x4C, 0x10),
PANEL_DCS(0x4D, 0xC0),
PANEL_DCS(0x4E, 0x0F),
PANEL_DCS(0x4F, 0xF1),
PANEL_DCS(0x50, 0x78),
PANEL_DCS(0x51, 0x7A),
PANEL_DCS(0x52, 0x34),
PANEL_DCS(0x53, 0x99),
PANEL_DCS(0x54, 0xA2),
PANEL_DCS(0x55, 0x03),
PANEL_DCS(0x56, 0x6C),
PANEL_DCS(0x57, 0x1A),
PANEL_DCS(0x58, 0x05),
PANEL_DCS(0x59, 0x30),
PANEL_DCS(0x5A, 0x1E),
PANEL_DCS(0x5B, 0x8F),
PANEL_DCS(0x5C, 0xC7),
PANEL_DCS(0x5D, 0xE3),
PANEL_DCS(0x5E, 0xF1),
PANEL_DCS(0x5F, 0x78),
PANEL_DCS(0x60, 0x3C),
PANEL_DCS(0x61, 0x36),
PANEL_DCS(0x62, 0x1E),
PANEL_DCS(0x63, 0x1B),
PANEL_DCS(0x64, 0x8F),
PANEL_DCS(0x65, 0xC7),
PANEL_DCS(0x66, 0xE3),
PANEL_DCS(0x67, 0x31),
PANEL_DCS(0x68, 0x14),
PANEL_DCS(0x69, 0x89),
PANEL_DCS(0x6A, 0x70),
PANEL_DCS(0x6B, 0x8C),
PANEL_DCS(0x6C, 0x8D),
PANEL_DCS(0x6D, 0x8D),
PANEL_DCS(0x6E, 0x8D),
PANEL_DCS(0x6F, 0x8D),
PANEL_DCS(0x70, 0xC7),
PANEL_DCS(0x71, 0xE3),
PANEL_DCS(0x72, 0xF1),
PANEL_DCS(0x73, 0xD8),
PANEL_DCS(0x74, 0xD8),
PANEL_DCS(0x75, 0xD8),
PANEL_DCS(0x76, 0x18),
PANEL_DCS(0x77, 0x00),
PANEL_DCS(0x78, 0x00),
PANEL_DCS(0x79, 0x00),
PANEL_DCS(0x7A, 0xC6),
PANEL_DCS(0x7B, 0xC6),
PANEL_DCS(0x7C, 0xC6),
PANEL_DCS(0x7D, 0xC6),
PANEL_DCS(0x7E, 0xC6),
PANEL_DCS(0x7F, 0xE3),
PANEL_DCS(0x0B, 0x04),
PANEL_DCS(0xB1, 0x03),
PANEL_DCS(0x2C, 0x2C),
PANEL_DCS(0xB1, 0x00),
PANEL_DCS(0x89, 0x03),
PANEL_DCS(0x11),
PANEL_DELAY(0x78),
PANEL_DCS(0x29),
PANEL_DELAY(0x14),
PANEL_END,
},
};
117 changes: 117 additions & 0 deletions src/drivers/mipi/panel-STA_2081101QFH032011_53G.c
View file
@@ -0,0 +1,117 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#include <mipi/panel.h>

struct panel_serializable_data STA_QFH032011_53G = {
.edid = {
.ascii_string = "QFH032011-53G",
.manufacturer_name = "STA",
.panel_bits_per_color = 8,
.panel_bits_per_pixel = 24,
.mode = {
.pixel_clock = 165731,
.lvds_dual_channel = 0,
.refresh = 60,
.ha = 1200, .hbl = 210, .hso = 100, .hspw = 10,
.va = 1920, .vbl = 39, .vso = 14, .vspw = 10,
.phsync = '-', .pvsync = '-',
.x_mm = 135, .y_mm = 217,
},
},
.init = {
PANEL_DCS(0xB0, 0x01),
PANEL_DCS(0xC3, 0x4F),
PANEL_DCS(0xC4, 0x40),
PANEL_DCS(0xC5, 0x40),
PANEL_DCS(0xC6, 0x40),
PANEL_DCS(0xC7, 0x40),
PANEL_DCS(0xC8, 0x4D),
PANEL_DCS(0xC9, 0x52),
PANEL_DCS(0xCA, 0x51),
PANEL_DCS(0xCD, 0x5D),
PANEL_DCS(0xCE, 0x5B),
PANEL_DCS(0xCF, 0x4B),
PANEL_DCS(0xD0, 0x49),
PANEL_DCS(0xD1, 0x47),
PANEL_DCS(0xD2, 0x45),
PANEL_DCS(0xD3, 0x41),
PANEL_DCS(0xD7, 0x50),
PANEL_DCS(0xD8, 0x40),
PANEL_DCS(0xD9, 0x40),
PANEL_DCS(0xDA, 0x40),
PANEL_DCS(0xDB, 0x40),
PANEL_DCS(0xDC, 0x4E),
PANEL_DCS(0xDD, 0x52),
PANEL_DCS(0xDE, 0x51),
PANEL_DCS(0xE1, 0x5E),
PANEL_DCS(0xE2, 0x5C),
PANEL_DCS(0xE3, 0x4C),
PANEL_DCS(0xE4, 0x4A),
PANEL_DCS(0xE5, 0x48),
PANEL_DCS(0xE6, 0x46),
PANEL_DCS(0xE7, 0x42),
PANEL_DCS(0xB0, 0x03),
PANEL_DCS(0xBE, 0x03),
PANEL_DCS(0xCC, 0x44),
PANEL_DCS(0xC8, 0x07),
PANEL_DCS(0xC9, 0x05),
PANEL_DCS(0xCA, 0x42),
PANEL_DCS(0xCD, 0x3E),
PANEL_DCS(0xCF, 0x60),
PANEL_DCS(0xD2, 0x04),
PANEL_DCS(0xD3, 0x04),
PANEL_DCS(0xD4, 0x01),
PANEL_DCS(0xD5, 0x00),
PANEL_DCS(0xD6, 0x03),
PANEL_DCS(0xD7, 0x04),
PANEL_DCS(0xD9, 0x01),
PANEL_DCS(0xDB, 0x01),
PANEL_DCS(0xE4, 0xF0),
PANEL_DCS(0xE5, 0x0A),
PANEL_DCS(0xB0, 0x00),
PANEL_DCS(0xCC, 0x08),
PANEL_DCS(0xC2, 0x08),
PANEL_DCS(0xC4, 0x10),
PANEL_DCS(0xB0, 0x02),
PANEL_DCS(0xC0, 0x00),
PANEL_DCS(0xC1, 0x0A),
PANEL_DCS(0xC2, 0x20),
PANEL_DCS(0xC3, 0x24),
PANEL_DCS(0xC4, 0x23),
PANEL_DCS(0xC5, 0x29),
PANEL_DCS(0xC6, 0x23),
PANEL_DCS(0xC7, 0x1C),
PANEL_DCS(0xC8, 0x19),
PANEL_DCS(0xC9, 0x17),
PANEL_DCS(0xCA, 0x17),
PANEL_DCS(0xCB, 0x18),
PANEL_DCS(0xCC, 0x1A),
PANEL_DCS(0xCD, 0x1E),
PANEL_DCS(0xCE, 0x20),
PANEL_DCS(0xCF, 0x23),
PANEL_DCS(0xD0, 0x07),
PANEL_DCS(0xD1, 0x00),
PANEL_DCS(0xD2, 0x00),
PANEL_DCS(0xD3, 0x0A),
PANEL_DCS(0xD4, 0x13),
PANEL_DCS(0xD5, 0x1C),
PANEL_DCS(0xD6, 0x1A),
PANEL_DCS(0xD7, 0x13),
PANEL_DCS(0xD8, 0x17),
PANEL_DCS(0xD9, 0x1C),
PANEL_DCS(0xDA, 0x19),
PANEL_DCS(0xDB, 0x17),
PANEL_DCS(0xDC, 0x17),
PANEL_DCS(0xDD, 0x18),
PANEL_DCS(0xDE, 0x1A),
PANEL_DCS(0xDF, 0x1E),
PANEL_DCS(0xE0, 0x20),
PANEL_DCS(0xE1, 0x23),
PANEL_DCS(0xE2, 0x07),
PANEL_DCS(0X11),
PANEL_DELAY(120),
PANEL_DCS(0X29),
PANEL_DELAY(50),
PANEL_END,
},
};
32 changes: 32 additions & 0 deletions src/drivers/mipi/panel-VIS_RM69299.c
View file
@@ -0,0 +1,32 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#include <mipi/panel.h>

struct panel_serializable_data VIS_RM69299 = {
.edid = {
.ascii_string = "RM69299",
.manufacturer_name = "RM",
.panel_bits_per_color = 8,
.panel_bits_per_pixel = 24,
.mode = {
.pixel_clock = 158695,
.lvds_dual_channel = 0,
.refresh = 60,
.ha = 1080, .hbl = 64, .hso = 26, .hspw = 2,
.va = 2248, .vbl = 64, .vso = 56, .vspw = 4,
.phsync = '-', .pvsync = '-',
.x_mm = 74, .y_mm = 131,
},
},
.init = {
PANEL_DCS(0xFE, 0x00, 0x15, 0x80),
PANEL_DCS(0xc2, 0x08, 0x15, 0x80),
PANEL_DCS(0x35, 0x00, 0x15, 0x80),
PANEL_DCS(0x51, 0xff, 0x15, 0x80),
PANEL_DCS(0x11, 0x00, 0x05, 0x80),
PANEL_DELAY(150),
PANEL_DCS(0x29, 0x00, 0x05, 0x80),
PANEL_DELAY(50),
PANEL_END,
},
};
48 changes: 48 additions & 0 deletions src/drivers/mipi/panel.c
View file
@@ -0,0 +1,48 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#include <console/console.h>
#include <delay.h>
#include <mipi/panel.h>

cb_err_t mipi_panel_parse_init_commands(const void *buf, mipi_cmd_func_t cmd_func)
{
const struct panel_init_command *init = buf;

/*
* The given commands should be in a buffer containing a packed array of
* panel_init_command and each element may be in variable size so we have
* to parse and scan.
*/

for (; init->cmd != PANEL_CMD_END; init = (const void *)buf) {
/*
* For some commands like DELAY, the init->len should not be
* counted for buf.
*/
buf += sizeof(*init);

u32 cmd = init->cmd, len = init->len;

switch (cmd) {
case PANEL_CMD_DELAY:
mdelay(len);
break;

case PANEL_CMD_DCS:
case PANEL_CMD_GENERIC:
buf += len;

cb_err_t ret = cmd_func(cmd, init->data, len);
if (ret != CB_SUCCESS)
return ret;
break;

default:
printk(BIOS_ERR, "%s: Unknown command code: %d, "
"abort panel initialization.\n", __func__, cmd);
return CB_ERR;
}
}

return CB_SUCCESS;
}
7 changes: 7 additions & 0 deletions src/drivers/pc80/rtc/Kconfig
View file
Expand Up @@ -2,3 +2,10 @@ config DRIVERS_MC146818
bool
default y if ARCH_X86
depends on PC80_SYSTEM

config USE_PC_CMOS_ALTCENTURY
bool "Use legacy-BIOS alt-century byte in CMOS"
default y if !USE_OPTION_TABLE
depends on DRIVERS_MC146818
help
May be useful for legacy OSes that assume its presence.
25 changes: 15 additions & 10 deletions src/drivers/pc80/rtc/mc146818rtc.c
View file
Expand Up @@ -2,15 +2,15 @@

#include <acpi/acpi.h>
#include <arch/io.h>
#include <bcd.h>
#include <fallback.h>
#include <version.h>
#include <commonlib/bsd/bcd.h>
#include <console/console.h>
#include <fallback.h>
#include <pc80/mc146818rtc.h>
#include <rtc.h>
#include <security/vboot/vbnv.h>
#include <security/vboot/vbnv_layout.h>
#include <types.h>
#include <version.h>

static void cmos_reset_date(void)
{
Expand Down Expand Up @@ -191,11 +191,11 @@ static int cmos_date_invalid(void)
*/
void cmos_check_update_date(void)
{
u8 year, century;
u8 year, century = 0;

/* Assume hardware always supports RTC_CLK_ALTCENTURY. */
wait_uip();
century = cmos_read(RTC_CLK_ALTCENTURY);
if (CONFIG(USE_PC_CMOS_ALTCENTURY))
century = cmos_read(RTC_CLK_ALTCENTURY);
year = cmos_read(RTC_CLK_YEAR);

/*
Expand All @@ -215,8 +215,8 @@ int rtc_set(const struct rtc_time *time)
cmos_write(bin2bcd(time->mday), RTC_CLK_DAYOFMONTH);
cmos_write(bin2bcd(time->mon), RTC_CLK_MONTH);
cmos_write(bin2bcd(time->year % 100), RTC_CLK_YEAR);
/* Same assumption as above: We always have RTC_CLK_ALTCENTURY */
cmos_write(bin2bcd(time->year / 100), RTC_CLK_ALTCENTURY);
if (CONFIG(USE_PC_CMOS_ALTCENTURY))
cmos_write(bin2bcd(time->year / 100), RTC_CLK_ALTCENTURY);
cmos_write(bin2bcd(time->wday + 1), RTC_CLK_DAYOFWEEK);
return 0;
}
Expand All @@ -230,8 +230,13 @@ int rtc_get(struct rtc_time *time)
time->mday = bcd2bin(cmos_read(RTC_CLK_DAYOFMONTH));
time->mon = bcd2bin(cmos_read(RTC_CLK_MONTH));
time->year = bcd2bin(cmos_read(RTC_CLK_YEAR));
/* Same assumption as above: We always have RTC_CLK_ALTCENTURY */
time->year += bcd2bin(cmos_read(RTC_CLK_ALTCENTURY)) * 100;
if (CONFIG(USE_PC_CMOS_ALTCENTURY)) {
time->year += bcd2bin(cmos_read(RTC_CLK_ALTCENTURY)) * 100;
} else {
time->year += 1900;
if (time->year < 1970)
time->year += 100;
}
time->wday = bcd2bin(cmos_read(RTC_CLK_DAYOFWEEK)) - 1;
return 0;
}
Expand Down
2 changes: 1 addition & 1 deletion src/drivers/soundwire/alc1308/alc1308.c
View file
Expand Up @@ -5,8 +5,8 @@
#include <acpi/acpi_soundwire.h>
#include <device/device.h>
#include <device/path.h>
#include <device/mipi_ids.h>
#include <device/soundwire.h>
#include <mipi/ids.h>
#include <stdio.h>

#include "chip.h"
Expand Down
2 changes: 1 addition & 1 deletion src/drivers/soundwire/alc5682/alc5682.c
View file
Expand Up @@ -4,9 +4,9 @@
#include <acpi/acpi_device.h>
#include <acpi/acpi_soundwire.h>
#include <device/device.h>
#include <device/mipi_ids.h>
#include <device/path.h>
#include <device/soundwire.h>
#include <mipi/ids.h>
#include <stdio.h>

#include "chip.h"
Expand Down
2 changes: 1 addition & 1 deletion src/drivers/soundwire/alc711/alc711.c
View file
Expand Up @@ -5,8 +5,8 @@
#include <acpi/acpi_soundwire.h>
#include <device/device.h>
#include <device/path.h>
#include <device/mipi_ids.h>
#include <device/soundwire.h>
#include <mipi/ids.h>
#include <stdio.h>

#include "chip.h"
Expand Down
2 changes: 1 addition & 1 deletion src/drivers/soundwire/max98373/max98373.c
View file
Expand Up @@ -5,8 +5,8 @@
#include <acpi/acpi_soundwire.h>
#include <device/device.h>
#include <device/path.h>
#include <device/mipi_ids.h>
#include <device/soundwire.h>
#include <mipi/ids.h>
#include <stdio.h>

#include "chip.h"
Expand Down
2 changes: 1 addition & 1 deletion src/drivers/spi/acpi/acpi.c
View file
Expand Up @@ -125,7 +125,7 @@ static void spi_acpi_fill_ssdt_generator(const struct device *dev)

/* Wake capabilities */
if (config->wake) {
acpigen_write_name_integer("_S0W", 4);
acpigen_write_name_integer("_S0W", ACPI_DEVICE_SLEEP_D3_HOT);
acpigen_write_PRW(config->wake, 3);
};

Expand Down
2 changes: 1 addition & 1 deletion src/drivers/spi/winbond.c
View file
Expand Up @@ -205,7 +205,7 @@ static const struct spi_flash_part_id flash_table[] = {
{
/* W25Q512NW-IM */
.id[0] = 0x8020,
.nr_sectors_shift = 11,
.nr_sectors_shift = 14,
.fast_read_dual_output_support = 1,
.fast_read_dual_io_support = 1,
.protection_granularity_shift = 16,
Expand Down
2 changes: 1 addition & 1 deletion src/drivers/ti/tps65913/tps65913rtc.c
View file
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#include <bcd.h>
#include <commonlib/bsd/bcd.h>
#include <console/console.h>
#include <device/i2c_simple.h>
#include <rtc.h>
Expand Down
2 changes: 1 addition & 1 deletion src/drivers/uart/acpi/acpi.c
View file
Expand Up @@ -89,7 +89,7 @@ static void uart_acpi_fill_ssdt(const struct device *dev)

/* Wake capabilities */
if (config->wake) {
acpigen_write_name_integer("_S0W", ACPI_DEVICE_SLEEP_D3_COLD);
acpigen_write_name_integer("_S0W", ACPI_DEVICE_SLEEP_D3_HOT);
acpigen_write_PRW(config->wake, SLP_TYP_S3);
};

Expand Down
459 changes: 390 additions & 69 deletions src/drivers/wifi/generic/acpi.c
View file

Large diffs are not rendered by default.

2 changes: 2 additions & 0 deletions src/ec/google/chromeec/ec_acpi.c
View file
Expand Up @@ -184,6 +184,8 @@ static const enum ps2_action_key ps2_enum_val[] = {
[TK_PLAY_PAUSE] = PS2_KEY_PLAY_PAUSE,
[TK_NEXT_TRACK] = PS2_KEY_NEXT_TRACK,
[TK_PREV_TRACK] = PS2_KEY_PREV_TRACK,
[TK_KBD_BKLIGHT_TOGGLE] = PS2_KEY_KBD_BKLIGHT_TOGGLE,
[TK_MICMUTE] = PS2_KEY_MICMUTE,
};

static void fill_ssdt_ps2_keyboard(const struct device *dev)
Expand Down
61 changes: 59 additions & 2 deletions src/ec/google/chromeec/ec_commands.h
View file
Expand Up @@ -452,6 +452,13 @@ extern "C" {
#define USB_RETIMER_FW_UPDATE_OP_SHIFT 4
#define USB_RETIMER_FW_UPDATE_ERR 0xfe
#define USB_RETIMER_FW_UPDATE_INVALID_MUX 0xff
/* Mask to clear unused MUX bits in retimer firmware update */
#define USB_RETIMER_FW_UPDATE_MUX_MASK (USB_PD_MUX_USB_ENABLED | \
USB_PD_MUX_DP_ENABLED | \
USB_PD_MUX_SAFE_MODE | \
USB_PD_MUX_TBT_COMPAT_ENABLED | \
USB_PD_MUX_USB4_ENABLED)

/* Retimer firmware update operations */
#define USB_RETIMER_FW_UPDATE_QUERY_PORT 0 /* Which ports has retimer */
#define USB_RETIMER_FW_UPDATE_SUSPEND_PD 1 /* Suspend PD port */
Expand Down Expand Up @@ -1946,7 +1953,13 @@ enum sysinfo_flags {
SYSTEM_IS_FORCE_LOCKED = BIT(1),
SYSTEM_JUMP_ENABLED = BIT(2),
SYSTEM_JUMPED_TO_CURRENT_IMAGE = BIT(3),
SYSTEM_REBOOT_AT_SHUTDOWN = BIT(4)
SYSTEM_REBOOT_AT_SHUTDOWN = BIT(4),
/*
* Used internally. It's set when EC_HOST_EVENT_KEYBOARD_RECOVERY is
* set and cleared when the system shuts down (not when the host event
* flag is cleared).
*/
SYSTEM_IN_MANUAL_RECOVERY = BIT(5),
};

struct ec_response_sysinfo {
Expand Down Expand Up @@ -2670,6 +2683,8 @@ enum motionsensor_chip {
MOTIONSENSE_CHIP_BMI260 = 24,
MOTIONSENSE_CHIP_ICM426XX = 25,
MOTIONSENSE_CHIP_ICM42607 = 26,
MOTIONSENSE_CHIP_BMA422 = 27,
MOTIONSENSE_CHIP_BMI323 = 28,
MOTIONSENSE_CHIP_MAX,
};

Expand Down Expand Up @@ -4246,16 +4261,55 @@ struct ec_params_i2c_write {
* discharge the battery.
*/
#define EC_CMD_CHARGE_CONTROL 0x0096
#define EC_VER_CHARGE_CONTROL 1
#define EC_VER_CHARGE_CONTROL 2

enum ec_charge_control_mode {
CHARGE_CONTROL_NORMAL = 0,
CHARGE_CONTROL_IDLE,
CHARGE_CONTROL_DISCHARGE,
/* Add no more entry below. */
CHARGE_CONTROL_COUNT,
};

#define EC_CHARGE_MODE_TEXT { \
[CHARGE_CONTROL_NORMAL] = "NORMAL", \
[CHARGE_CONTROL_IDLE] = "IDLE", \
[CHARGE_CONTROL_DISCHARGE] = "DISCHARGE", \
}

enum ec_charge_control_cmd {
EC_CHARGE_CONTROL_CMD_SET = 0,
EC_CHARGE_CONTROL_CMD_GET,
};

struct ec_params_charge_control {
uint32_t mode; /* enum charge_control_mode */

/* Below are the fields added in V2. */
uint8_t cmd; /* enum ec_charge_control_cmd. */
uint8_t reserved;
/*
* Lower and upper thresholds for battery sustainer. This struct isn't
* named to avoid tainting foreign projects' name spaces.
*
* If charge mode is explicitly set (e.g. DISCHARGE), battery sustainer
* will be disabled. To disable battery sustainer, set mode=NORMAL,
* lower=-1, upper=-1.
*/
struct {
int8_t lower; /* Display SoC in percentage. */
int8_t upper; /* Display SoC in percentage. */
} sustain_soc;
} __ec_align4;

/* Added in v2 */
struct ec_response_charge_control {
uint32_t mode; /* enum charge_control_mode */
struct { /* Battery sustainer thresholds */
int8_t lower;
int8_t upper;
} sustain_soc;
uint16_t reserved;
} __ec_align4;

/*****************************************************************************/
Expand Down Expand Up @@ -6331,6 +6385,8 @@ enum action_key {
TK_PLAY_PAUSE = 15,
TK_NEXT_TRACK = 16,
TK_PREV_TRACK = 17,
TK_KBD_BKLIGHT_TOGGLE = 18,
TK_MICMUTE = 19,
};

/*
Expand Down Expand Up @@ -6648,6 +6704,7 @@ enum tcpc_cc_polarity {
#define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0)
#define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1)
#define PD_STATUS_EVENT_HARD_RESET BIT(2)
#define PD_STATUS_EVENT_DISCONNECTED BIT(3)

/*
* Encode and decode for BCD revision response
Expand Down
4 changes: 2 additions & 2 deletions src/ec/roda/it8518/acpi/ac.asl
View file
Expand Up @@ -9,8 +9,8 @@ Device (AC)

Method (_PSR, 0, NotSerialized) // _PSR: Power Source
{
Store ("-----> AC: _PSR", Debug)
Store ("<----- AC: _PSR", Debug)
Printf ("-----> AC: _PSR")
Printf ("<----- AC: _PSR")
Return (PWRS)
}
}
58 changes: 28 additions & 30 deletions src/ec/roda/it8518/acpi/battery.asl
View file
Expand Up @@ -33,77 +33,75 @@ Device (BAT0)
Name (PBST, Package (4)
{
0x00000000, // Battery State
0xFFFFFFFF, // Battery Present Rate
0xFFFFFFFF, // Battery Remaining Capacity
0xFFFFFFFF, // Battery Present Voltage
0xffffffff, // Battery Present Rate
0xffffffff, // Battery Remaining Capacity
0xffffffff, // Battery Present Voltage
})


// Battery Slot Status
Method (_STA, 0, Serialized)
{
Store ("-----> BAT0: _STA", Debug)
Printf ("-----> BAT0: _STA")

Store (0x0F, Local0)
Local0 = 0x0f

Store (ECPS, Local1)
And (Local1, 0x02, Local1)
If (LEqual (Local1, 0x02))
Local1 = ECPS & 0x02
If (Local1 == 0x02)
{
Store (0x1F, Local0)
Local0 = 0x1f
}

Store ("<----- BAT0: _STA", Debug)
Printf ("<----- BAT0: _STA")

Return (Local0)
}

Method (_BIF, 0, Serialized)
{
Store ("-----> BAT0: _BIF", Debug)
Printf ("-----> BAT0: _BIF")

Store (B0FC, Index (PBIF, 0x02))
Store (Divide (Multiply (B0FC, 6), 100), Index (PBIF, 0x05))
Store (Divide (Multiply (B0FC, 3), 100), Index (PBIF, 0x06))
PBIF[2] = B0FC
PBIF[5] = (B0FC * 6) / 100
PBIF[6] = (B0FC * 3) / 100

Store ("<----- BAT0: _BIF", Debug)
Printf ("<----- BAT0: _BIF")

Return (PBIF)
}

Method (_BST, 0, Serialized)
{
Store ("-----> BAT0: _BST", Debug)
Printf ("-----> BAT0: _BST")

Store (B0ST, Local0)
And (Local0, 0x40, Local0)
If (LEqual (Local0, 0x40))
Local0 = B0ST & 0x40
If (Local0 == 0x40)
{
If (LEqual (PWRS, 1))
If (PWRS == 1)
{
Store (0x00, Index (PBST, 0x00))
PBST[0] = 0x00
}
Else
{
Store (0x01, Index (PBST, 0x00))
PBST[0] = 0x01
}
}
Else
{
Store (0x02, Index (PBST, 0x00))
PBST[0] = 0x02
}

Store (B0AC, Local1)
If (LGreaterEqual (Local1, 0x8000))
Local1 = B0AC
If (Local1 >= 0x8000)
{
Subtract (0x00010000, Local1, Local1)
Local1 = 0x00010000 - Local1
}

Store (Local1, Index (PBST, 0x01))
Store (B0RC, Index (PBST, 0x02))
Store (B0VT, Index (PBST, 0x03))
PBST[1] = Local1
PBST[2] = B0RC
PBST[3] = B0VT

Store ("<----- BAT0: _BST", Debug)
Printf ("<----- BAT0: _BST")

Return (PBST)
}
Expand Down
84 changes: 41 additions & 43 deletions src/ec/roda/it8518/acpi/ec.asl
View file
Expand Up @@ -6,12 +6,12 @@ Device (EC0)
{
Name (_HID, EISAID ("PNP0C09")) // ACPI Embedded Controller
Name (_UID, 1)
Name (_GPE, Add(EC_SCI_GPI, 16)) // GPE for Runtime SCI
Name (_GPE, EC_SCI_GPI)
Name (PWRS, 1)
Name (LIDS, 1)

// EC RAM fields
OperationRegion(ERAM, EmbeddedControl, 0, 0xFF)
OperationRegion(ERAM, EmbeddedControl, 0, 0xff)
Field (ERAM, ByteAcc, NoLock, Preserve)
{
Offset(0x02), // [Configuration Space 0x2]
Expand All @@ -31,13 +31,13 @@ Device (EC0)
Offset (0x50), // [Configuration Space 0x50]
LUXH, 8, // Ambient Light Illuminance High
LUXL, 8, // Ambient Light Illuminance Low
Offset (0x5B), // [Configuration Space 0x5B]
Offset (0x5b), // [Configuration Space 0x5b]
BRIG, 8, // Brightness
} // End of ERAM

Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
Return (0x0f)
}

Method (_CRS, 0, NotSerialized)
Expand All @@ -51,143 +51,141 @@ Device (EC0)

Method (_REG, 2, NotSerialized)
{
Store ("-----> EC: _REG", Debug)
Printf ("-----> EC: _REG")

Store (0x01, ECOS)
ECOS = 0x01

Store ("<----- EC: _REG", Debug)
Printf ("<----- EC: _REG")
}

Method (_Q29, 0, NotSerialized) // _Qxx: EC Query
{
Store ("-----> EC: _Q29", Debug)
Printf ("-----> EC: _Q29")

Store (1, PWRS)
PWRS = 1
Notify (AC, 0x80)
Notify (AC, 0x00)
Notify (BAT0, 0x00)
Notify (BAT0, 0x80)

Store ("<----- EC: _Q29", Debug)
Printf ("<----- EC: _Q29")
}

Method (_Q31, 0, NotSerialized) // _Qxx: EC Query
{
Store ("-----> EC: _Q31", Debug)
Printf ("-----> EC: _Q31")

Store (0, PWRS)
PWRS = 0
Notify (AC, 0x80)
Notify (AC, 0x00)
Notify (BAT0, 0x00)
Notify (BAT0, 0x80)

Store ("<----- EC: _Q31", Debug)
Printf ("<----- EC: _Q31")
}

Method (_Q32, 0, NotSerialized) // _Qxx: EC Query
{
Store ("-----> EC: _Q32", Debug)
Printf ("-----> EC: _Q32")

Sleep (2500)
Notify (BAT0, 0x00)
Notify (BAT0, 0x80)
Notify (BAT0, 0x81)
Notify (BAT0, 0x82)

Store ("<----- EC: _Q32", Debug)
Printf ("<----- EC: _Q32")
}

Method (_Q33, 0, NotSerialized) // _Qxx: EC Query
{
Store ("-----> EC: _Q33", Debug)
Printf ("-----> EC: _Q33")

Sleep (2500)
Notify (BAT0, 0x00)
Notify (BAT0, 0x80)
Notify (BAT0, 0x81)
Notify (BAT0, 0x82)

Store ("<---- EC: _Q33", Debug)
Printf ("<---- EC: _Q33")
}

Method (_Q36, 0, NotSerialized) // _Qxx: EC Query
{
Store ("-----> EC: _Q36", Debug)
Printf ("-----> EC: _Q36")

Notify (BAT0, 0x80)

Store ("<----- EC: _Q36", Debug)
Printf ("<----- EC: _Q36")
}

Method (_Q37, 0, NotSerialized) // _Qxx: EC Query
{
Store ("-----> EC: _Q37", Debug)
Printf ("-----> EC: _Q37")

Notify (BAT0, 0x80)

Store ("<----- EC: _Q37", Debug)
Printf ("<----- EC: _Q37")
}

Method (_Q43, 0, NotSerialized) // _Qxx: EC Query
{
Store ("-----> EC: _Q43", Debug)
Printf ("-----> EC: _Q43")

Store (BRIG, Local0)
Increment (Local0)
If (LGreater (Local0, 0xAA)) {
Store (0xAA, Local0)
Local0 = BRIG + 1
If (Local0 > 0xaa) {
Local0 = 0xaa
}
Store (Local0, BRIG)
BRIG = Local0

\_SB.PCI0.GFX0.INCB ()

Store ("<---- EC: _Q43", Debug)
Printf ("<---- EC: _Q43")
}

Method (_Q44, 0, NotSerialized) // _Qxx: EC Query
{
Store ("-----> EC: _Q44", Debug)
Printf ("-----> EC: _Q44")

Store (BRIG, Local0)
Decrement (Local0)
If (LLess (Local0, 0xA0))
Local0 = BRIG - 1
If (Local0 < 0xa0)
{
Store (0xA0, Local0)
Local0 = 0xa0
}
Store (Local0, BRIG)
BRIG = Local0

\_SB.PCI0.GFX0.DECB ()

Store ("<---- EC: _Q44", Debug)
Printf ("<---- EC: _Q44")
}

Method (_Q45, 0, NotSerialized) // _Qxx: EC Query
{
Store ("-----> EC: _Q45", Debug)
Printf ("-----> EC: _Q45")

Store (0, LIDS)
LIDS = 0
Notify (LID, 0x80)

Store ("<----- EC: _Q45", Debug)
Printf ("<----- EC: _Q45")
}

Method (_Q46, 0, NotSerialized) // _Qxx: EC Query
{
Store ("-----> EC: _Q46", Debug)
Printf ("-----> EC: _Q46")

Store (1, LIDS)
LIDS = 1
Notify (LID, 0x80)

Store ("<----- EC: _Q46", Debug)
Printf ("<----- EC: _Q46")
}

Method (_Q70, 0, NotSerialized) // _Qxx: EC Query
{
Store ("-----> EC: _Q70", Debug)
Printf ("-----> EC: _Q70")

Notify (ALSD, 0x80)

Store ("<----- EC: _Q70", Debug)
Printf ("<----- EC: _Q70")
}

#include "battery.asl"
Expand Down
4 changes: 2 additions & 2 deletions src/ec/roda/it8518/acpi/lid.asl
View file
Expand Up @@ -7,8 +7,8 @@ Device (LID)
Name (_HID, EisaId ("PNP0C0D")) // _HID: Hardware ID
Method (_LID, 0, NotSerialized) // _LID: Lid Status
{
Store ("-----> LID0: _LID", Debug)
Store ("<----- LID0: _LID", Debug)
Printf ("-----> LID0: _LID")
Printf ("<----- LID0: _LID")
Return (LIDS)
}
}
10 changes: 9 additions & 1 deletion src/include/acpi/acpi.h
View file
Expand Up @@ -973,7 +973,15 @@ typedef struct acpi_hest_generic_data_v300 {
#define ACPI_GENERROR_VALID_FRUID_TEXT BIT(1)
#define ACPI_GENERROR_VALID_TIMESTAMP BIT(2)

/* Generic Error Status Block */
/*
* Generic Error Status Block
*
* If there is a raw data section at the end of the generic error status block after the
* zero or more generic error data entries, raw_data_length indicates the length of the raw
* section and raw_data_offset is the offset of the beginning of the raw data section from
* the start of the acpi_generic_error_status block it is contained in. So if raw_data_length
* is non-zero, raw_data_offset must be at least sizeof(acpi_generic_error_status_t).
*/
typedef struct acpi_generic_error_status {
u32 block_status;
u32 raw_data_offset; /* must follow any generic entries */
Expand Down
2 changes: 2 additions & 0 deletions src/include/acpi/acpigen_ps2_keybd.h
View file
Expand Up @@ -24,6 +24,8 @@ enum ps2_action_key {
PS2_KEY_PLAY_PAUSE,
PS2_KEY_NEXT_TRACK,
PS2_KEY_PREV_TRACK,
PS2_KEY_KBD_BKLIGHT_TOGGLE,
PS2_KEY_MICMUTE,
};

#define PS2_MIN_TOP_ROW_KEYS 10
Expand Down
4 changes: 2 additions & 2 deletions src/include/console/console.h
View file
Expand Up @@ -3,10 +3,10 @@
#ifndef CONSOLE_CONSOLE_H_
#define CONSOLE_CONSOLE_H_

#include <stdint.h>
#include <arch/cpu.h>
#include <console/post_codes.h>
#include <commonlib/console/post_codes.h>
#include <console/vtxprintf.h>
#include <stdint.h>

/* console.h is supposed to provide the log levels defined in here: */
#include <commonlib/loglevel.h>
Expand Down
4 changes: 2 additions & 2 deletions src/include/cper.h
View file
Expand Up @@ -3,10 +3,10 @@
#ifndef _CPER_H_
#define _CPER_H_

#include <commonlib/bsd/bcd.h>
#include <rtc.h>
#include <types.h>
#include <uuid.h>
#include <bcd.h>
#include <rtc.h>

/* This file contains some definitions and helpers for implementing structures
* in the UEFI specification, Appendix "Common Platform Error Record". This
Expand Down
1 change: 1 addition & 0 deletions src/include/cpu/intel/cpu_ids.h
View file
Expand Up @@ -47,6 +47,7 @@
#define CPUID_COMETLAKE_H_S_10_2_Q0_P1 0xa0654
#define CPUID_TIGERLAKE_A0 0x806c0
#define CPUID_TIGERLAKE_B0 0x806c1
#define CPUID_TIGERLAKE_R0 0x806d1
#define CPUID_ELKHARTLAKE_A0 0x90660
#define CPUID_ELKHARTLAKE_B0 0x90661
#define CPUID_ALDERLAKE_S_A0 0x90670
Expand Down
15 changes: 9 additions & 6 deletions src/include/cpu/x86/msr.h
View file
Expand Up @@ -80,22 +80,25 @@
#define IA32_MC_ADDR(bank) (IA32_MC0_ADDR + 4 * (bank))
#define IA32_MC0_MISC 0x403
#define IA32_MC_MISC(bank) (IA32_MC0_MISC + 4 * (bank))
#define IA32_VMX_BASIC_MSR 0x480
#define VMX_BASIC_HI_DUAL_MONITOR (1UL << (49 - 32))
#define IA32_VMX_MISC_MSR 0x485
#define IA32_VMX_BASIC_MSR 0x480
#define VMX_BASIC_HI_DUAL_MONITOR (1UL << (49 - 32))
#define IA32_VMX_MISC_MSR 0x485

#define IA32_PM_ENABLE 0x770
#define IA32_HWP_CAPABILITIES 0x771
#define IA32_HWP_REQUEST 0x774
#define IA32_HWP_STATUS 0x777
#define IA32_L3_PROTECTED_WAYS 0xc85
#define IA32_SF_QOS_INFO 0xc87
#define IA32_SF_WAY_COUNT_MASK 0x3f
#define IA32_PQR_ASSOC 0xc8f
/* MSR bits 33:32 encode slot number 0-3 */
#define IA32_PQR_ASSOC_MASK (1 << 0 | 1 << 1)
#define IA32_PQR_ASSOC_MASK (1 << 0 | 1 << 1)
#define IA32_L3_MASK_1 0xc91
#define IA32_L3_MASK_2 0xc92

#define IA32_CR_SF_QOS_MASK_1 0x1891
#define IA32_CR_SF_QOS_MASK_2 0x1892
#define IA32_CR_SF_QOS_MASK_1 0x1891
#define IA32_CR_SF_QOS_MASK_2 0x1892

#ifndef __ASSEMBLER__
#include <types.h>
Expand Down
2 changes: 1 addition & 1 deletion src/include/cpu/x86/post_code.h
View file
@@ -1,7 +1,7 @@
#ifndef __X86_POST_CODE_H__
#define __X86_POST_CODE_H__

#include <console/post_codes.h>
#include <commonlib/console/post_codes.h>

#if CONFIG(POST_IO) && !(ENV_BOOTBLOCK && CONFIG(NO_EARLY_BOOTBLOCK_POSTCODES))
#define post_code(value) \
Expand Down
4 changes: 3 additions & 1 deletion src/include/device/mmio.h
View file
Expand Up @@ -4,6 +4,7 @@
#define __DEVICE_MMIO_H__

#include <arch/mmio.h>
#include <commonlib/helpers.h>
#include <endian.h>
#include <types.h>

Expand Down Expand Up @@ -130,7 +131,8 @@ static inline void buffer_to_fifo32(void *buffer, size_t size, void *fifo,
#define DEFINE_BIT(name, bit) DEFINE_BITFIELD(name, bit, bit)

#define _BF_MASK(name, value) \
((u32)((1ULL << name##_BITFIELD_SIZE) - 1) << name##_BITFIELD_SHIFT)
((u32)GENMASK(name##_BITFIELD_SHIFT + name##_BITFIELD_SIZE - 1, \
name##_BITFIELD_SHIFT))

#define _BF_VALUE(name, value) \
(((u32)(value) << name##_BITFIELD_SHIFT) & _BF_MASK(name, 0))
Expand Down
82 changes: 81 additions & 1 deletion src/include/device/pci_ids.h
View file
Expand Up @@ -2159,6 +2159,7 @@
#define PCI_DEVICE_ID_INTEL_CNL_ISHB 0x9dfc
#define PCI_DEVICE_ID_INTEL_CML_ISHB 0x02fc
#define PCI_DEVICE_ID_INTEL_TGL_ISHB 0xa0fc
#define PCI_DEVICE_ID_INTEL_TGL_H_ISHB 0x43fc

/* Intel 82371FB (PIIX) */
#define PCI_DEVICE_ID_INTEL_82371FB_ISA 0x122e
Expand Down Expand Up @@ -2935,6 +2936,15 @@
#define PCI_DEVICE_ID_INTEL_TGP_ESPI_24 0xA09D
#define PCI_DEVICE_ID_INTEL_TGP_ESPI_25 0xA09E
#define PCI_DEVICE_ID_INTEL_TGP_ESPI_26 0xA09F
#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_B560 0x4387
#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_H510 0x4388
#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_H570 0x4386
#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_Q570 0x4384
#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_W580 0x438F
#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_Z590 0x4385
#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_HM570 0x438B
#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_QM580 0x438A
#define PCI_DEVICE_ID_INTEL_TGP_H_ESPI_WM590 0x4389
#define PCI_DEVICE_ID_INTEL_MCC_ESPI_0 0x4b00
#define PCI_DEVICE_ID_INTEL_MCC_ESPI_1 0x4b04
#define PCI_DEVICE_ID_INTEL_MCC_BASE_ESPI 0x4b03
Expand Down Expand Up @@ -3213,6 +3223,31 @@
#define PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP15 0xa0b6
#define PCI_DEVICE_ID_INTEL_TGP_LP_PCIE_RP16 0xa0b7

#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP1 0x43b8
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP2 0x43b9
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP3 0x43ba
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP4 0x43bb
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP5 0x43bc
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP6 0x43bd
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP7 0x43be
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP8 0x43bf
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP9 0x43b0
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP10 0x43b1
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP11 0x43b2
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP12 0x43b3
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP13 0x43b4
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP14 0x43b5
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP15 0x43b6
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP16 0x43b7
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP17 0x43c0
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP18 0x43c1
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP19 0x43c2
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP20 0x43c3
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP21 0x43c4
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP22 0x43c5
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP23 0x43c6
#define PCI_DEVICE_ID_INTEL_TGP_H_PCIE_RP24 0x43c7

#define PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP1 0xa338
#define PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP2 0xa339
#define PCI_DEVICE_ID_INTEL_CNP_H_PCIE_RP3 0xa33a
Expand Down Expand Up @@ -3402,6 +3437,7 @@
#define PCI_DEVICE_ID_INTEL_TGP_SATA 0xa0d5
#define PCI_DEVICE_ID_INTEL_TGP_PREMIUM_SATA 0xa0d7
#define PCI_DEVICE_ID_INTEL_TGP_COMPAT_SATA 0x282a
#define PCI_DEVICE_ID_INTEL_TGP_H_SATA 0x43d3
#define PCI_DEVICE_ID_INTEL_MCC_AHCI_SATA 0x4b60
#define PCI_DEVICE_ID_INTEL_JSP_SATA_1 0x4dd2
#define PCI_DEVICE_ID_INTEL_JSP_SATA_2 0x4dd3
Expand Down Expand Up @@ -3435,6 +3471,7 @@
#define PCI_DEVICE_ID_INTEL_CMP_PMC 0x02a1
#define PCI_DEVICE_ID_INTEL_CMP_H_PMC 0x06a1
#define PCI_DEVICE_ID_INTEL_TGP_PMC 0xa0a1
#define PCI_DEVICE_ID_INTEL_TGP_H_PMC 0x43a1
#define PCI_DEVICE_ID_INTEL_MCC_PMC 0x4b21
#define PCI_DEVICE_ID_INTEL_JSP_PMC 0x4da1
#define PCI_DEVICE_ID_INTEL_ADP_P_PMC 0x7a21
Expand Down Expand Up @@ -3504,6 +3541,13 @@
#define PCI_DEVICE_ID_INTEL_TGP_I2C5 0xa0c6
#define PCI_DEVICE_ID_INTEL_TGP_I2C6 0xa0d8
#define PCI_DEVICE_ID_INTEL_TGP_I2C7 0xa0d9
#define PCI_DEVICE_ID_INTEL_TGP_H_I2C0 0x43e8
#define PCI_DEVICE_ID_INTEL_TGP_H_I2C1 0x43e9
#define PCI_DEVICE_ID_INTEL_TGP_H_I2C2 0x43ea
#define PCI_DEVICE_ID_INTEL_TGP_H_I2C3 0x43eb
#define PCI_DEVICE_ID_INTEL_TGP_H_I2C4 0x43ad
#define PCI_DEVICE_ID_INTEL_TGP_H_I2C5 0x43ae
#define PCI_DEVICE_ID_INTEL_TGP_H_I2C6 0x43d8
#define PCI_DEVICE_ID_INTEL_MCC_I2C0 0x4b78
#define PCI_DEVICE_ID_INTEL_MCC_I2C1 0x4b79
#define PCI_DEVICE_ID_INTEL_MCC_I2C2 0x4b7a
Expand Down Expand Up @@ -3581,6 +3625,10 @@
#define PCI_DEVICE_ID_INTEL_TGP_UART0 0xa0a8
#define PCI_DEVICE_ID_INTEL_TGP_UART1 0xa0a9
#define PCI_DEVICE_ID_INTEL_TGP_UART2 0xa0c7
#define PCI_DEVICE_ID_INTEL_TGP_H_UART0 0x43a8
#define PCI_DEVICE_ID_INTEL_TGP_H_UART1 0x43a9
#define PCI_DEVICE_ID_INTEL_TGP_H_UART2 0x43a7
#define PCI_DEVICE_ID_INTEL_TGP_H_UART3 0x43da
#define PCI_DEVICE_ID_INTEL_MCC_UART0 0x4b28
#define PCI_DEVICE_ID_INTEL_MCC_UART1 0x4b29
#define PCI_DEVICE_ID_INTEL_MCC_UART2 0x4b4d
Expand Down Expand Up @@ -3652,6 +3700,11 @@
#define PCI_DEVICE_ID_INTEL_TGP_GSPI4 0xa0fe
#define PCI_DEVICE_ID_INTEL_TGP_GSPI5 0xa0de
#define PCI_DEVICE_ID_INTEL_TGP_GSPI6 0xa0df
#define PCI_DEVICE_ID_INTEL_TGP_H_SPI0 0x43a4
#define PCI_DEVICE_ID_INTEL_TGP_H_GSPI0 0x43aa
#define PCI_DEVICE_ID_INTEL_TGP_H_GSPI1 0x43ab
#define PCI_DEVICE_ID_INTEL_TGP_H_GSPI2 0x43fb
#define PCI_DEVICE_ID_INTEL_TGP_H_GSPI3 0x43fd
#define PCI_DEVICE_ID_INTEL_MCC_SPI0 0x4b24
#define PCI_DEVICE_ID_INTEL_MCC_GSPI0 0x4b2a
#define PCI_DEVICE_ID_INTEL_MCC_GSPI1 0x4b2b
Expand Down Expand Up @@ -3788,6 +3841,8 @@
#define PCI_DEVICE_ID_INTEL_TGL_GT2 0xFF20
#define PCI_DEVICE_ID_INTEL_TGL_GT2_Y 0x9A40
#define PCI_DEVICE_ID_INTEL_TGL_GT0 0x9A7F
#define PCI_DEVICE_ID_INTEL_TGL_GT1_H_32 0x9A60
#define PCI_DEVICE_ID_INTEL_TGL_GT1_H_16 0x9A68
#define PCI_DEVICE_ID_INTEL_TGL_GT2_ULT 0x9A49
#define PCI_DEVICE_ID_INTEL_TGL_GT3_ULT 0x9A52
#define PCI_DEVICE_ID_INTEL_TGL_GT2_ULX 0x9A40
Expand Down Expand Up @@ -3824,6 +3879,7 @@
#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_6 0x46a6
#define PCI_DEVICE_ID_INTEL_ADL_S_GT1 0x4680
#define PCI_DEVICE_ID_INTEL_ADL_M_GT1 0x46c0
#define PCI_DEVICE_ID_INTEL_ADL_M_GT2 0x46aa

/* Intel Northbridge Ids */
#define PCI_DEVICE_ID_INTEL_APL_NB 0x5af0
Expand Down Expand Up @@ -3883,6 +3939,8 @@
#define PCI_DEVICE_ID_INTEL_TGL_ID_U_4_2 0x9A14
#define PCI_DEVICE_ID_INTEL_TGL_ID_Y_2_2 0x9A02
#define PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2 0x9A12
#define PCI_DEVICE_ID_INTEL_TGL_ID_H_6_1 0x9A26
#define PCI_DEVICE_ID_INTEL_TGL_ID_H_8_1 0x9A36
#define PCI_DEVICE_ID_INTEL_EHL_ID_0 0x4510
#define PCI_DEVICE_ID_INTEL_EHL_ID_1 0x4522
#define PCI_DEVICE_ID_INTEL_EHL_ID_1A 0x4538
Expand Down Expand Up @@ -3922,7 +3980,6 @@
#define PCI_DEVICE_ID_INTEL_ADL_S_ID_14 0x4623
#define PCI_DEVICE_ID_INTEL_ADL_S_ID_15 0x0060
#define PCI_DEVICE_ID_INTEL_ADL_P_ID_1 0x4629
#define PCI_DEVICE_ID_INTEL_ADL_P_ID_2 0x460a
#define PCI_DEVICE_ID_INTEL_ADL_P_ID_3 0x4641
#define PCI_DEVICE_ID_INTEL_ADL_P_ID_4 0x4649
#define PCI_DEVICE_ID_INTEL_ADL_P_ID_5 0x4621
Expand All @@ -3931,6 +3988,7 @@
#define PCI_DEVICE_ID_INTEL_ADL_P_ID_8 0x4661
#define PCI_DEVICE_ID_INTEL_ADL_P_ID_9 0x467f
#define PCI_DEVICE_ID_INTEL_ADL_M_ID_1 0x4602
#define PCI_DEVICE_ID_INTEL_ADL_M_ID_2 0x460a
/* Intel SMBUS device Ids */
#define PCI_DEVICE_ID_INTEL_LPT_H_SMBUS 0x8c22
#define PCI_DEVICE_ID_INTEL_LPT_LP_SMBUS 0x9c22
Expand All @@ -3946,6 +4004,7 @@
#define PCI_DEVICE_ID_INTEL_CMP_SMBUS 0x02a3
#define PCI_DEVICE_ID_INTEL_CMP_H_SMBUS 0x06a3
#define PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS 0xa0a3
#define PCI_DEVICE_ID_INTEL_TGP_H_SMBUS 0x43a3
#define PCI_DEVICE_ID_INTEL_MCC_SMBUS 0x4b23
#define PCI_DEVICE_ID_INTEL_JSP_SMBUS 0x4da3
#define PCI_DEVICE_ID_INTEL_ADP_P_SMBUS 0xa0a3
Expand Down Expand Up @@ -3974,6 +4033,8 @@
#define PCI_DEVICE_ID_INTEL_CMP_H_XHCI 0x06ed
#define PCI_DEVICE_ID_INTEL_TGP_LP_XHCI 0xa0ed
#define PCI_DEVICE_ID_INTEL_TGP_TCSS_XHCI 0x9a13
#define PCI_DEVICE_ID_INTEL_TGP_H_XHCI 0x43ed
#define PCI_DEVICE_ID_INTEL_TGP_H_TCSS_XHCI 0x9a17
#define PCI_DEVICE_ID_INTEL_MCC_XHCI 0x4b7d
#define PCI_DEVICE_ID_INTEL_JSP_XHCI 0x4ded
#define PCI_DEVICE_ID_INTEL_ADP_P_XHCI 0x51ed
Expand All @@ -3995,6 +4056,7 @@
#define PCI_DEVICE_ID_INTEL_CMP_P2SB 0x02a0
#define PCI_DEVICE_ID_INTEL_CMP_H_P2SB 0x06a0
#define PCI_DEVICE_ID_INTEL_TGL_P2SB 0xa0a0
#define PCI_DEVICE_ID_INTEL_TGL_H_P2SB 0x43a0
#define PCI_DEVICE_ID_INTEL_EHL_P2SB 0x4b20
#define PCI_DEVICE_ID_INTEL_JSP_P2SB 0x4da0
#define PCI_DEVICE_ID_INTEL_ADP_P_P2SB 0x7a20
Expand All @@ -4010,6 +4072,7 @@
#define PCI_DEVICE_ID_INTEL_CMP_SRAM 0x02ef
#define PCI_DEVICE_ID_INTEL_CMP_H_SRAM 0x06ef
#define PCI_DEVICE_ID_INTEL_TGL_SRAM 0xa0ef
#define PCI_DEVICE_ID_INTEL_TGL_H_SRAM 0x43ef
#define PCI_DEVICE_ID_INTEL_MCC_SRAM 0x4b7f
#define PCI_DEVICE_ID_INTEL_JSP_SRAM 0x4def
#define PCI_DEVICE_ID_INTEL_ADP_P_SRAM 0x7a6f
Expand All @@ -4033,6 +4096,7 @@
#define PCI_DEVICE_ID_INTEL_CMP_H_AUDIO 0x06c8
#define PCI_DEVICE_ID_INTEL_BSW_AUDIO 0x2284
#define PCI_DEVICE_ID_INTEL_TGL_AUDIO 0xa0c8
#define PCI_DEVICE_ID_INTEL_TGL_H_AUDIO 0x43c8
#define PCI_DEVICE_ID_INTEL_MCC_AUDIO 0x4b55
#define PCI_DEVICE_ID_INTEL_JSP_AUDIO 0x4dc8
#define PCI_DEVICE_ID_INTEL_ADP_S_AUDIO_1 0x7ad0
Expand Down Expand Up @@ -4071,6 +4135,7 @@
#define PCI_DEVICE_ID_INTEL_CMP_CSE0 0x02e0
#define PCI_DEVICE_ID_INTEL_CMP_H_CSE0 0x06e0
#define PCI_DEVICE_ID_INTEL_TGL_CSE0 0xa0e0
#define PCI_DEVICE_ID_INTEL_TGL_H_CSE0 0x43e0
#define PCI_DEVICE_ID_INTEL_MCC_CSE0 0x4b70
#define PCI_DEVICE_ID_INTEL_MCC_CSE1 0x4b71
#define PCI_DEVICE_ID_INTEL_MCC_CSE2 0x4b74
Expand Down Expand Up @@ -4103,6 +4168,7 @@
#define PCI_DEVICE_ID_INTEL_CMP_H_XDCI 0x06ee
#define PCI_DEVICE_ID_INTEL_TGP_LP_XDCI 0xa0ee
#define PCI_DEVICE_ID_INTEL_TGP_TCSS_XDCI 0x9a15
#define PCI_DEVICE_ID_INTEL_TGP_H_XDCI 0x43ee
#define PCI_DEVICE_ID_INTEL_MCC_XDCI 0x4b7e
#define PCI_DEVICE_ID_INTEL_JSP_XDCI 0x4dee
#define PCI_DEVICE_ID_INTEL_ADP_P_XDCI 0x51ee
Expand Down Expand Up @@ -4133,12 +4199,18 @@
#define PCI_DEVICE_ID_INTEL_TGL_TBT_RP1 0x9a25
#define PCI_DEVICE_ID_INTEL_TGL_TBT_RP2 0x9a27
#define PCI_DEVICE_ID_INTEL_TGL_TBT_RP3 0x9a29
#define PCI_DEVICE_ID_INTEL_TGL_H_TBT_RP0 0x9a2b
#define PCI_DEVICE_ID_INTEL_TGL_H_TBT_RP1 0x9a2d
#define PCI_DEVICE_ID_INTEL_TGL_H_TBT_RP2 0x9a2f
#define PCI_DEVICE_ID_INTEL_TGL_H_TBT_RP3 0x9a31
#define PCI_DEVICE_ID_INTEL_ADL_TBT_RP0 0x466e
#define PCI_DEVICE_ID_INTEL_ADL_TBT_RP1 0x463f
#define PCI_DEVICE_ID_INTEL_ADL_TBT_RP2 0x462f
#define PCI_DEVICE_ID_INTEL_ADL_TBT_RP3 0x461f
#define PCI_DEVICE_ID_INTEL_TGL_TBT_DMA0 0x9a1b
#define PCI_DEVICE_ID_INTEL_TGL_TBT_DMA1 0x9a1d
#define PCI_DEVICE_ID_INTEL_TGL_H_TBT_DMA0 0x9a1f
#define PCI_DEVICE_ID_INTEL_TGL_H_TBT_DMA1 0x9a21
#define PCI_DEVICE_ID_INTEL_ADL_TBT_DMA0 0x463e
#define PCI_DEVICE_ID_INTEL_ADL_TBT_DMA1 0x466d

Expand Down Expand Up @@ -4175,6 +4247,7 @@
#define PCI_DEVICE_ID_GrP_6SERIES_2_WIFI 0x7af0

#define PCI_DEVICE_ID_INTEL_TGL_IPU 0x9a19
#define PCI_DEVICE_ID_INTEL_TGL_H_IPU 0x9a39
#define PCI_DEVICE_ID_INTEL_JSL_IPU 0x4e19
#define PCI_DEVICE_ID_INTEL_ADL_IPU 0x465d

Expand Down Expand Up @@ -4203,6 +4276,13 @@
#define PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_1 0xa0f6
#define PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_2 0xa0f7
#define PCI_DEVICE_ID_INTEL_TGL_CNVI_BT_3 0xa0f8
#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_0 0x43f0
#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_1 0x43f1
#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_2 0x43f2
#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_WIFI_3 0x43f3
#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_BT_0 0x43f5
#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_BT_1 0x43f6
#define PCI_DEVICE_ID_INTEL_TGL_H_CNVI_BT_2 0x43f7

#define PCI_VENDOR_ID_COMPUTONE 0x8e0e
#define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291
Expand Down
2 changes: 1 addition & 1 deletion src/include/device/soundwire.h
View file
Expand Up @@ -76,7 +76,7 @@ enum mipi_class {
* @version: SoundWire specification version from &enum soundwire_version.
* @link_id: Zero-based SoundWire master link id.
* @unique_id: Unique ID for multiple slave devices on the same bus.
* @manufacturer_id: Manufacturer ID from include/device/mipi_ids.h.
* @manufacturer_id: Manufacturer ID from include/mipi/ids.h.
* @part_id: Vendor defined part ID.
* @class: MIPI class encoding in &enum mipi_class.
*/
Expand Down
205 changes: 1 addition & 204 deletions src/include/elog.h
View file
Expand Up @@ -3,214 +3,11 @@
#ifndef ELOG_H_
#define ELOG_H_

#include <commonlib/bsd/elog.h>
#include <stdint.h>

#define MAX_EVENT_SIZE 0x7F

/* End of log */
#define ELOG_TYPE_EOL 0xFF

/*
* Standard SMBIOS event log types below 0x80
*/
#define ELOG_TYPE_UNDEFINED_EVENT 0x00
#define ELOG_TYPE_SINGLE_BIT_ECC_MEM_ERR 0x01
#define ELOG_TYPE_MULTI_BIT_ECC_MEM_ERR 0x02
#define ELOG_TYPE_MEM_PARITY_ERR 0x03
#define ELOG_TYPE_BUS_TIMEOUT 0x04
#define ELOG_TYPE_IO_CHECK 0x05
#define ELOG_TYPE_SW_NMI 0x06
#define ELOG_TYPE_POST_MEM_RESIZE 0x07
#define ELOG_TYPE_POST_ERR 0x08
#define ELOG_TYPE_PCI_PERR 0x09
#define ELOG_TYPE_PCI_SERR 0x0A
#define ELOG_TYPE_CPU_FAIL 0x0B
#define ELOG_TYPE_EISA_TIMEOUT 0x0C
#define ELOG_TYPE_CORRECTABLE_MEMLOG_DIS 0x0D
#define ELOG_TYPE_LOG_DISABLED 0x0E
#define ELOG_TYPE_UNDEFINED_EVENT2 0x0F
#define ELOG_TYPE_SYS_LIMIT_EXCEED 0x10
#define ELOG_TYPE_ASYNC_HW_TIMER_EXPIRED 0x11
#define ELOG_TYPE_SYS_CONFIG_INFO 0x12
#define ELOG_TYPE_HDD_INFO 0x13
#define ELOG_TYPE_SYS_RECONFIG 0x14
#define ELOG_TYPE_CPU_ERROR 0x15
#define ELOG_TYPE_LOG_CLEAR 0x16
#define ELOG_TYPE_BOOT 0x17

/*
* Extended defined OEM event types start at 0x80
*/

/* OS/kernel events */
#define ELOG_TYPE_OS_EVENT 0x81

/* Last event from coreboot */
#define ELOG_TYPE_OS_BOOT 0x90

/* Embedded controller event */
#define ELOG_TYPE_EC_EVENT 0x91

/* Power */
#define ELOG_TYPE_POWER_FAIL 0x92
#define ELOG_TYPE_SUS_POWER_FAIL 0x93
#define ELOG_TYPE_PWROK_FAIL 0x94
#define ELOG_TYPE_SYS_PWROK_FAIL 0x95
#define ELOG_TYPE_POWER_ON 0x96
#define ELOG_TYPE_POWER_BUTTON 0x97
#define ELOG_TYPE_POWER_BUTTON_OVERRIDE 0x98

/* Reset */
#define ELOG_TYPE_RESET_BUTTON 0x99
#define ELOG_TYPE_SYSTEM_RESET 0x9a
#define ELOG_TYPE_RTC_RESET 0x9b
#define ELOG_TYPE_TCO_RESET 0x9c

/* Sleep/Wake */
#define ELOG_TYPE_ACPI_ENTER 0x9d
/*
* Deep Sx wake variant is provided below - 0xad
* Sleep/"wake pending" event log provided below - 0xb1 - 0x01/0x02
*/

#define ELOG_TYPE_ACPI_WAKE 0x9e
#define ELOG_TYPE_WAKE_SOURCE 0x9f
#define ELOG_WAKE_SOURCE_PCIE 0x00
#define ELOG_WAKE_SOURCE_PME 0x01
#define ELOG_WAKE_SOURCE_PME_INTERNAL 0x02
#define ELOG_WAKE_SOURCE_RTC 0x03
#define ELOG_WAKE_SOURCE_GPE 0x04
#define ELOG_WAKE_SOURCE_SMBUS 0x05
#define ELOG_WAKE_SOURCE_PWRBTN 0x06
#define ELOG_WAKE_SOURCE_PME_HDA 0x07
#define ELOG_WAKE_SOURCE_PME_GBE 0x08
#define ELOG_WAKE_SOURCE_PME_EMMC 0x09
#define ELOG_WAKE_SOURCE_PME_SDCARD 0x0a
#define ELOG_WAKE_SOURCE_PME_PCIE1 0x0b
#define ELOG_WAKE_SOURCE_PME_PCIE2 0x0c
#define ELOG_WAKE_SOURCE_PME_PCIE3 0x0d
#define ELOG_WAKE_SOURCE_PME_PCIE4 0x0e
#define ELOG_WAKE_SOURCE_PME_PCIE5 0x0f
#define ELOG_WAKE_SOURCE_PME_PCIE6 0x10
#define ELOG_WAKE_SOURCE_PME_PCIE7 0x11
#define ELOG_WAKE_SOURCE_PME_PCIE8 0x12
#define ELOG_WAKE_SOURCE_PME_PCIE9 0x13
#define ELOG_WAKE_SOURCE_PME_PCIE10 0x14
#define ELOG_WAKE_SOURCE_PME_PCIE11 0x15
#define ELOG_WAKE_SOURCE_PME_PCIE12 0x16
#define ELOG_WAKE_SOURCE_PME_SATA 0x17
#define ELOG_WAKE_SOURCE_PME_CSE 0x18
#define ELOG_WAKE_SOURCE_PME_CSE2 0x19
#define ELOG_WAKE_SOURCE_PME_CSE3 0x1a
#define ELOG_WAKE_SOURCE_PME_XHCI 0x1b
#define ELOG_WAKE_SOURCE_PME_XDCI 0x1c
#define ELOG_WAKE_SOURCE_PME_XHCI_USB_2 0x1d
#define ELOG_WAKE_SOURCE_PME_XHCI_USB_3 0x1e
#define ELOG_WAKE_SOURCE_PME_WIFI 0x1f
#define ELOG_WAKE_SOURCE_PME_PCIE13 0x20
#define ELOG_WAKE_SOURCE_PME_PCIE14 0x21
#define ELOG_WAKE_SOURCE_PME_PCIE15 0x22
#define ELOG_WAKE_SOURCE_PME_PCIE16 0x23
#define ELOG_WAKE_SOURCE_PME_PCIE17 0x24
#define ELOG_WAKE_SOURCE_PME_PCIE18 0x25
#define ELOG_WAKE_SOURCE_PME_PCIE19 0x26
#define ELOG_WAKE_SOURCE_PME_PCIE20 0x27
#define ELOG_WAKE_SOURCE_PME_PCIE21 0x28
#define ELOG_WAKE_SOURCE_PME_PCIE22 0x29
#define ELOG_WAKE_SOURCE_PME_PCIE23 0x2a
#define ELOG_WAKE_SOURCE_PME_PCIE24 0x2b
#define ELOG_WAKE_SOURCE_GPIO 0x2c
#define ELOG_WAKE_SOURCE_PME_TBT 0x2d
#define ELOG_WAKE_SOURCE_PME_TCSS_XHCI 0x2e
#define ELOG_WAKE_SOURCE_PME_TCSS_XDCI 0x2f
#define ELOG_WAKE_SOURCE_PME_TCSS_DMA 0x30

struct elog_event_data_wake {
u8 source;
u32 instance;
} __packed;

/* Chrome OS related events */
#define ELOG_TYPE_CROS_DEVELOPER_MODE 0xa0
#define ELOG_TYPE_CROS_RECOVERY_MODE 0xa1
#define ELOG_CROS_RECOVERY_MODE_BUTTON 0x02

/* Management Engine Events */
#define ELOG_TYPE_MANAGEMENT_ENGINE 0xa2
#define ELOG_TYPE_MANAGEMENT_ENGINE_EXT 0xa4
struct elog_event_data_me_extended {
u8 current_working_state;
u8 operation_state;
u8 operation_mode;
u8 error_code;
u8 progress_code;
u8 current_pmevent;
u8 current_state;
} __packed;

/* Last post code from previous boot */
#define ELOG_TYPE_LAST_POST_CODE 0xa3
#define ELOG_TYPE_POST_EXTRA 0xa6

/* EC Shutdown Reason */
#define ELOG_TYPE_EC_SHUTDOWN 0xa5

/* ARM/generic versions of sleep/wake - These came from another firmware
* apparently, but not all the firmware sources were updated so that the
* elog namespace was coherent. */
#define ELOG_TYPE_SLEEP 0xa7
#define ELOG_TYPE_WAKE 0xa8
#define ELOG_TYPE_FW_WAKE 0xa9

/* Memory Cache Update */
#define ELOG_TYPE_MEM_CACHE_UPDATE 0xaa
#define ELOG_MEM_CACHE_UPDATE_SLOT_NORMAL 0
#define ELOG_MEM_CACHE_UPDATE_SLOT_RECOVERY 1
#define ELOG_MEM_CACHE_UPDATE_SLOT_VARIABLE 2
#define ELOG_MEM_CACHE_UPDATE_STATUS_SUCCESS 0
#define ELOG_MEM_CACHE_UPDATE_STATUS_FAIL 1
struct elog_event_mem_cache_update {
u8 slot;
u8 status;
} __packed;

/* CPU Thermal Trip */
#define ELOG_TYPE_THERM_TRIP 0xab

/* Cr50 */
#define ELOG_TYPE_CR50_UPDATE 0xac

/* Deep Sx wake variant */
#define ELOG_TYPE_ACPI_DEEP_WAKE 0xad

/* EC Device Event */
#define ELOG_TYPE_EC_DEVICE_EVENT 0xae
#define ELOG_EC_DEVICE_EVENT_TRACKPAD 0x01
#define ELOG_EC_DEVICE_EVENT_DSP 0x02
#define ELOG_EC_DEVICE_EVENT_WIFI 0x03

/* S0ix sleep/wake */
#define ELOG_TYPE_S0IX_ENTER 0xaf
#define ELOG_TYPE_S0IX_EXIT 0xb0

/* Extended events */
#define ELOG_TYPE_EXTENDED_EVENT 0xb1
#define ELOG_SLEEP_PENDING_PM1_WAKE 0x01
#define ELOG_SLEEP_PENDING_GPE0_WAKE 0x02

/* Cr50 reset to enable TPM */
#define ELOG_TYPE_CR50_NEED_RESET 0xb2

/* CSME-Initiated Host Reset */
#define ELOG_TYPE_MI_HRPD 0xb3
#define ELOG_TYPE_MI_HRPC 0xb4
#define ELOG_TYPE_MI_HR 0xb5

struct elog_event_extended_event {
u8 event_type;
u32 event_complement;
} __packed;

#if CONFIG(ELOG)
/* Eventlog backing storage must be initialized before calling elog_init(). */
extern int elog_init(void);
Expand Down
6 changes: 3 additions & 3 deletions src/include/device/mipi_ids.h → src/include/mipi/ids.h
View file
Expand Up @@ -4,8 +4,8 @@
* MIPI Alliance Manufacturer IDs from https://mid.mipi.org
*/

#ifndef __DEVICE_MIPI_IDS_H__
#define __DEVICE_MIPI_IDS_H__
#ifndef __MIPI_IDS_H__
#define __MIPI_IDS_H__

/* Board Members */
#define MIPI_MFG_ID_INTEL 0x0105
Expand All @@ -26,4 +26,4 @@
#define MIPI_MFG_ID_MAXIM 0x019f
#define MIPI_DEV_ID_MAXIM_MAX98373 0x8373

#endif /* __DEVICE_MIPI_IDS_H__ */
#endif /* __MIPI_IDS_H__ */
55 changes: 55 additions & 0 deletions src/include/mipi/panel.h
View file
@@ -0,0 +1,55 @@
/* SPDX-License-Identifier: GPL-2.0-only */

#ifndef __MIPI_PANEL_H__
#define __MIPI_PANEL_H__

#include <edid.h>
#include <types.h>

/* Definitions for cmd in panel_init_command */
enum panel_init_cmd {
PANEL_CMD_END = 0,
PANEL_CMD_DELAY = 1,
PANEL_CMD_GENERIC = 2,
PANEL_CMD_DCS = 3,
};

struct panel_init_command {
u8 cmd;
u8 len;
u8 data[];
};

/*
* The data to be serialized and put into CBFS.
* Note some fields, for example edid.mode.name, were actually pointers and
* cannot be really serialized.
*/
struct panel_serializable_data {
struct edid edid; /* edid info of this panel */
u8 init[]; /* A packed array of panel_init_command */
};

typedef cb_err_t (*mipi_cmd_func_t)(enum panel_init_cmd cmd, const u8 *data, u8 len);

/* Parse a command array and call cmd_func() for each entry. Delays get handled internally. */
cb_err_t mipi_panel_parse_init_commands(const void *buf, mipi_cmd_func_t cmd_func);

#define PANEL_DCS(...) \
PANEL_CMD_DCS, \
sizeof((u8[]){__VA_ARGS__}), \
__VA_ARGS__

#define PANEL_GENERIC(...) \
PANEL_CMD_GENERIC, \
sizeof((u8[]){__VA_ARGS__}), \
__VA_ARGS__

#define PANEL_DELAY(delay) \
PANEL_CMD_DELAY, \
delay

#define PANEL_END \
PANEL_CMD_END

#endif /* __MIPI_PANEL_H__ */
93 changes: 68 additions & 25 deletions src/include/sar.h
View file
Expand Up @@ -4,42 +4,85 @@

#include <stdint.h>

#define NUM_SAR_LIMITS 4
#define BYTES_PER_SAR_LIMIT 10
enum {
SAR_FCC,
SAR_EUROPE_JAPAN,
SAR_REST_OF_WORLD,
SAR_NUM_WGDS_GROUPS
#define MAX_ANT_GAINS_REVISION 2
#define MAX_DENYLIST_ENTRY 16
#define MAX_DSAR_SET_COUNT 3
#define MAX_GEO_OFFSET_REVISION 3
#define MAX_PROFILE_COUNT 5
#define MAX_SAR_REVISION 2
#define REVISION_SIZE 1
#define SAR_REV0_CHAINS_COUNT 2
#define SAR_REV0_SUBBANDS_COUNT 5
#define SAR_FILE_REVISION 1
#define SAR_STR_PREFIX "$SAR"
#define SAR_STR_PREFIX_SIZE 4

struct geo_profile {
uint8_t revision;
uint8_t chains_count;
uint8_t bands_count;
uint8_t wgds_table[0];
} __packed;

struct sar_profile {
uint8_t revision;
uint8_t dsar_set_count;
uint8_t chains_count;
uint8_t subbands_count;
uint8_t sar_table[0];
} __packed;

struct gain_profile {
uint8_t revision;
uint8_t mode;
uint8_t chains_count;
uint8_t bands_count;
uint8_t ppag_table[0];
} __packed;

struct avg_profile {
uint8_t revision;
uint8_t tas_selection;
uint8_t tas_list_size;
uint8_t deny_list_entry[MAX_DENYLIST_ENTRY];
} __packed;

struct dsm_profile {
uint32_t supported_functions;
uint32_t disable_active_sdr_channels;
uint32_t support_indonesia_5g_band;
uint32_t support_ultra_high_band;
uint32_t regulatory_configurations;
uint32_t uart_configurations;
uint32_t enablement_11ax;
uint32_t unii_4;
};

struct wifi_sar_delta_table {
struct sar_header {
char marker[SAR_STR_PREFIX_SIZE];
uint8_t version;
struct {
uint8_t power_max_2400mhz;
uint8_t power_chain_a_2400mhz;
uint8_t power_chain_b_2400mhz;
uint8_t power_max_5200mhz;
uint8_t power_chain_a_5200mhz;
uint8_t power_chain_b_5200mhz;
} __packed group[SAR_NUM_WGDS_GROUPS];
uint16_t offsets[0];
} __packed;

/* Wifi SAR limit table structure */
struct wifi_sar_limits {
/* Total 4 SAR limit sets, each has 10 bytes */
uint8_t sar_limit[NUM_SAR_LIMITS][BYTES_PER_SAR_LIMIT];
struct wifi_sar_delta_table wgds;
} __packed;
union wifi_sar_limits {
struct {
struct sar_profile *sar;
struct geo_profile *wgds;
struct gain_profile *ppag;
struct avg_profile *wtas;
struct dsm_profile *dsm;
};
void *profile[MAX_PROFILE_COUNT];
};

/*
* Retrieve the SAR limits data from VPD and decode it.
* Retrieve the wifi ACPI configuration data from CBFS and decode it
* sar_limits: Pointer to wifi_sar_limits where the resulted data is stored
*
* Returns: 0 on success, -1 on errors (The VPD entry doesn't exist, or the
* VPD entry contains non-heximal value.)
* Returns: 0 on success, -1 on errors (The .hex file doesn't exist, or the decode failed)
*/
int get_wifi_sar_limits(struct wifi_sar_limits *sar_limits);
int get_wifi_sar_limits(union wifi_sar_limits *sar_limits);

#define WIFI_SAR_CBFS_DEFAULT_FILENAME "wifi_sar_defaults.hex"

Expand Down
10 changes: 1 addition & 9 deletions src/include/thread.h
View file
Expand Up @@ -38,7 +38,7 @@ int thread_run_until(struct thread_handle *handle, enum cb_err (*func)(void *),
/* Waits until the thread has terminated and returns the error code */
enum cb_err thread_join(struct thread_handle *handle);

#if ENV_RAMSTAGE && CONFIG(COOP_MULTITASKING)
#if (ENV_RAMSTAGE || ENV_ROMSTAGE) && CONFIG(COOP_MULTITASKING)

struct thread {
int id;
Expand All @@ -51,13 +51,6 @@ struct thread {
struct thread_handle *handle;
};

void threads_initialize(void);
/* Get the base of the thread stacks.
* Returns pointer to CONFIG_NUM_THREADS*CONFIG_STACK_SIZE contiguous bytes
* aligned to CONFIG_STACK_SIZE, or NULL.
*/
void *arch_get_thread_stackbase(void);

/* Return 0 on successful yield, < 0 when thread did not yield. */
int thread_yield(void);

Expand Down Expand Up @@ -93,7 +86,6 @@ asmlinkage void switch_to_thread(uintptr_t new_stack, uintptr_t *saved_stack);
void arch_prepare_thread(struct thread *t,
asmlinkage void (*thread_entry)(void *), void *arg);
#else
static inline void threads_initialize(void) {}
static inline int thread_yield(void)
{
return -1;
Expand Down
8 changes: 6 additions & 2 deletions src/lib/Makefile.inc
View file
Expand Up @@ -149,8 +149,6 @@ ramstage-$(CONFIG_COVERAGE) += libgcov.c
ramstage-y += edid.c
ramstage-y += edid_fill_fb.c
ramstage-y += memrange.c
ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c
ramstage-$(CONFIG_TIMER_QUEUE) += timer_queue.c
ramstage-$(CONFIG_GENERIC_GPIO_LIB) += gpio.c
ramstage-$(CONFIG_GENERIC_UDELAY) += timer.c
ramstage-y += b64_decode.c
Expand All @@ -160,6 +158,12 @@ ramstage-$(CONFIG_FLATTENED_DEVICE_TREE) += device_tree.c
ramstage-$(CONFIG_PAYLOAD_FIT_SUPPORT) += fit.c
ramstage-$(CONFIG_PAYLOAD_FIT_SUPPORT) += fit_payload.c

romstage-$(CONFIG_TIMER_QUEUE) += timer_queue.c
ramstage-$(CONFIG_TIMER_QUEUE) += timer_queue.c

romstage-$(CONFIG_COOP_MULTITASKING) += thread.c
ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c

romstage-y += cbmem_common.c
romstage-y += imd_cbmem.c
romstage-y += imd.c
Expand Down