CHANGELOG.md

@@ -4,6 +4,10 @@ Change log for PC Engines fork of SeaBIOS
 Fourth digit in release number means PC Engines patch.
 
 ## [Unreleased]
+## [rel-1.12.0.1] - 2019-01-09
+### Changed
+- rebased on SeaBIOS rel-1.12.0 stable release
+
 ## [rel-1.11.0.7] - 2018-12-03
 ### Added
 - enabled COM2 redirection option
@@ -73,7 +77,8 @@ Fourth digit in release number means PC Engines patch.
 ### Fixed
 - prevented from printing character multiple times
 
-[Unreleased]: https://github.com/pcengines/seabios/compare/rel-1.11.0.7...apu_support
+[Unreleased]: https://github.com/pcengines/seabios/compare/rel-1.12.0.1...apu_support
+[rel-1.12.0.1]: https://github.com/pcengines/seabios/compare/rel-1.11.0.7...rel-1.12.0.1
 [rel-1.11.0.7]: https://github.com/pcengines/seabios/compare/rel-1.11.0.6...rel-1.11.0.7
 [rel-1.11.0.6]: https://github.com/pcengines/seabios/compare/rel-1.11.0.5...rel-1.11.0.6
 [rel-1.11.0.5]: https://github.com/pcengines/seabios/compare/rel-1.11.0.4...rel-1.11.0.5

Makefile

@@ -213,7 +213,7 @@ SRCVGA=src/output.c src/string.c src/hw/pci.c src/hw/serialio.c \
     vgasrc/vgafonts.c vgasrc/vbe.c \
     vgasrc/stdvga.c vgasrc/stdvgamodes.c vgasrc/stdvgaio.c \
     vgasrc/clext.c vgasrc/bochsvga.c vgasrc/geodevga.c \
-    src/fw/coreboot.c vgasrc/cbvga.c
+    src/fw/coreboot.c vgasrc/cbvga.c vgasrc/bochsdisplay.c vgasrc/ramfb.c
 
 ifeq "$(CONFIG_VGA_FIXUP_ASM)" "y"
 $(OUT)vgaccode16.raw.s: $(OUT)autoconf.h $(patsubst %.c, $(OUT)%.o,$(SRCVGA)) ; $(call whole-compile, $(filter-out -fomit-frame-pointer,$(CFLAGS16)) -fno-omit-frame-pointer -S -Isrc, $(SRCVGA),$@)

docs/Download.md

@@ -1,16 +1,16 @@
 SeaBIOS may be distributed under the terms of the [GNU
-LGPLv3](http://www.gnu.org/licenses/lgpl-3.0-standalone.html) license.
+LGPLv3](https://www.gnu.org/licenses/lgpl-3.0-standalone.html) license.
 Both source code and binaries are available.
 
 Latest source code
 ==================
 
-The SeaBIOS project uses the [git](http://git-scm.com/) revision
+The SeaBIOS project uses the [git](https://git-scm.com/) revision
 control system. To download the latest source from revision control,
 run:
 
 ```
-$ git clone git://git.seabios.org/seabios.git seabios
+$ git clone https://git.seabios.org/seabios.git
 $ cd seabios
 ```
 
@@ -22,6 +22,6 @@ Released versions
 
 Released versions of the source code are available at:
 
-<http://code.coreboot.org/p/seabios/downloads/>
+<https://www.seabios.org/downloads/>
 
 Please see [releases](Releases) for information on each release.

docs/Releases.md

@@ -1,6 +1,17 @@
 History of SeaBIOS releases. Please see [download](Download) for
 information on obtaining these releases.
 
+SeaBIOS 1.12.0
+==============
+
+Available on 20181117. Major changes in this release:
+
+* Initial support for "TPM CRB" hardware
+* Improved cdrom media reporting in the boot menu on QEMU
+* Improved floppy support on real floppy hardware
+* SeaVGABIOS support for QEMU "bochs-display" and QEMU "ramfb" displays
+* Several bug fixes and code cleanups
+
 SeaBIOS 1.11.0
 ==============
 
@@ -14,6 +25,16 @@ Available on 20171110. Major changes in this release:
 * Improved coreboot vga (cbvga) mode setting compatibility
 * Several bug fixes and code cleanups
 
+SeaBIOS 1.11.1
+--------------
+
+Available on 20180319. Stable release containing only bug fixes.
+
+SeaBIOS 1.11.2
+--------------
+
+Available on 20180702. Stable release containing only bug fixes.
+
 SeaBIOS 1.10.0
 ==============
 

docs/Runtime_config.md

@@ -185,6 +185,7 @@ There are several additional configuration options available in the
 | s3-resume-vga-init  | Set this to a non-zero value to instruct SeaBIOS to run the vga rom on an S3 resume.
 | screen-and-debug    | Set this to a zero value to instruct SeaBIOS to not write characters it sends to the screen to the debug ports. This can be useful when using sgabios.
 | advertise-serial-debug-port | If using a serial debug port, one can set this file to a zero value to prevent SeaBIOS from listing that serial port as available for operating system use. This can be useful when running old DOS programs that are known to reset the baud rate of all advertised serial ports.
+| sercon-port         | Set this to the IO address of a serial port to enable SeaBIOS' VGA adapter emulation on the given serial port.
 | floppy0             | Set this to the type of the first floppy drive in the system (only type 4 for 3.5 inch drives is supported).
 | floppy1             | The type of the second floppy drive in the system. See the description of **floppy0** for more info.
 | threads             | By default, SeaBIOS will parallelize hardware initialization during bootup to reduce boot time. Multiple hardware devices can be initialized in parallel between vga initialization and option rom initialization. One can set this file to a value of zero to force hardware initialization to run serially. Alternatively, one can set this file to 2 to enable early hardware initialization that runs in parallel with vga, option rom initialization, and the boot menu.

scripts/buildversion.py

@@ -36,7 +36,7 @@ def git_version():
     if not os.path.exists('.git'):
         logging.debug("No '.git' file/directory found")
         return ""
-    ver = check_output("git describe --tags --long --dirty").strip()
+    ver = check_output("git describe --always --tags --long --dirty").strip()
     logging.debug("Got git version: %s" % (repr(ver),))
     return ver
 

src/boot.c

@@ -424,6 +424,16 @@ boot_add_hd(struct drive_s *drive, const char *desc, int prio)
 void
 boot_add_cd(struct drive_s *drive, const char *desc, int prio)
 {
+    if (GET_GLOBAL(PlatformRunningOn) & PF_QEMU) {
+        // We want short boot times.  But on physical hardware even
+        // the test unit ready can take several seconds.  So do media
+        // access on qemu only, where we know it will be fast.
+        char *extra = cdrom_media_info(drive);
+        if (extra) {
+            desc = znprintf(MAXDESCSIZE, "%s (%s)", desc, extra);
+            free(extra);
+        }
+    }
     bootentry_add(IPL_TYPE_CDROM, defPrio(prio, DefaultCDPrio)
                   , (u32)drive, desc);
 }

src/cdrom.c

@@ -274,3 +274,49 @@ cdrom_boot(struct drive_s *drive)
 
     return 0;
 }
+
+// check if media is present and the drive is bootable.
+// in case it is return the volume label.
+char*
+cdrom_media_info(struct drive_s *drive)
+{
+    ASSERT32FLAT();
+
+    struct disk_op_s dop;
+    memset(&dop, 0, sizeof(dop));
+    dop.drive_fl = drive;
+
+    int ret = scsi_is_ready(&dop);
+    if (ret)
+        return NULL;
+
+    // Read the Boot Record Volume Descriptor
+    u8 buffer[CDROM_SECTOR_SIZE];
+    dop.command = CMD_READ;
+    dop.lba = 0x11;
+    dop.count = 1;
+    dop.buf_fl = buffer;
+    ret = process_op(&dop);
+    if (ret)
+        return NULL;
+
+    // Is it bootable?
+    if (buffer[0])
+        return NULL;
+    if (strcmp((char*)&buffer[1], "CD001\001EL TORITO SPECIFICATION") != 0)
+        return NULL;
+
+    // Read the Primary Volume Descriptor
+    dop.command = CMD_READ;
+    dop.lba = 0x10;
+    dop.count = 1;
+    dop.buf_fl = buffer;
+    ret = process_op(&dop);
+    if (ret)
+        return NULL;
+
+    // Read volume id, trim trailing spaces
+    char *volume = znprintf(30, "%s", buffer + 40);
+    nullTrailingSpace(volume);
+    return volume;
+}

src/fw/paravirt.c

@@ -513,12 +513,6 @@ qemu_cfg_legacy(void)
     qemu_romfile_add("etc/irq0-override", QEMU_CFG_IRQ0_OVERRIDE, 0, 1);
     qemu_romfile_add("etc/max-cpus", QEMU_CFG_MAX_CPUS, 0, 2);
 
-    // serial console
-    u16 nogfx = 0;
-    qemu_cfg_read_entry(&nogfx, QEMU_CFG_NOGRAPHIC, sizeof(nogfx));
-    if (nogfx)
-        const_romfile_add_int("etc/sercon-port", PORT_SERIAL1);
-
     // NUMA data
     u64 numacount;
     qemu_cfg_read_entry(&numacount, QEMU_CFG_NUMA, sizeof(numacount));
@@ -620,4 +614,11 @@ void qemu_cfg_init(void)
         acpi_pm_base = 0x0600;
         dprintf(1, "Moving pm_base to 0x%x\n", acpi_pm_base);
     }
+
+    // serial console
+    u16 nogfx = 0;
+    qemu_cfg_read_entry(&nogfx, QEMU_CFG_NOGRAPHIC, sizeof(nogfx));
+    if (nogfx && !romfile_find("etc/sercon-port")
+        && !romfile_find("vgaroms/sgabios.bin"))
+        const_romfile_add_int("etc/sercon-port", PORT_SERIAL1);
 }

src/fw/pciinit.c

@@ -525,29 +525,38 @@ static void pci_bios_init_platform(void)
 
 static u8 pci_find_resource_reserve_capability(u16 bdf)
 {
-    if (pci_config_readw(bdf, PCI_VENDOR_ID) == PCI_VENDOR_ID_REDHAT &&
-        pci_config_readw(bdf, PCI_DEVICE_ID) ==
-                PCI_DEVICE_ID_REDHAT_ROOT_PORT) {
-        u8 cap = 0;
-        do {
-            cap = pci_find_capability(bdf, PCI_CAP_ID_VNDR, cap);
-        } while (cap &&
-                 pci_config_readb(bdf, cap + PCI_CAP_REDHAT_TYPE_OFFSET) !=
-                        REDHAT_CAP_RESOURCE_RESERVE);
-        if (cap) {
-            u8 cap_len = pci_config_readb(bdf, cap + PCI_CAP_FLAGS);
-            if (cap_len < RES_RESERVE_CAP_SIZE) {
-                dprintf(1, "PCI: QEMU resource reserve cap length %d is invalid\n",
-                        cap_len);
-            }
-        } else {
-            dprintf(1, "PCI: invalid QEMU resource reserve cap offset\n");
+    u16 device_id;
+
+    if (pci_config_readw(bdf, PCI_VENDOR_ID) != PCI_VENDOR_ID_REDHAT) {
+        dprintf(3, "PCI: This is non-QEMU bridge.\n");
+        return 0;
+    }
+
+    device_id = pci_config_readw(bdf, PCI_DEVICE_ID);
+
+    if (device_id != PCI_DEVICE_ID_REDHAT_ROOT_PORT &&
+        device_id != PCI_DEVICE_ID_REDHAT_BRIDGE) {
+        dprintf(1, "PCI: QEMU resource reserve cap device ID doesn't match.\n");
+        return 0;
+    }
+    u8 cap = 0;
+
+    do {
+        cap = pci_find_capability(bdf, PCI_CAP_ID_VNDR, cap);
+    } while (cap &&
+             pci_config_readb(bdf, cap + PCI_CAP_REDHAT_TYPE_OFFSET) !=
+                              REDHAT_CAP_RESOURCE_RESERVE);
+    if (cap) {
+        u8 cap_len = pci_config_readb(bdf, cap + PCI_CAP_FLAGS);
+        if (cap_len < RES_RESERVE_CAP_SIZE) {
+            dprintf(1, "PCI: QEMU resource reserve cap length %d is invalid\n",
+                    cap_len);
+            return 0;
         }
-        return cap;
     } else {
         dprintf(1, "PCI: QEMU resource reserve cap not found\n");
-        return 0;
     }
+    return cap;
 }
 
 /****************************************************************
@@ -619,13 +628,11 @@ pci_bios_init_bus_rec(int bus, u8 *pci_bus)
                                 res_bus);
                         res_bus = 0;
                     }
-                }
-                if (secbus + res_bus > *pci_bus) {
-                    dprintf(1, "PCI: QEMU resource reserve cap: bus = %u\n",
-                            res_bus);
-                    res_bus = secbus + res_bus;
-                } else {
-                    res_bus = *pci_bus;
+                    if (secbus + res_bus > *pci_bus) {
+                        dprintf(1, "PCI: QEMU resource reserve cap: bus = %u\n",
+                                res_bus);
+                        res_bus = secbus + res_bus;
+                    }
                 }
             }
             dprintf(1, "PCI: subordinate bus = 0x%x -> 0x%x\n",

src/fw/shadow.c

@@ -173,21 +173,27 @@ qemu_reboot(void)
         return;
     // QEMU doesn't map 0xc0000-0xfffff back to the original rom on a
     // reset, so do that manually before invoking a hard reset.
-    void *cstart = VSYMBOL(code32flat_start), *cend = VSYMBOL(code32flat_end);
-    void *hrp = &HaveRunPost;
-    if (readl(hrp + BIOS_SRC_OFFSET)) {
-        // Some old versions of KVM don't store a pristine copy of the
-        // BIOS in high memory.  Try to shutdown the machine instead.
-        dprintf(1, "Unable to hard-reboot machine - attempting shutdown.\n");
-        apm_shutdown();
+    void *flash = (void*)BIOS_SRC_OFFSET;
+    u32 hrp = (u32)&HaveRunPost;
+    if (readl(flash + hrp)) {
+        // There isn't a pristine copy of the BIOS at 0xffff0000 to copy
+        if (HaveRunPost == 3) {
+            // In a reboot loop.  Try to shutdown the machine instead.
+            dprintf(1, "Unable to hard-reboot machine - attempting shutdown.\n");
+            apm_shutdown();
+        }
+        make_bios_writable();
+        HaveRunPost = 3;
+    } else {
+        // Copy the BIOS making sure to only reset HaveRunPost at end
+        make_bios_writable();
+        u32 cstart = SYMBOL(code32flat_start), cend = SYMBOL(code32flat_end);
+        memcpy((void*)cstart, flash + cstart, hrp - cstart);
+        memcpy((void*)hrp + 4, flash + hrp + 4, cend - (hrp + 4));
+        barrier();
+        HaveRunPost = 0;
+        barrier();
     }
-    // Copy the BIOS making sure to only reset HaveRunPost at end
-    make_bios_writable();
-    memcpy(cstart, cstart + BIOS_SRC_OFFSET, hrp - cstart);
-    memcpy(hrp + 4, hrp + 4 + BIOS_SRC_OFFSET, cend - (hrp + 4));
-    barrier();
-    HaveRunPost = 0;
-    barrier();
 
     // Request a QEMU system reset.  Do the reset in this function as
     // the BIOS code was overwritten above and not all BIOS

src/fw/ssdt-misc.dsl

@@ -1,6 +1,6 @@
 ACPI_EXTRACT_ALL_CODE ssdp_misc_aml
 
-DefinitionBlock ("ssdt-misc.aml", "SSDT", 0x01, "BXPC", "BXSSDTSUSP", 0x1)
+DefinitionBlock ("ssdt-misc.aml", "SSDT", 0x01, "BXPC", "BXSSDTSU", 0x1)
 {
 
 /****************************************************************

src/fw/ssdt-pcihp.dsl

@@ -1,6 +1,6 @@
 ACPI_EXTRACT_ALL_CODE ssdp_pcihp_aml
 
-DefinitionBlock ("ssdt-pcihp.aml", "SSDT", 0x01, "BXPC", "BXSSDTPCIHP", 0x1)
+DefinitionBlock ("ssdt-pcihp.aml", "SSDT", 0x01, "BXPC", "BXSSDTPC", 0x1)
 {
 
 /****************************************************************