CHANGELOG.md

@@ -4,6 +4,13 @@ Change log for PC Engines fork of SeaBIOS
 Fourth digit in release number means PC Engines patch.
 
 ## [Unreleased]
+## [rel-1.12.1.1] - 2019-04-03
+### Changed
+- rebased on SeaBIOS official repository commit f4c6e4c
+
+### Added
+- [rebase introduced new TPM menu option to enable/disable PCR banks](https://github.com/pcengines/apu2-documentation/blob/master/docs/tpm_menu.md)
+
 ## [rel-1.12.0.1] - 2019-01-09
 ### Changed
 - rebased on SeaBIOS rel-1.12.0 stable release
@@ -77,7 +84,8 @@ Fourth digit in release number means PC Engines patch.
 ### Fixed
 - prevented from printing character multiple times
 
-[Unreleased]: https://github.com/pcengines/seabios/compare/rel-1.12.0.1...apu_support
+[Unreleased]: https://github.com/pcengines/seabios/compare/rel-1.12.1.1...apu_support
+[rel-1.12.1.1]: https://github.com/pcengines/seabios/compare/rel-1.12.0.1...rel-1.12.1.1
 [rel-1.12.0.1]: https://github.com/pcengines/seabios/compare/rel-1.11.0.7...rel-1.12.0.1
 [rel-1.11.0.7]: https://github.com/pcengines/seabios/compare/rel-1.11.0.6...rel-1.11.0.7
 [rel-1.11.0.6]: https://github.com/pcengines/seabios/compare/rel-1.11.0.5...rel-1.11.0.6

Makefile

@@ -212,7 +212,7 @@ SRCVGA=src/output.c src/string.c src/hw/pci.c src/hw/serialio.c \
     vgasrc/vgainit.c vgasrc/vgabios.c vgasrc/vgafb.c vgasrc/swcursor.c \
     vgasrc/vgafonts.c vgasrc/vbe.c \
     vgasrc/stdvga.c vgasrc/stdvgamodes.c vgasrc/stdvgaio.c \
-    vgasrc/clext.c vgasrc/bochsvga.c vgasrc/geodevga.c \
+    vgasrc/clext.c vgasrc/svgamodes.c vgasrc/atiext.c vgasrc/bochsvga.c vgasrc/geodevga.c \
     src/fw/coreboot.c vgasrc/cbvga.c vgasrc/bochsdisplay.c vgasrc/ramfb.c
 
 ifeq "$(CONFIG_VGA_FIXUP_ASM)" "y"

docs/Mailinglist.md

@@ -1,8 +1,14 @@
 For questions and general information about SeaBIOS, please subscribe
-to the [SeaBIOS mailing
-list](http://www.seabios.org/mailman/listinfo/seabios). If you're not
-subscribed, your post will be held temporarily for moderator approval
-(to combat spam).
+to the
+[SeaBIOS mailing list](https://mail.coreboot.org/postorius/lists/seabios.seabios.org/). It
+is necessary to subscribe to the list in order to send emails (to
+combat spam).
 
-A mailing list archive is available at
+A mailing list archive is available at:
+<https://mail.coreboot.org/hyperkitty/list/seabios@seabios.org/>
+
+Messages prior to January 2019 are archived at:
 <http://www.seabios.org/pipermail/seabios/>
+
+An unofficial archive is also available at:
+<https://www.mail-archive.com/seabios@seabios.org/>

src/bmp.c

@@ -56,10 +56,9 @@ typedef struct tagRGBQUAD {
 *   arrange horizontal pixel data, add extra space in the dest buffer
 *       for every line
 */
-static void raw_data_format_adjust_24bpp(u8 *src, u8 *dest, int width,
-                                        int height, int bytes_per_line_dest)
+static void raw_data_format_adjust(u8 *src, u8 *dest, int width,
+		int height, int bytes_per_line_src, int bytes_per_line_dest)
 {
-    int bytes_per_line_src = 3 * width;
     int i;
     for (i = 0 ; i < height ; i++) {
         memcpy(dest + i * bytes_per_line_dest,
@@ -95,22 +94,22 @@ int bmp_decode(struct bmp_decdata *bmp, unsigned char *data, int data_size)
 }
 
 /* get bmp properties */
-void bmp_get_size(struct bmp_decdata *bmp, int *width, int *height)
+void bmp_get_info(struct bmp_decdata *bmp, int *width, int *height, int *bpp)
 {
     *width = bmp->width;
     *height = bmp->height;
+    *bpp = bmp->bpp;
 }
 
 /* flush flat picture data to *pc */
-int bmp_show(struct bmp_decdata *bmp, unsigned char *pic, int width
-             , int height, int depth, int bytes_per_line_dest)
+int bmp_show(struct bmp_decdata *bmp, unsigned char *pic, int width,
+             int height, int depth, int bytes_per_line_dest)
 {
     if (bmp->datap == pic)
         return 0;
-    /* now only support 24bpp bmp file */
-    if ((depth == 24) && (bmp->bpp == 24)) {
-        raw_data_format_adjust_24bpp(bmp->datap, pic, width, height,
-                                        bytes_per_line_dest);
+    if ((depth == bmp->bpp) && (bmp->bpp%8 == 0)) {
+        raw_data_format_adjust(bmp->datap, pic, width, height,
+			(bmp->bpp/8)*width, bytes_per_line_dest);
         return 0;
     }
     return 1;

src/bootsplash.c

@@ -172,10 +172,10 @@ enable_bootsplash(void)
             dprintf(1, "bmp_decode failed with return code %d...\n", ret);
             goto done;
         }
-        bmp_get_size(bmp, &width, &height);
-        bpp_require = 24;
+        bmp_get_info(bmp, &width, &height, &bpp_require);
     }
-    /* jpeg would use 16 or 24 bpp video mode, BMP use 24bpp mode only */
+
+    // jpeg would use 16 or 24 bpp video mode, BMP uses 16/24/32 bpp mode.
 
     // Try to find a graphics mode with the corresponding dimensions.
     int videomode = find_videomode(vesa_info, mode_info, width, height,

src/fw/paravirt.c

@@ -75,6 +75,9 @@ static void qemu_detect(void)
     if (!CONFIG_QEMU_HARDWARE)
         return;
 
+    // Setup QEMU debug output port
+    qemu_debug_preinit();
+
     // check northbridge @ 00:00.0
     u16 v = pci_config_readw(0, PCI_VENDOR_ID);
     if (v == 0x0000 || v == 0xffff)

src/fw/paravirt.h

@@ -49,6 +49,9 @@ static inline int runningOnKVM(void) {
 // QEMU_CFG_DMA ID bit
 #define QEMU_CFG_VERSION_DMA    2
 
+// QEMU debugcon read value
+#define QEMU_DEBUGCON_READBACK  0xe9
+
 int qemu_cfg_enabled(void);
 int qemu_cfg_dma_enabled(void);
 void qemu_preinit(void);

src/hw/pvscsi.c

@@ -167,7 +167,7 @@ pvscsi_init_rings(void *iobase, struct pvscsi_ring_dsc_s **ring_dsc)
 {
     struct PVSCSICmdDescSetupRings cmd = {0,};
 
-    struct pvscsi_ring_dsc_s *dsc = memalign_high(PAGE_SIZE, sizeof(*dsc));
+    struct pvscsi_ring_dsc_s *dsc = malloc_high(sizeof(*dsc));
     if (!dsc) {
         warn_noalloc();
         return;

src/hw/serialio.c

@@ -103,11 +103,23 @@ serial_debug_flush(void)
 
 u16 DebugOutputPort VARFSEG = 0x402;
 
+void
+qemu_debug_preinit(void)
+{
+    /* Check if the QEMU debug output port is active */
+    if (CONFIG_DEBUG_IO &&
+        inb(GET_GLOBAL(DebugOutputPort)) != QEMU_DEBUGCON_READBACK)
+        DebugOutputPort = 0;
+}
+
 // Write a character to the special debugging port.
 void
 qemu_debug_putc(char c)
 {
-    if (CONFIG_DEBUG_IO && runningOnQEMU())
+    if (!CONFIG_DEBUG_IO || !runningOnQEMU())
+        return;
+    u16 port = GET_GLOBAL(DebugOutputPort);
+    if (port)
         // Send character to debug port.
-        outb(c, GET_GLOBAL(DebugOutputPort));
+        outb(c, port);
 }

src/hw/serialio.h

@@ -24,6 +24,7 @@ void serial_debug_preinit(void);
 void serial_debug_putc(char c);
 void serial_debug_flush(void);
 extern u16 DebugOutputPort;
+void qemu_debug_preinit(void);
 void qemu_debug_putc(char c);
 
 #endif // serialio.h

src/hw/usb-ehci.c

@@ -467,6 +467,7 @@ ehci_realloc_pipe(struct usbdevice_s *usbdev, struct usb_pipe *upipe
         // Use previously allocated pipe.
         struct ehci_pipe *pipe = container_of(usbpipe, struct ehci_pipe, pipe);
         ehci_desc2pipe(pipe, usbdev, epdesc);
+        pipe->qh.token = 0;
         return usbpipe;
     }
 

src/output.c

@@ -74,6 +74,9 @@ static struct putcinfo debuginfo = { debug_putc };
 static void
 screenc(char c)
 {
+    if (!MODESEGMENT && GET_IVT(0x10).segoff == FUNC16(entry_10).segoff)
+        // No need to thunk to 16bit mode if vgabios is not present
+        return;
     struct bregs br;
     memset(&br, 0, sizeof(br));
     br.flags = F_IF;

src/std/tcg.h

@@ -336,6 +336,12 @@ struct tpm_res_sha1complete {
 #define TPM2_ALG_SHA512             0x000d
 #define TPM2_ALG_SM3_256            0x0012
 
+#define TPM2_ALG_SHA1_FLAG          (1 << 0)
+#define TPM2_ALG_SHA256_FLAG        (1 << 1)
+#define TPM2_ALG_SHA384_FLAG        (1 << 2)
+#define TPM2_ALG_SHA512_FLAG        (1 << 3)
+#define TPM2_ALG_SM3_256_FLAG       (1 << 4)
+
 /* TPM 2 command tags */
 #define TPM2_ST_NO_SESSIONS         0x8001
 #define TPM2_ST_SESSIONS            0x8002
@@ -345,8 +351,10 @@ struct tpm_res_sha1complete {
 #define TPM2_CC_Clear               0x126
 #define TPM2_CC_ClearControl        0x127
 #define TPM2_CC_HierarchyChangeAuth 0x129
+#define TPM2_CC_PCR_Allocate        0x12b
 #define TPM2_CC_SelfTest            0x143
 #define TPM2_CC_Startup             0x144
+#define TPM2_CC_Shutdown            0x145
 #define TPM2_CC_StirRandom          0x146
 #define TPM2_CC_GetCapability       0x17a
 #define TPM2_CC_GetRandom           0x17b
@@ -442,6 +450,15 @@ struct tpm2_res_getcapability {
     u8 data[0]; /* capability dependent data */
 } PACKED;
 
+struct tpm2_req_pcr_allocate {
+    struct tpm_req_header hdr;
+    u32 authhandle;
+    u32 authblocksize;
+    struct tpm2_authblock authblock;
+    u32 count;
+    u8 tpms_pcr_selections[4];
+} PACKED;
+
 struct tpms_pcr_selection {
     u16 hashAlg;
     u8 sizeOfSelect;