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Linus Torvalds
Apr 16, 2005
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/*
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* Copyright (C) 1996-2001 Linus Torvalds & author (see below)
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*/
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/*
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* Version 0.03 Cleaned auto-tune, added probe
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* Version 0.04 Added second channel tuning
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* Version 0.05 Enhanced tuning ; added qd6500 support
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* Version 0.06 Added dos driver's list
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* Version 0.07 Second channel bug fix
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*
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* QDI QD6500/QD6580 EIDE controller fast support
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*
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* To activate controller support, use "ide0=qd65xx"
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*/
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/*
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* Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
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* Samuel Thibault <samuel.thibault@ens-lyon.org>
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/timer.h>
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#include <linux/mm.h>
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#include <linux/ioport.h>
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#include <linux/blkdev.h>
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#include <linux/ide.h>
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#include <linux/init.h>
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#include <asm/io.h>
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#define DRV_NAME "qd65xx"
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Linus Torvalds
Apr 16, 2005
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#include "qd65xx.h"
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/*
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* I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
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* or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
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* -- qd6500 is a single IDE interface
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* -- qd6580 is a dual IDE interface
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*
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* More research on qd6580 being done by willmore@cig.mot.com (David)
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* More Information given by Petr Soucek (petr@ryston.cz)
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* http://www.ryston.cz/petr/vlb
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*/
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/*
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* base: Timer1
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*
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*
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* base+0x01: Config (R/O)
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*
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* bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
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* bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
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* bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
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* bit 3: qd6500: 1 = disabled, 0 = enabled
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* qd6580: 1
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* upper nibble:
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* qd6500: 1100
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* qd6580: either 1010 or 0101
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*
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*
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* base+0x02: Timer2 (qd6580 only)
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*
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*
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* base+0x03: Control (qd6580 only)
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*
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* bits 0-3 must always be set 1
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* bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
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* bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
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* 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
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* channel 1 for hdc & hdd
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* bit 1 : 1 = only disks on primary port
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* 0 = disks & ATAPI devices on primary port
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* bit 2-4 : always 0
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* bit 5 : status, but of what ?
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* bit 6 : always set 1 by dos driver
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* bit 7 : set 1 for non-ATAPI devices on primary port
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* (maybe read-ahead and post-write buffer ?)
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*/
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static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
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/*
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* qd65xx_select:
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*
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* This routine is invoked to prepare for access to a given drive.
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*/
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static void qd65xx_dev_select(ide_drive_t *drive)
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{
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u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) |
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(QD_TIMREG(drive) & 0x02);
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if (timings[index] != QD_TIMING(drive))
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outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
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outb(drive->select | ATA_DEVICE_OBS, drive->hwif->io_ports.device_addr);
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}
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/*
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* qd6500_compute_timing
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*
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* computes the timing value where
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* lower nibble represents active time, in count of VLB clocks
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* upper nibble represents recovery time, in count of VLB clocks
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*/
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static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
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{
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int clk = ide_vlb_clk ? ide_vlb_clk : 50;
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u8 act_cyc, rec_cyc;
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if (clk <= 33) {
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act_cyc = 9 - IDE_IN(active_time * clk / 1000 + 1, 2, 9);
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rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 0, 15);
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} else {
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act_cyc = 8 - IDE_IN(active_time * clk / 1000 + 1, 1, 8);
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rec_cyc = 18 - IDE_IN(recovery_time * clk / 1000 + 1, 3, 18);
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}
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return (rec_cyc << 4) | 0x08 | act_cyc;
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}
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/*
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* qd6580_compute_timing
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*
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* idem for qd6580
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*/
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static u8 qd6580_compute_timing (int active_time, int recovery_time)
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{
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int clk = ide_vlb_clk ? ide_vlb_clk : 50;
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u8 act_cyc, rec_cyc;
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act_cyc = 17 - IDE_IN(active_time * clk / 1000 + 1, 2, 17);
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rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 2, 15);
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return (rec_cyc << 4) | act_cyc;
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}
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/*
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* qd_find_disk_type
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*
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* tries to find timing from dos driver's table
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*/
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static int qd_find_disk_type (ide_drive_t *drive,
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int *active_time, int *recovery_time)
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{
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struct qd65xx_timing_s *p;
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char *m = (char *)&drive->id[ATA_ID_PROD];
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char model[ATA_ID_PROD_LEN];
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if (*m == 0)
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return 0;
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strncpy(model, m, ATA_ID_PROD_LEN);
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ide_fixstring(model, ATA_ID_PROD_LEN, 1); /* byte-swap */
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for (p = qd65xx_timing ; p->offset != -1 ; p++) {
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if (!strncmp(p->model, model+p->offset, 4)) {
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printk(KERN_DEBUG "%s: listed !\n", drive->name);
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*active_time = p->active;
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*recovery_time = p->recovery;
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return 1;
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}
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}
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return 0;
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}
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/*
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* qd_set_timing:
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*
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* records the timing
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*/
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static void qd_set_timing (ide_drive_t *drive, u8 timing)
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{
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unsigned long data = (unsigned long)ide_get_drivedata(drive);
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data &= 0xff00;
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data |= timing;
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ide_set_drivedata(drive, (void *)data);
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printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
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}
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static void qd6500_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
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{
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u16 *id = drive->id;
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int active_time = 175;
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int recovery_time = 415; /* worst case values from the dos driver */
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/* FIXME: use drive->pio_mode value */
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if (!qd_find_disk_type(drive, &active_time, &recovery_time) &&
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(id[ATA_ID_OLD_PIO_MODES] & 0xff) && (id[ATA_ID_FIELD_VALID] & 2) &&
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id[ATA_ID_EIDE_PIO] >= 240) {
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printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
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id[ATA_ID_OLD_PIO_MODES] & 0xff);
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active_time = 110;
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recovery_time = drive->id[ATA_ID_EIDE_PIO] - 120;
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}
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qd_set_timing(drive, qd6500_compute_timing(drive->hwif,
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active_time, recovery_time));
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}
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static void qd6580_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
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{
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const u8 pio = drive->pio_mode - XFER_PIO_0;
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struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
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unsigned int cycle_time;
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int active_time = 175;
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int recovery_time = 415; /* worst case values from the dos driver */
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u8 base = (hwif->config_data & 0xff00) >> 8;
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if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
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cycle_time = ide_pio_cycle_time(drive, pio);
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switch (pio) {
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case 0: break;
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case 3:
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if (cycle_time >= 110) {
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active_time = 86;
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recovery_time = cycle_time - 102;
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} else
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printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
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break;
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case 4:
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if (cycle_time >= 69) {
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active_time = 70;
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recovery_time = cycle_time - 61;
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} else
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printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
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break;
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default:
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if (cycle_time >= 180) {
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active_time = 110;
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recovery_time = cycle_time - 120;
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} else {
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active_time = t->active;
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recovery_time = cycle_time - active_time;
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}
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}
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printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
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}
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if (!hwif->channel && drive->media != ide_disk) {
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outb(0x5f, QD_CONTROL_PORT);
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printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
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"and post-write buffer on %s.\n",
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drive->name, hwif->name);
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}
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qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
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}
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/*
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* qd_testreg
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*
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* tests if the given port is a register
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*/
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static int __init qd_testreg(int port)
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{
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unsigned long flags;
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u8 savereg, readreg;
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local_irq_save(flags);
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savereg = inb_p(port);
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outb_p(QD_TESTVAL, port); /* safe value */
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readreg = inb_p(port);
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outb(savereg, port);
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local_irq_restore(flags);
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if (savereg == QD_TESTVAL) {
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printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
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printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
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printk(KERN_ERR "Assuming qd65xx is not present.\n");
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return 1;
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}
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return (readreg != QD_TESTVAL);
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}
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static void __init qd6500_init_dev(ide_drive_t *drive)
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ide_hwif_t *hwif = drive->hwif;
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u8 base = (hwif->config_data & 0xff00) >> 8;
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u8 config = QD_CONFIG(hwif);
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ide_set_drivedata(drive, (void *)QD6500_DEF_DATA);
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static void __init qd6580_init_dev(ide_drive_t *drive)
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ide_hwif_t *hwif = drive->hwif;
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u8 base = (hwif->config_data & 0xff00) >> 8;
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u8 config = QD_CONFIG(hwif);
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if (hwif->host_flags & IDE_HFLAG_SINGLE) {
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t1 = QD6580_DEF_DATA;
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t2 = QD6580_DEF_DATA2;
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} else
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t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;
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ide_set_drivedata(drive, (void *)((drive->dn & 1) ? t2 : t1));
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}
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static const struct ide_tp_ops qd65xx_tp_ops = {
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.exec_command = ide_exec_command,
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.read_status = ide_read_status,
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.read_altstatus = ide_read_altstatus,
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.write_devctl = ide_write_devctl,
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.dev_select = qd65xx_dev_select,
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.tf_load = ide_tf_load,
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.tf_read = ide_tf_read,
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.input_data = ide_input_data,
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.output_data = ide_output_data,
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};
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static const struct ide_port_ops qd6500_port_ops = {
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.init_dev = qd6500_init_dev,
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.set_pio_mode = qd6500_set_pio_mode,
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};
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static const struct ide_port_ops qd6580_port_ops = {
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.init_dev = qd6580_init_dev,
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.set_pio_mode = qd6580_set_pio_mode,
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};
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static const struct ide_port_info qd65xx_port_info __initdata = {
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.name = DRV_NAME,
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.chipset = ide_qd65xx,
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.host_flags = IDE_HFLAG_IO_32BIT |
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.pio_mask = ATA_PIO4,
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};
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/*
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* qd_probe:
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*
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* looks at the specified baseport, and if qd found, registers & initialises it
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* return 1 if another qd may be probed
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*/
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static int __init qd_probe(int base)
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{
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u8 config, unit, control;
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struct ide_port_info d = qd65xx_port_info;
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config = inb(QD_CONFIG_PORT);
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if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
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return -ENODEV;
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unit = ! (config & QD_CONFIG_IDE_BASEPORT);
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if (unit)
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d.host_flags |= IDE_HFLAG_QD_2ND_PORT;
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switch (config & 0xf0) {
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case QD_CONFIG_QD6500:
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if (qd_testreg(base))
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return -ENODEV; /* bad register */
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Apr 16, 2005
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if (config & QD_CONFIG_DISABLED) {
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printk(KERN_WARNING "qd6500 is disabled !\n");
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return -ENODEV;
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Apr 16, 2005
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}
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printk(KERN_NOTICE "qd6500 at %#x\n", base);
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printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
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config, QD_ID3);
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d.port_ops = &qd6500_port_ops;
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d.host_flags |= IDE_HFLAG_SINGLE;
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break;
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case QD_CONFIG_QD6580_A:
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case QD_CONFIG_QD6580_B:
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if (qd_testreg(base) || qd_testreg(base + 0x02))
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return -ENODEV; /* bad registers */
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control = inb(QD_CONTROL_PORT);
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printk(KERN_NOTICE "qd6580 at %#x\n", base);
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printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
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config, control, QD_ID3);
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outb(QD_DEF_CONTR, QD_CONTROL_PORT);
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d.port_ops = &qd6580_port_ops;
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if (control & QD_CONTR_SEC_DISABLED)
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d.host_flags |= IDE_HFLAG_SINGLE;
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printk(KERN_INFO "qd6580: %s IDE board\n",
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(control & QD_CONTR_SEC_DISABLED) ? "single" : "dual");
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break;
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default:
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return -ENODEV;
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}
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rc = ide_legacy_device_add(&d, (base << 8) | config);
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if (d.host_flags & IDE_HFLAG_SINGLE)
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return (rc == 0) ? 1 : rc;
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return rc;
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}
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module_param_named(probe, probe_qd65xx, bool, 0);
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MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
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static int __init qd65xx_init(void)
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{
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int rc1, rc2 = -ENODEV;
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if (probe_qd65xx == 0)
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return -ENODEV;
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rc1 = qd_probe(0x30);
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if (rc1)
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rc2 = qd_probe(0xb0);
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if (rc1 < 0 && rc2 < 0)
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return -ENODEV;
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return 0;
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}
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module_init(qd65xx_init);
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MODULE_AUTHOR("Samuel Thibault");
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MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
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MODULE_LICENSE("GPL");