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Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upst…

…ream-linus

Pull MIPS update from Ralf Baechle:
 "Cleanups and fixes for breakage that occured earlier during this merge
  phase.  Also a few patches that didn't make the first pull request.
  Of those is the Alchemy work that merges code for many of the SOCs and
  evaluation boards thus among other code shrinkage, reduces the number
  of MIPS defconfigs by 5."

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (22 commits)
  MIPS: SNI: Switch RM400 serial to SCCNXP driver
  MIPS: Remove unused empty_bad_pmd_table[] declaration.
  MIPS: MT: Remove kspd.
  MIPS: Malta: Fix section mismatch.
  MIPS: asm-offset.c: Delete unused irq_cpustat_t struct offsets.
  MIPS: Alchemy: Merge PB1100/1500 support into DB1000 code.
  MIPS: Alchemy: merge PB1550 support into DB1550 code
  MIPS: Alchemy: Single kernel for DB1200/1300/1550
  MIPS: Optimize TLB refill for RI/XI configurations.
  MIPS: proc: Cleanup printing of ASEs.
  MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.
  MIPS: Add detection of DSP ASE Revision 2.
  MIPS: Optimize pgd_init and pmd_init
  MIPS: perf: Add perf functionality for BMIPS5000
  MIPS: perf: Split the Kconfig option CONFIG_MIPS_MT_SMP
  MIPS: perf: Remove unnecessary #ifdef
  MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt)
  MIPS: perf: Change the "mips_perf_event" table unsupported indicator.
  MIPS: Align swapper_pg_dir to 64K for better TLB Refill code.
  vmlinux.lds.h: Allow architectures to add sections to the front of .bss
  ...
  • Loading branch information...
torvalds committed Oct 14, 2012
2 parents d25282d + 35bafbe commit a5ef3f7dcba17e79c21afec38188c4c6a0baf995
Showing with 2,895 additions and 4,493 deletions.
  1. +4 −10 arch/mips/Kconfig
  2. +4 −46 arch/mips/alchemy/Kconfig
  3. +4 −18 arch/mips/alchemy/Platform
  4. +1 −6 arch/mips/alchemy/devboards/Makefile
  5. +92 −28 arch/mips/alchemy/devboards/db1000.c
  6. +10 −27 arch/mips/alchemy/devboards/db1200.c
  7. +94 −0 arch/mips/alchemy/devboards/db1235.c
  8. +4 −8 arch/mips/alchemy/devboards/db1300.c
  9. +149 −43 arch/mips/alchemy/devboards/db1550.c
  10. +0 −167 arch/mips/alchemy/devboards/pb1100.c
  11. +0 −198 arch/mips/alchemy/devboards/pb1500.c
  12. +0 −244 arch/mips/alchemy/devboards/pb1550.c
  13. +4 −5 arch/mips/alchemy/devboards/platform.c
  14. +0 −4 arch/mips/boot/compressed/uart-alchemy.c
  15. +0 −170 arch/mips/configs/db1200_defconfig
  16. +434 −0 arch/mips/configs/db1235_defconfig
  17. +0 −391 arch/mips/configs/db1300_defconfig
  18. +0 −285 arch/mips/configs/db1550_defconfig
  19. +0 −124 arch/mips/configs/pb1100_defconfig
  20. +0 −141 arch/mips/configs/pb1500_defconfig
  21. +0 −145 arch/mips/configs/pb1550_defconfig
  22. +0 −5 arch/mips/include/asm/Kbuild
  23. +29 −35 arch/mips/include/asm/atomic.h
  24. +8 −0 arch/mips/include/asm/cpu-features.h
  25. +3 −1 arch/mips/include/asm/cpu.h
  26. +1 −119 arch/mips/include/asm/errno.h
  27. +0 −4 arch/mips/include/asm/kspd.h
  28. +2 −0 arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
  29. +1 −0 arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h
  30. +1 −0 arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
  31. +1 −0 arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
  32. +1 −0 arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h
  33. +2 −0 arch/mips/include/asm/mach-db1x00/bcsr.h
  34. +1 −0 arch/mips/include/asm/mach-ip22/cpu-feature-overrides.h
  35. +1 −0 arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h
  36. +1 −0 arch/mips/include/asm/mach-ip28/cpu-feature-overrides.h
  37. +1 −0 arch/mips/include/asm/mach-ip32/cpu-feature-overrides.h
  38. +1 −0 arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h
  39. +1 −0 arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h
  40. +1 −0 arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h
  41. +1 −0 arch/mips/include/asm/mach-powertv/cpu-feature-overrides.h
  42. +1 −0 arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h
  43. +1 −0 arch/mips/include/asm/mach-rm/cpu-feature-overrides.h
  44. +1 −0 arch/mips/include/asm/mach-sibyte/cpu-feature-overrides.h
  45. +1 −0 arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h
  46. +1 −0 arch/mips/include/asm/mach-yosemite/cpu-feature-overrides.h
  47. +3 −0 arch/mips/include/asm/mipsregs.h
  48. +0 −1 arch/mips/include/asm/pgtable-64.h
  49. +1 −0 arch/mips/include/asm/pmc-sierra/msp71xx/cpu-feature-overrides.h
  50. +1 −106 arch/mips/include/asm/ptrace.h
  51. +1 −4 arch/mips/include/asm/setup.h
  52. +1 −65 arch/mips/include/asm/sigcontext.h
  53. +1 −103 arch/mips/include/asm/siginfo.h
  54. +1 −114 arch/mips/include/asm/signal.h
  55. +1 −82 arch/mips/include/asm/socket.h
  56. +1 −72 arch/mips/include/asm/termios.h
  57. +1 −15 arch/mips/include/asm/types.h
  58. +1 −1,021 arch/mips/include/asm/unistd.h
  59. +34 −0 arch/mips/include/uapi/asm/Kbuild
  60. 0 arch/mips/include/{ → uapi}/asm/auxvec.h
  61. 0 arch/mips/include/{ → uapi}/asm/bitsperlong.h
  62. 0 arch/mips/include/{ → uapi}/asm/byteorder.h
  63. 0 arch/mips/include/{ → uapi}/asm/cachectl.h
  64. +129 −0 arch/mips/include/uapi/asm/errno.h
  65. 0 arch/mips/include/{ → uapi}/asm/fcntl.h
  66. 0 arch/mips/include/{ → uapi}/asm/ioctl.h
  67. 0 arch/mips/include/{ → uapi}/asm/ioctls.h
  68. 0 arch/mips/include/{ → uapi}/asm/ipcbuf.h
  69. 0 arch/mips/include/{ → uapi}/asm/kvm_para.h
  70. 0 arch/mips/include/{ → uapi}/asm/mman.h
  71. 0 arch/mips/include/{ → uapi}/asm/msgbuf.h
  72. 0 arch/mips/include/{ → uapi}/asm/param.h
  73. 0 arch/mips/include/{ → uapi}/asm/poll.h
  74. 0 arch/mips/include/{ → uapi}/asm/posix_types.h
  75. +116 −0 arch/mips/include/uapi/asm/ptrace.h
  76. 0 arch/mips/include/{ → uapi}/asm/resource.h
  77. 0 arch/mips/include/{ → uapi}/asm/sembuf.h
  78. +7 −0 arch/mips/include/uapi/asm/setup.h
  79. 0 arch/mips/include/{ → uapi}/asm/sgidefs.h
  80. 0 arch/mips/include/{ → uapi}/asm/shmbuf.h
  81. +78 −0 arch/mips/include/uapi/asm/sigcontext.h
  82. +114 −0 arch/mips/include/uapi/asm/siginfo.h
  83. +123 −0 arch/mips/include/uapi/asm/signal.h
  84. +93 −0 arch/mips/include/uapi/asm/socket.h
  85. 0 arch/mips/include/{ → uapi}/asm/sockios.h
  86. 0 arch/mips/include/{ → uapi}/asm/stat.h
  87. 0 arch/mips/include/{ → uapi}/asm/statfs.h
  88. 0 arch/mips/include/{ → uapi}/asm/swab.h
  89. 0 arch/mips/include/{ → uapi}/asm/sysmips.h
  90. 0 arch/mips/include/{ → uapi}/asm/termbits.h
  91. +80 −0 arch/mips/include/uapi/asm/termios.h
  92. +27 −0 arch/mips/include/uapi/asm/types.h
  93. +1,035 −0 arch/mips/include/uapi/asm/unistd.h
  94. +0 −1 arch/mips/kernel/Makefile
  95. +0 −10 arch/mips/kernel/asm-offsets.c
  96. +8 −3 arch/mips/kernel/cpu-probe.c
  97. +0 −423 arch/mips/kernel/kspd.c
  98. +106 −156 arch/mips/kernel/perf_event_mipsxx.c
  99. +11 −8 arch/mips/kernel/proc.c
  100. +19 −2 arch/mips/kernel/vmlinux.lds.S
  101. +0 −24 arch/mips/kernel/vpe.c
  102. +9 −8 arch/mips/mm/init.c
  103. +10 −10 arch/mips/mm/pgtable-64.c
  104. +7 −16 arch/mips/mm/tlbex.c
  105. +2 −1 arch/mips/pci/fixup-malta.c
  106. +3 −24 arch/mips/sni/a20r.c
  107. +9 −0 include/asm-generic/vmlinux.lds.h
View
@@ -1931,6 +1931,7 @@ config MIPS_MT_SMP
select SYS_SUPPORTS_SCHED_SMT if SMP
select SYS_SUPPORTS_SMP
select SMP_UP
+ select MIPS_PERF_SHARED_TC_COUNTERS
help
This is a kernel model which is known a VSMP but lately has been
marketesed into SMVP.
@@ -2041,16 +2042,6 @@ config MIPS_VPE_APSP_API
depends on MIPS_VPE_LOADER
help
-config MIPS_APSP_KSPD
- bool "Enable KSPD"
- depends on MIPS_VPE_APSP_API
- default y
- help
- KSPD is a kernel daemon that accepts syscall requests from the SP
- side, actions them and returns the results. It also handles the
- "exit" syscall notifying other kernel modules the SP program is
- exiting. You probably want to say yes here.
-
config MIPS_CMP
bool "MIPS CMP framework support"
depends on SYS_SUPPORTS_MIPS_CMP
@@ -2280,6 +2271,9 @@ config NR_CPUS
performance should round up your number of processors to the next
power of two.
+config MIPS_PERF_SHARED_TC_COUNTERS
+ bool
+
#
# Timer Interrupt Frequency Configuration
#
View
@@ -27,7 +27,7 @@ config MIPS_MTX1
select SYS_HAS_EARLY_PRINTK
config MIPS_DB1000
- bool "Alchemy DB1000/DB1500/DB1100 boards"
+ bool "Alchemy DB1000/DB1500/DB1100 PB1500/1100 boards"
select ALCHEMY_GPIOINT_AU1000
select DMA_NONCOHERENT
select HW_HAS_PCI
@@ -36,57 +36,15 @@ config MIPS_DB1000
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_HAS_EARLY_PRINTK
-config MIPS_DB1200
- bool "Alchemy DB1200/PB1200 board"
- select ALCHEMY_GPIOINT_AU1000
- select DMA_COHERENT
- select MIPS_DISABLE_OBSOLETE_IDE
- select SYS_SUPPORTS_LITTLE_ENDIAN
- select SYS_HAS_EARLY_PRINTK
-
-config MIPS_DB1300
- bool "NetLogic DB1300 board"
- select ALCHEMY_GPIOINT_AU1300
- select DMA_COHERENT
- select MIPS_DISABLE_OBSOLETE_IDE
- select SYS_SUPPORTS_LITTLE_ENDIAN
- select SYS_HAS_EARLY_PRINTK
-
-config MIPS_DB1550
- bool "Alchemy DB1550 board"
- select ALCHEMY_GPIOINT_AU1000
+config MIPS_DB1235
+ bool "Alchemy DB1200/PB1200/DB1300/DB1550/PB1550 boards"
+ select ARCH_REQUIRE_GPIOLIB
select HW_HAS_PCI
select DMA_COHERENT
select MIPS_DISABLE_OBSOLETE_IDE
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_HAS_EARLY_PRINTK
-config MIPS_PB1100
- bool "Alchemy PB1100 board"
- select ALCHEMY_GPIOINT_AU1000
- select DMA_NONCOHERENT
- select HW_HAS_PCI
- select SWAP_IO_SPACE
- select SYS_SUPPORTS_LITTLE_ENDIAN
- select SYS_HAS_EARLY_PRINTK
-
-config MIPS_PB1500
- bool "Alchemy PB1500 board"
- select ALCHEMY_GPIOINT_AU1000
- select DMA_NONCOHERENT
- select HW_HAS_PCI
- select SYS_SUPPORTS_LITTLE_ENDIAN
- select SYS_HAS_EARLY_PRINTK
-
-config MIPS_PB1550
- bool "Alchemy PB1550 board"
- select ALCHEMY_GPIOINT_AU1000
- select DMA_NONCOHERENT
- select HW_HAS_PCI
- select MIPS_DISABLE_OBSOLETE_IDE
- select SYS_SUPPORTS_LITTLE_ENDIAN
- select SYS_HAS_EARLY_PRINTK
-
config MIPS_XXS1500
bool "MyCable XXS1500 board"
select DMA_NONCOHERENT
View
@@ -30,25 +30,11 @@ cflags-$(CONFIG_MIPS_DB1000) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000
#
-# AMD Alchemy Db1550 eval board
+# AMD Alchemy Db1200/Pb1200/Db1550/Db1300 eval boards
#
-platform-$(CONFIG_MIPS_DB1550) += alchemy/devboards/
-cflags-$(CONFIG_MIPS_DB1550) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
-load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
-
-#
-# AMD Alchemy Db1200/Pb1200 eval boards
-#
-platform-$(CONFIG_MIPS_DB1200) += alchemy/devboards/
-cflags-$(CONFIG_MIPS_DB1200) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
-load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
-
-#
-# NetLogic DBAu1300 development platform
-#
-platform-$(CONFIG_MIPS_DB1300) += alchemy/devboards/
-cflags-$(CONFIG_MIPS_DB1300) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
-load-$(CONFIG_MIPS_DB1300) += 0xffffffff80100000
+platform-$(CONFIG_MIPS_DB1235) += alchemy/devboards/
+cflags-$(CONFIG_MIPS_DB1235) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
+load-$(CONFIG_MIPS_DB1235) += 0xffffffff80100000
#
# 4G-Systems MTX-1 "MeshCube" wireless router
@@ -4,10 +4,5 @@
obj-y += bcsr.o platform.o
obj-$(CONFIG_PM) += pm.o
-obj-$(CONFIG_MIPS_PB1100) += pb1100.o
-obj-$(CONFIG_MIPS_PB1500) += pb1500.o
-obj-$(CONFIG_MIPS_PB1550) += pb1550.o
obj-$(CONFIG_MIPS_DB1000) += db1000.o
-obj-$(CONFIG_MIPS_DB1200) += db1200.o
-obj-$(CONFIG_MIPS_DB1300) += db1300.o
-obj-$(CONFIG_MIPS_DB1550) += db1550.o
+obj-$(CONFIG_MIPS_DB1235) += db1235.o db1200.o db1300.o db1550.o
@@ -1,5 +1,5 @@
/*
- * DBAu1000/1500/1100 board support
+ * DBAu1000/1500/1100 PBAu1100/1500 board support
*
* Copyright 2000, 2008 MontaVista Software Inc.
* Author: MontaVista Software, Inc. <source@mvista.com>
@@ -52,6 +52,11 @@ static const char *board_type_str(void)
return "DB1500";
case BCSR_WHOAMI_DB1100:
return "DB1100";
+ case BCSR_WHOAMI_PB1500:
+ case BCSR_WHOAMI_PB1500R2:
+ return "PB1500";
+ case BCSR_WHOAMI_PB1100:
+ return "PB1100";
default:
return "(unknown)";
}
@@ -111,7 +116,9 @@ static struct platform_device db1500_pci_host_dev = {
static int __init db1500_pci_init(void)
{
- if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1500)
+ int id = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));
+ if ((id == BCSR_WHOAMI_DB1500) || (id == BCSR_WHOAMI_PB1500) ||
+ (id == BCSR_WHOAMI_PB1500R2))
return platform_device_register(&db1500_pci_host_dev);
return 0;
}
@@ -199,27 +206,37 @@ static irqreturn_t db1100_mmc_cd(int irq, void *ptr)
static int db1100_mmc_cd_setup(void *mmc_host, int en)
{
- int ret = 0;
+ int ret = 0, irq;
+
+ if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100)
+ irq = AU1100_GPIO19_INT;
+ else
+ irq = AU1100_GPIO14_INT; /* PB1100 SD0 CD# */
if (en) {
- irq_set_irq_type(AU1100_GPIO19_INT, IRQ_TYPE_EDGE_BOTH);
- ret = request_irq(AU1100_GPIO19_INT, db1100_mmc_cd, 0,
+ irq_set_irq_type(irq, IRQ_TYPE_EDGE_BOTH);
+ ret = request_irq(irq, db1100_mmc_cd, 0,
"sd0_cd", mmc_host);
} else
- free_irq(AU1100_GPIO19_INT, mmc_host);
+ free_irq(irq, mmc_host);
return ret;
}
static int db1100_mmc1_cd_setup(void *mmc_host, int en)
{
- int ret = 0;
+ int ret = 0, irq;
+
+ if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100)
+ irq = AU1100_GPIO20_INT;
+ else
+ irq = AU1100_GPIO15_INT; /* PB1100 SD1 CD# */
if (en) {
- irq_set_irq_type(AU1100_GPIO20_INT, IRQ_TYPE_EDGE_BOTH);
- ret = request_irq(AU1100_GPIO20_INT, db1100_mmc_cd, 0,
+ irq_set_irq_type(irq, IRQ_TYPE_EDGE_BOTH);
+ ret = request_irq(irq, db1100_mmc_cd, 0,
"sd1_cd", mmc_host);
} else
- free_irq(AU1100_GPIO20_INT, mmc_host);
+ free_irq(irq, mmc_host);
return ret;
}
@@ -236,11 +253,18 @@ static int db1100_mmc_card_inserted(void *mmc_host)
static void db1100_mmc_set_power(void *mmc_host, int state)
{
+ int bit;
+
+ if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100)
+ bit = BCSR_BOARD_SD0PWR;
+ else
+ bit = BCSR_BOARD_PB1100_SD0PWR;
+
if (state) {
- bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD0PWR);
+ bcsr_mod(BCSR_BOARD, 0, bit);
msleep(400); /* stabilization time */
} else
- bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD0PWR, 0);
+ bcsr_mod(BCSR_BOARD, bit, 0);
}
static void db1100_mmcled_set(struct led_classdev *led, enum led_brightness b)
@@ -267,11 +291,18 @@ static int db1100_mmc1_card_inserted(void *mmc_host)
static void db1100_mmc1_set_power(void *mmc_host, int state)
{
+ int bit;
+
+ if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100)
+ bit = BCSR_BOARD_SD1PWR;
+ else
+ bit = BCSR_BOARD_PB1100_SD1PWR;
+
if (state) {
- bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD1PWR);
+ bcsr_mod(BCSR_BOARD, 0, bit);
msleep(400); /* stabilization time */
} else
- bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD1PWR, 0);
+ bcsr_mod(BCSR_BOARD, bit, 0);
}
static void db1100_mmc1led_set(struct led_classdev *led, enum led_brightness b)
@@ -480,13 +511,12 @@ static struct platform_device *db1100_devs[] = {
&db1100_mmc0_dev,
&db1100_mmc1_dev,
&db1000_irda_dev,
- &db1100_spi_dev,
};
static int __init db1000_dev_init(void)
{
int board = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));
- int c0, c1, d0, d1, s0, s1;
+ int c0, c1, d0, d1, s0, s1, flashsize = 32, twosocks = 1;
unsigned long pfc;
if (board == BCSR_WHOAMI_DB1500) {
@@ -522,6 +552,7 @@ static int __init db1000_dev_init(void)
ARRAY_SIZE(db1100_spi_info));
platform_add_devices(db1100_devs, ARRAY_SIZE(db1100_devs));
+ platform_device_register(&db1100_spi_dev);
} else if (board == BCSR_WHOAMI_DB1000) {
c0 = AU1000_GPIO2_INT;
c1 = AU1000_GPIO5_INT;
@@ -530,15 +561,42 @@ static int __init db1000_dev_init(void)
s0 = AU1000_GPIO1_INT;
s1 = AU1000_GPIO4_INT;
platform_add_devices(db1000_devs, ARRAY_SIZE(db1000_devs));
+ } else if ((board == BCSR_WHOAMI_PB1500) ||
+ (board == BCSR_WHOAMI_PB1500R2)) {
+ c0 = AU1500_GPIO203_INT;
+ d0 = AU1500_GPIO201_INT;
+ s0 = AU1500_GPIO202_INT;
+ twosocks = 0;
+ flashsize = 64;
+ /* RTC and daughtercard irqs */
+ irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_LOW);
+ irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW);
+ /* EPSON S1D13806 0x1b000000
+ * SRAM 1MB/2MB 0x1a000000
+ * DS1693 RTC 0x0c000000
+ */
+ } else if (board == BCSR_WHOAMI_PB1100) {
+ c0 = AU1100_GPIO11_INT;
+ d0 = AU1100_GPIO9_INT;
+ s0 = AU1100_GPIO10_INT;
+ twosocks = 0;
+ flashsize = 64;
+ /* pendown, rtc, daughtercard irqs */
+ irq_set_irq_type(AU1100_GPIO8_INT, IRQ_TYPE_LEVEL_LOW);
+ irq_set_irq_type(AU1100_GPIO12_INT, IRQ_TYPE_LEVEL_LOW);
+ irq_set_irq_type(AU1100_GPIO13_INT, IRQ_TYPE_LEVEL_LOW);
+ /* EPSON S1D13806 0x1b000000
+ * SRAM 1MB/2MB 0x1a000000
+ * DiskOnChip 0x0d000000
+ * DS1693 RTC 0x0c000000
+ */
+ platform_add_devices(db1100_devs, ARRAY_SIZE(db1100_devs));
} else
return 0; /* unknown board, no further dev setup to do */
irq_set_irq_type(d0, IRQ_TYPE_EDGE_BOTH);
- irq_set_irq_type(d1, IRQ_TYPE_EDGE_BOTH);
irq_set_irq_type(c0, IRQ_TYPE_LEVEL_LOW);
- irq_set_irq_type(c1, IRQ_TYPE_LEVEL_LOW);
irq_set_irq_type(s0, IRQ_TYPE_LEVEL_LOW);
- irq_set_irq_type(s1, IRQ_TYPE_LEVEL_LOW);
db1x_register_pcmcia_socket(
AU1000_PCMCIA_ATTR_PHYS_ADDR,
@@ -549,17 +607,23 @@ static int __init db1000_dev_init(void)
AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
c0, d0, /*s0*/0, 0, 0);
- db1x_register_pcmcia_socket(
- AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
- AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
- AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004000000,
- AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1,
- AU1000_PCMCIA_IO_PHYS_ADDR + 0x004000000,
- AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1,
- c1, d1, /*s1*/0, 0, 1);
+ if (twosocks) {
+ irq_set_irq_type(d1, IRQ_TYPE_EDGE_BOTH);
+ irq_set_irq_type(c1, IRQ_TYPE_LEVEL_LOW);
+ irq_set_irq_type(s1, IRQ_TYPE_LEVEL_LOW);
+
+ db1x_register_pcmcia_socket(
+ AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
+ AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
+ AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004000000,
+ AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1,
+ AU1000_PCMCIA_IO_PHYS_ADDR + 0x004000000,
+ AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1,
+ c1, d1, /*s1*/0, 0, 1);
+ }
platform_add_devices(db1x00_devs, ARRAY_SIZE(db1x00_devs));
- db1x_register_norflash(32 << 20, 4 /* 32bit */, F_SWAPPED);
+ db1x_register_norflash(flashsize << 20, 4 /* 32bit */, F_SWAPPED);
return 0;
}
device_initcall(db1000_dev_init);
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