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A bit-serial CPU
VHDL Coq Python Assembly Verilog Makefile Shell
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asm
littlebee/cpu
Makefile
alu.sby
alu.vhd
bhv_tb.vhd
bram.v
cpu.sby
cpu.vhd
cpu_rtl_tb.v
cpu_tb.v
display.vhd
inc.sby
inc.vhd
inc_tb.v
rom.asm
tilerom.mem
tilerom.v
timing.sh
vga_controller.vhd
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