From 97f9f0156893971eff3c3713eabcd2181e78983c Mon Sep 17 00:00:00 2001 From: Lenny Truong Date: Wed, 20 Nov 2019 08:16:01 -0800 Subject: [PATCH] Use digital instead of explicit types --- magma/backend/coreir_.py | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/magma/backend/coreir_.py b/magma/backend/coreir_.py index 4882f9eef..7312dc42a 100644 --- a/magma/backend/coreir_.py +++ b/magma/backend/coreir_.py @@ -4,6 +4,7 @@ import magma as m from ..wire import Wire from ..bit import Bit, BitIn, BitOut +from ..digital import Digital from ..array import Array from ..tuple import Tuple, Product from ..clock import wiredefaultclock, wireclock, Clock, Enable, Reset, \ @@ -113,12 +114,12 @@ def check_type(port, errorMessage=""): elif issubclass(port.type_, Tuple): for (k, t) in port._get_items(): check_type(t, errorMessage.format("Tuple({}:{})".format(k, "{}"))) - elif issubclass(port.type_, (Bit, Clock, Enable, Reset, AsyncReset, ResetN, AsyncResetN)): + elif issubclass(port.type_, Digital): return else: raise CoreIRBackendError(errorMessage.format(str(port))) for name, port in definition.interface.ports.items(): - check_type(port, 'Error: Argument {} must be comprised only of Bit, Array, or Tuple') + check_type(port, 'Error: Argument {} must be comprised only of Digital, Array, or Tuple') def get_type(self, port): if issubclass(port.type_, Array):