From a9e656e9579e3348a4d2e09c59a5a59d8a428d39 Mon Sep 17 00:00:00 2001
From: Raj Setaluri <raj.setaluri@gmail.com>
Date: Thu, 9 May 2019 16:41:59 -0700
Subject: [PATCH] First pass at new generator framework

---
 magma/__init__.py       |  2 ++
 magma/generator.py      | 17 +++++++++++++++++
 tests/test_generator.py | 30 ++++++++++++++++++++++++++++++
 3 files changed, 49 insertions(+)
 create mode 100644 magma/generator.py
 create mode 100644 tests/test_generator.py

diff --git a/magma/__init__.py b/magma/__init__.py
index dfcc82720..10c2efa80 100644
--- a/magma/__init__.py
+++ b/magma/__init__.py
@@ -70,6 +70,8 @@ def set_mantle_target(t):
 
 from hwtypes.bit_vector_abc import TypeFamily
 
+from .generator import Generator
+
 
 BitVector = Bits
 UIntVector = UInt
diff --git a/magma/generator.py b/magma/generator.py
new file mode 100644
index 000000000..fe00ed128
--- /dev/null
+++ b/magma/generator.py
@@ -0,0 +1,17 @@
+from .circuit import DefineCircuitKind, Circuit, CircuitType, CircuitKind, IO
+
+
+class GeneratorKind(type):
+    def __new__(metacls, name, bases, dct):
+        return super().__new__(metacls, name, bases, dct)
+
+    def __call__(cls, *args, **kwargs):
+        bases = (Circuit,)
+        io = cls.new(*args, **kwargs)
+        name = cls.__name__
+        return super().__call__(name, bases, {"io": io})
+
+
+class Generator(DefineCircuitKind, metaclass=GeneratorKind):
+    def new():
+        return IO()
diff --git a/tests/test_generator.py b/tests/test_generator.py
new file mode 100644
index 000000000..1e81903bc
--- /dev/null
+++ b/tests/test_generator.py
@@ -0,0 +1,30 @@
+import magma as m
+
+
+def test_type_relations():
+    class _MyGen(m.Generator):
+        pass
+
+    MyCircuit = _MyGen()
+
+    assert issubclass(MyCircuit, m.Circuit)
+    assert isinstance(MyCircuit, m.circuit.DefineCircuitKind)
+    assert issubclass(m.circuit.Circuit, m.circuit.CircuitType)
+    assert issubclass(m.circuit.DefineCircuitKind, m.circuit.CircuitKind)
+    assert isinstance(MyCircuit, m.circuit.CircuitKind)
+
+    assert isinstance(MyCircuit, _MyGen)
+    assert issubclass(_MyGen, m.circuit.DefineCircuitKind)
+
+
+def test_generation():
+    class _MyGen(m.Generator):
+        def new(width):
+            io = m.IO(I=m.In(m.Bits[width]),
+                      O=m.Out(m.Bits[width]))
+            m.wire(io.O, io.I)
+            return io
+
+    MyCircuit8 = _MyGen(8)
+    print (repr(MyCircuit8))
+    m.compile("test", MyCircuit8, output="coreir")