diff --git a/magma/backend/coreir_.py b/magma/backend/coreir_.py
index 2b8bd59fea..a4b8ec4d2b 100644
--- a/magma/backend/coreir_.py
+++ b/magma/backend/coreir_.py
@@ -44,16 +44,13 @@ def __init__(self):
 
 
 class CoreIRBackend:
-    def __init__(self, context=None, check_context_is_default=True):
-        # TODO(rsetaluri): prove this logic.
+    def __init__(self, context=None):
         singleton = CoreIRContextSingleton().get_instance()
         if context is None:
             context = singleton
-        elif check_context_is_default and context != singleton:
-            logger.warn("Creating CoreIRBackend with non-singleton CoreIR "
-                        "context. If you're sure you want to do this, set "
-                        "check_context_is_default when initializing the "
-                        "CoreIRBackend.")
+        if context is not singleton:
+            logger.warning("Creating CoreIRBackend with non-singleton CoreIR "
+                           "context.")
         self.modules = _context_to_modules.setdefault(context, {})
         self.context = context
         self.libs = keydefaultdict(self.context.get_lib)
@@ -120,9 +117,9 @@ def __call__(self, definition):
             self.wrap_if_arst(port, definition)
 
 
-def compile(main, file_name=None, context=None, check_context_is_default=True):
+def compile(main, file_name=None, context=None):
     InsertWrapCasts(main).run()
-    backend = CoreIRBackend(context, check_context_is_default)
+    backend = CoreIRBackend(context)
     backend.compile(main)
     if file_name is not None:
         return backend.modules[main.coreir_name].save_to_file(file_name)
diff --git a/magma/simulator/coreir_simulator.py b/magma/simulator/coreir_simulator.py
index 6706cfd023..f9f329454d 100644
--- a/magma/simulator/coreir_simulator.py
+++ b/magma/simulator/coreir_simulator.py
@@ -151,12 +151,9 @@ def __init__(self, circuit, clock, coreir_filename=None, context=None,
 
         if context is None:
             self.ctx = GetMagmaContext()
-            check_context_is_default = True
         else:
             self.ctx = context
-            check_context_is_default = False
-        coreir_.compile(circuit, coreir_filename, context=self.ctx,
-                        check_context_is_default=check_context_is_default)
+        coreir_.compile(circuit, coreir_filename, context=self.ctx)
 
         # Initialize interpreter, get handle back to interpreter state
         self.ctx.get_lib("commonlib")
diff --git a/tests/test_coreir/test_coreir.py b/tests/test_coreir/test_coreir.py
index c918f22554..5e538c2884 100644
--- a/tests/test_coreir/test_coreir.py
+++ b/tests/test_coreir/test_coreir.py
@@ -52,7 +52,7 @@ def definition(cls):
 
 def test_nested_clocks():
     c = coreir.Context()
-    cirb = CoreIRBackend(c, check_context_is_default=False)
+    cirb = CoreIRBackend(c)
     args = ['clocks', In(Array[2, Clock])]
 
     inner_test_circuit = DefineCircuit('inner_test_nested_clocks', *args)
diff --git a/tests/test_simulator/test_nested.py b/tests/test_simulator/test_nested.py
index 976c2a0190..f42afdd2d2 100644
--- a/tests/test_simulator/test_nested.py
+++ b/tests/test_simulator/test_nested.py
@@ -12,7 +12,7 @@ def simulator_nested(simple):
     testValInt = 80
     testValBits = int2seq(testValInt)
     c = coreir.Context()
-    cirb = CoreIRBackend(c, check_context_is_default=False)
+    cirb = CoreIRBackend(c)
     scope = Scope()
     inDims = [4, 3, width]
     toNest = Array[inDims[1], Array[inDims[2], Bit]]
diff --git a/tests/test_simulator/test_tuple.py b/tests/test_simulator/test_tuple.py
index c2008eefc6..80d595cb39 100644
--- a/tests/test_simulator/test_tuple.py
+++ b/tests/test_simulator/test_tuple.py
@@ -11,7 +11,7 @@ def test_simulator_tuple():
     width = 8
     testValInt = 80
     c = coreir.Context()
-    cirb = CoreIRBackend(c, check_context_is_default=False)
+    cirb = CoreIRBackend(c)
     scope = Scope()
     inDims = [2, width]
     tupleEl = Array[inDims[1], Bit]