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Rearranged MCU #ifdefs to support ATmega 4/8/16/328 and ATmega 16/32/…

…64/1284 lines
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commit 0de9edc4668ec995a0221bb6aa45048203a58aef 1 parent a0ee435
@kvitekp kvitekp authored
Showing with 72 additions and 47 deletions.
  1. +4 −2 boot.h
  2. +47 −34 gpio.h
  3. +7 −3 serial.cc
  4. +8 −2 serial.h
  5. +6 −6 timer.h
View
6 boot.h
@@ -40,11 +40,13 @@ inline void Boot(bool init_timers) {
}
// Neuter the UARTs.
+#ifdef HAS_USART0
UCSR0B = 0;
+#endif
-#ifndef ATMEGA328P
+#ifdef HAS_USART1
UCSR1B = 0;
-#endif // ATMEGA328P
+#endif
}
} // avr
View
81 gpio.h
@@ -187,9 +187,46 @@ struct NumberedGpioInternal { };
template<bool safe> struct NumberedGpioInternal<n, safe> { \
typedef GpioImpl<port, timer, bit, safe> Impl; };
-#ifndef ATMEGA328P
+// Pin definitions for ATmega lineup
+
+#if defined(ATMEGA48P) || defined(ATMEGA88P) || defined(ATMEGA168P) || defined(ATMEGA328P)
+
+SetupGpio(0, PortD, NoPwmChannel, 0);
+SetupGpio(1, PortD, NoPwmChannel, 1);
+SetupGpio(2, PortD, NoPwmChannel, 2);
+SetupGpio(3, PortD, PwmChannel2B, 3);
+SetupGpio(4, PortD, NoPwmChannel, 4);
+SetupGpio(5, PortD, PwmChannel0B, 5);
+SetupGpio(6, PortD, PwmChannel0A, 6);
+SetupGpio(7, PortD, NoPwmChannel, 7);
+SetupGpio(8, PortB, NoPwmChannel, 0);
+SetupGpio(9, PortB, PwmChannel1A, 1);
+SetupGpio(10, PortB, PwmChannel1B, 2);
+SetupGpio(11, PortB, PwmChannel2A, 3);
+SetupGpio(12, PortB, NoPwmChannel, 4);
+SetupGpio(13, PortB, NoPwmChannel, 5);
+SetupGpio(14, PortC, NoPwmChannel, 0);
+SetupGpio(15, PortC, NoPwmChannel, 1);
+SetupGpio(16, PortC, NoPwmChannel, 2);
+SetupGpio(17, PortC, NoPwmChannel, 3);
+SetupGpio(18, PortC, NoPwmChannel, 4);
+SetupGpio(19, PortC, NoPwmChannel, 5);
+
+SetupGpio(255, PortB, NoPwmChannel, 0);
+
+typedef Gpio<PortB, 5> SpiSCK;
+typedef Gpio<PortB, 4> SpiMISO;
+typedef Gpio<PortB, 3> SpiMOSI;
+typedef Gpio<PortB, 2> SpiSS;
+
+typedef Gpio<PortD, 4> UartSpiXCK;
+typedef Gpio<PortD, 1> UartSpiTX;
+typedef Gpio<PortD, 0> UartSpiRX;
+
+#define HAS_USART0
+
+#elif defined(ATMEGA164P) || defined(ATMEGA324P) || defined(ATMEGA644P) || defined(ATMEGA1284P)
-// Pin definitions for ATmega644p and ATmega1284p
SetupGpio(0, PortB, NoPwmChannel, 0);
SetupGpio(1, PortB, NoPwmChannel, 1);
SetupGpio(2, PortB, NoPwmChannel, 2);
@@ -228,42 +265,18 @@ typedef Gpio<PortB, 0> UartSpiXCK;
typedef Gpio<PortD, 1> UartSpiTX;
typedef Gpio<PortD, 0> UartSpiRX;
-#else
+#define HAS_USART0
+#define HAS_USART1
-// Pin definitions for ATmega168p and ATmega328p
-SetupGpio(0, PortD, NoPwmChannel, 0);
-SetupGpio(1, PortD, NoPwmChannel, 1);
-SetupGpio(2, PortD, NoPwmChannel, 2);
-SetupGpio(3, PortD, PwmChannel2B, 3);
-SetupGpio(4, PortD, NoPwmChannel, 4);
-SetupGpio(5, PortD, PwmChannel0B, 5);
-SetupGpio(6, PortD, PwmChannel0A, 6);
-SetupGpio(7, PortD, NoPwmChannel, 7);
-SetupGpio(8, PortB, NoPwmChannel, 0);
-SetupGpio(9, PortB, PwmChannel1A, 1);
-SetupGpio(10, PortB, PwmChannel1B, 2);
-SetupGpio(11, PortB, PwmChannel2A, 3);
-SetupGpio(12, PortB, NoPwmChannel, 4);
-SetupGpio(13, PortB, NoPwmChannel, 5);
-SetupGpio(14, PortC, NoPwmChannel, 0);
-SetupGpio(15, PortC, NoPwmChannel, 1);
-SetupGpio(16, PortC, NoPwmChannel, 2);
-SetupGpio(17, PortC, NoPwmChannel, 3);
-SetupGpio(18, PortC, NoPwmChannel, 4);
-SetupGpio(19, PortC, NoPwmChannel, 5);
-
-SetupGpio(255, PortB, NoPwmChannel, 0);
+#ifdef ATMEGA1284P
+#define HAS_TIMER3
+#endif
-typedef Gpio<PortB, 5> SpiSCK;
-typedef Gpio<PortB, 4> SpiMISO;
-typedef Gpio<PortB, 3> SpiMOSI;
-typedef Gpio<PortB, 2> SpiSS;
+#else
-typedef Gpio<PortD, 4> UartSpiXCK;
-typedef Gpio<PortD, 1> UartSpiTX;
-typedef Gpio<PortD, 0> UartSpiRX;
+#error Unsupported MCU type
-#endif // ATMEGA328P
+#endif
// Two specializations of the numbered pin template, one which clears the timer
// for each access to the PWM pins, as does the original Arduino wire lib,
View
10 serial.cc
@@ -27,28 +27,32 @@ using namespace avrlib;
#ifdef SERIAL_RX_0
-#ifndef ATMEGA328P
+#if defined(HAS_USART0) && defined(HAS_USART1)
ISR(USART0_RX_vect) {
SerialInput<SerialPort0>::Received();
}
-#else
+#elif defined(HAS_USART0)
ISR(USART_RX_vect) {
SerialInput<SerialPort0>::Received();
}
-#endif // ATMEGA328P
+#endif // #ifdef HAS_USART
#endif // SERIAL_RX_0
#ifdef SERIAL_RX_1
+#ifdef HAS_USART1
+
ISR(USART1_RX_vect) {
SerialInput<SerialPort1>::Received();
}
+#endif // #ifdef HAS_USART1
+
#endif // SERIAL_RX_1
View
10 serial.h
@@ -241,6 +241,9 @@ struct Serial {
static inline Value ImmediateRead() { return Impl::IO::ImmediateRead(); }
};
+
+#ifdef HAS_USART0
+
IORegister(UBRR0H);
IORegister(UBRR0L);
IORegister(UCSR0A);
@@ -260,7 +263,10 @@ typedef SerialPort<
kSerialOutputBufferSize,
kSerialInputBufferSize> SerialPort0;
-#ifndef ATMEGA328P
+#endif // #ifdef HAS_USART0
+
+
+#ifdef HAS_USART1
IORegister(UBRR1H);
IORegister(UBRR1L);
@@ -281,7 +287,7 @@ typedef SerialPort<
kSerialOutputBufferSize,
kSerialInputBufferSize> SerialPort1;
-#endif // ATMEGA328P
+#endif // #ifdef HAS_USART1
} // namespace avrlib
View
12 timer.h
@@ -49,14 +49,14 @@ SpecialFunctionRegister(OCR1B);
SpecialFunctionRegister(OCR2A);
SpecialFunctionRegister(OCR2B);
-#ifdef ATMEGA1284P
+#ifdef HAS_TIMER3
SpecialFunctionRegister(TCCR3A);
SpecialFunctionRegister(TCCR3B);
SpecialFunctionRegister(TIMSK3);
SpecialFunctionRegister(TCNT3);
SpecialFunctionRegister(OCR3A);
SpecialFunctionRegister(OCR3B);
-#endif // ATMEGA1284P
+#endif // HAS_TIMER3
enum TimerMode {
TIMER_NORMAL = 0,
@@ -130,7 +130,7 @@ template<> struct NumberedTimer<2> {
TCNT2Register> Impl;
};
-#ifdef ATMEGA1284P
+#ifdef HAS_TIMER3
template<> struct NumberedTimer<3> {
typedef TimerImpl<
TCCR3ARegister,
@@ -138,7 +138,7 @@ template<> struct NumberedTimer<3> {
TIMSK3Register,
TCNT3Register> Impl;
};
-#endif // ATMEGA1284P
+#endif // HAS_TIMER3
template<int n>
struct Timer {
@@ -190,9 +190,9 @@ typedef PwmChannel<Timer<2>, COM2B1, OCR2BRegister> PwmChannel2B;
#define TIMER_1_TICK ISR(TIMER1_OVF_vect)
#define TIMER_2_TICK ISR(TIMER2_OVF_vect)
-#ifdef ATMEGA1284P
+#ifdef HAS_TIMER3
#define TIMER_3_TICK ISR(TIMER3_OVF_vect)
-#endif // ATMEGA1284P
+#endif // HAS_TIMER3
} // namespace avrlib

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