From ccc9abbe56f7810cd0a99a5335ad3905fc535711 Mon Sep 17 00:00:00 2001 From: longsky Date: Fri, 14 Sep 2018 12:16:56 +0800 Subject: [PATCH 1/2] add depends libs --- requirements.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/requirements.txt b/requirements.txt index 227193d..500726d 100644 --- a/requirements.txt +++ b/requirements.txt @@ -1,3 +1,4 @@ pefile pyelftools msgpack-python>=0.4.6 +nose From 30db8c3d66cc6801f1121ca0302be69a6017f14d Mon Sep 17 00:00:00 2001 From: longsky Date: Fri, 14 Sep 2018 12:45:11 +0800 Subject: [PATCH 2/2] fix crash 'IndexError: list index out of range' --- plasma/lib/arch/arm/utils.py | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/plasma/lib/arch/arm/utils.py b/plasma/lib/arch/arm/utils.py index b493b32..9074fb6 100644 --- a/plasma/lib/arch/arm/utils.py +++ b/plasma/lib/arch/arm/utils.py @@ -45,6 +45,8 @@ def is_cmp(i): return i.id == ARM_INS_CMP def is_jump(i): + if len(i.operands) <= 0 : + return False # Suppose that the written register is the first operand op = i.operands[0] @@ -67,6 +69,8 @@ def is_uncond_jump(i): return is_jump(i) and i.cc == ARM_CC_AL def is_ret(i): + if len(i.operands) <= 0 : + return False op = i.operands[0] return i.group(CS_GRP_RET) or i.id == ARM_INS_BX and \ op.type == ARM_OP_REG and op.value.reg == ARM_REG_LR