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- Nagpur, India
Synthesizable and Parameterized Cache Controller in Verilog
This repo contains a source code in Python as well CUDA for VRP
Modified RF24 Library with added functions like sendtxt through which user can directly send strings to another nrf24l01 device. Also added respective examples.
Forked from parallella/oh
Modular Verilog library for chip (and FPGA) designers
Forked from kehribar/nrf24L01_plus
Portable nrf24L01+ library with auto acknowledgement and auto retransmission support.
Forked from jscrane/RF24
Arduino driver for nRF24L01