From 47f14016e613a2837a484eabd2097a2a0b4f9acd Mon Sep 17 00:00:00 2001 From: zilmar Date: Thu, 24 Aug 2023 10:35:51 +0930 Subject: [PATCH] RSP: Set RSP_JumpTo before register in JALR, BLTZAL, BGEZAL --- Source/Project64-rsp-core/cpu/RSPInterpreterOps.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Source/Project64-rsp-core/cpu/RSPInterpreterOps.cpp b/Source/Project64-rsp-core/cpu/RSPInterpreterOps.cpp index 7033e73780..bdaa9386c2 100644 --- a/Source/Project64-rsp-core/cpu/RSPInterpreterOps.cpp +++ b/Source/Project64-rsp-core/cpu/RSPInterpreterOps.cpp @@ -275,8 +275,8 @@ void RSP_Special_JR(void) void RSP_Special_JALR(void) { RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT; - RSP_GPR[RSPOpC.rd].W = (*PrgCount + 8) & 0xFFC; RSP_JumpTo = (RSP_GPR[RSPOpC.rs].W & 0xFFC); + RSP_GPR[RSPOpC.rd].W = (*PrgCount + 8) & 0xFFC; } void RSP_Special_BREAK(void) @@ -357,15 +357,15 @@ void RSP_Opcode_BGEZ(void) void RSP_Opcode_BLTZAL(void) { RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT; - RSP_GPR[31].UW = (*PrgCount + 8) & 0xFFC; RSP_JumpTo = RSP_branch_if(RSP_GPR[RSPOpC.rs].W < 0); + RSP_GPR[31].UW = (*PrgCount + 8) & 0xFFC; } void RSP_Opcode_BGEZAL(void) { RSP_NextInstruction = RSPPIPELINE_DELAY_SLOT; - RSP_GPR[31].UW = (*PrgCount + 8) & 0xFFC; RSP_JumpTo = RSP_branch_if(RSP_GPR[RSPOpC.rs].W >= 0); + RSP_GPR[31].UW = (*PrgCount + 8) & 0xFFC; } // COP0 functions