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Power Management: Guest control #3158

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Mingyuan18 opened this issue May 23, 2019 · 2 comments

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@Mingyuan18
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commented May 23, 2019

<edited 5/20/2019> CxPx control involves ACPI table with data specific to a particular SOC, so the implimentation varies from SOC to SOC. This epic is valid only for POR SOCs:

Core i7-8650U (in NUC7i7DNHE)
Celeron J3455 (in NUC6CAYH). And in this NUC, BIOS setting matters as mentioned in ACRN-1928
</edit 5/20/2019>

For CPU static CPU partitioning, the hypervisor and VM's shall support guest-controlled CPU Cx/Px states.

@Mingyuan18

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commented May 23, 2019

[External_System_ID] ACRN-3570

jsun26intel added a commit to jsun26intel/acrn-hypervisor that referenced this issue May 23, 2019
HV: add px cx data for kbl nuc refresh
Add Px/Cx data of Intel Core(TM) i7-8650U CPU which used by NUC7i7DNH to
enable guest controlled CPU power states;

Tracked-On: projectacrn#3158

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
jsun26intel added a commit to jsun26intel/acrn-hypervisor that referenced this issue May 23, 2019
HV: validate pstate by checking px ctl range
The previous function just check the pstate target value in PERF_CTL msr
by indexing px data control value which comes from ACPI table, this would
bring a bug in the case that guest is running intel_pstate_driver:
the turbo pstate target value from intel_pstate driver is in a range
instead of fixed value in ACPI _PSS table, thus the turbo px request would
be rejected. This patch fixed this issue.

Tracked-On: projectacrn#3158

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
jsun26intel added a commit to jsun26intel/acrn-hypervisor that referenced this issue May 23, 2019
HV: enforce Cx of apl nuc with SPACE_SYSTEM_IO
APL NUC would expose different MWAIT support status with different
BIOS configuration, then the acpi idle driver would have problem if
we provide MWAIT Cx data only. Now we will enforce guest enter port
IO Cx even BIOS expose support of MWAIT.

Given all Broxton family share same port IO Cx data, we use a unified
struct cpu_cx_data cx_bxt[] for all Broxton SoCs;

Tracked-On: projectacrn#3158

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
jsun26intel added a commit to jsun26intel/acrn-hypervisor that referenced this issue May 23, 2019
HV: add px cx data for kbl nuc refresh
Add Px/Cx data of Intel Core(TM) i7-8650U CPU which used by NUC7i7DNH to
enable guest controlled CPU power states;

Tracked-On: projectacrn#3158

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
jsun26intel added a commit to jsun26intel/acrn-hypervisor that referenced this issue May 23, 2019
HV: validate pstate by checking px ctl range
The previous function just check the pstate target value in PERF_CTL msr
by indexing px data control value which comes from ACPI table, this would
bring a bug in the case that guest is running intel_pstate_driver:
the turbo pstate target value from intel_pstate driver is in a range
instead of fixed value in ACPI _PSS table, thus the turbo px request would
be rejected. This patch fixed this issue.

Tracked-On: projectacrn#3158

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
jsun26intel added a commit to jsun26intel/acrn-hypervisor that referenced this issue May 23, 2019
HV: enforce Cx of apl nuc with SPACE_SYSTEM_IO
APL NUC would expose different MWAIT support status with different
BIOS configuration, then the acpi idle driver would have problem if
we provide MWAIT Cx data only. Now we will enforce guest enter port
IO Cx even BIOS expose support of MWAIT.

Given all Broxton family share same port IO Cx data, we use a unified
struct cpu_cx_data cx_bxt[] for all Broxton SoCs;

Tracked-On: projectacrn#3158

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
acrnsi added a commit that referenced this issue May 24, 2019
HV: add px cx data for kbl nuc refresh
Add Px/Cx data of Intel Core(TM) i7-8650U CPU which used by NUC7i7DNH to
enable guest controlled CPU power states;

Tracked-On: #3158

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
acrnsi added a commit that referenced this issue May 24, 2019
HV: validate pstate by checking px ctl range
The previous function just check the pstate target value in PERF_CTL msr
by indexing px data control value which comes from ACPI table, this would
bring a bug in the case that guest is running intel_pstate_driver:
the turbo pstate target value from intel_pstate driver is in a range
instead of fixed value in ACPI _PSS table, thus the turbo px request would
be rejected. This patch fixed this issue.

Tracked-On: #3158

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
acrnsi added a commit that referenced this issue May 24, 2019
HV: enforce Cx of apl nuc with SPACE_SYSTEM_IO
APL NUC would expose different MWAIT support status with different
BIOS configuration, then the acpi idle driver would have problem if
we provide MWAIT Cx data only. Now we will enforce guest enter port
IO Cx even BIOS expose support of MWAIT.

Given all Broxton family share same port IO Cx data, we use a unified
struct cpu_cx_data cx_bxt[] for all Broxton SoCs;

Tracked-On: #3158

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
@Mingyuan18

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commented Jun 10, 2019

Basic feature acceptance tests passed on 29690

@Mingyuan18 Mingyuan18 closed this Jun 10, 2019

@Mingyuan18 Mingyuan18 added this to v1.1 in Roadmap Jun 27, 2019

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