From ab1520088a7869b9d9a5e9d4e9a5e796c19ef118 Mon Sep 17 00:00:00 2001 From: Diyou Shen Date: Fri, 29 Sep 2023 15:13:23 +0200 Subject: [PATCH] LLC-Partitioning: Fix latch problems in synthesis. --- Bender.lock | 4 ++-- Bender.yml | 4 ++-- sw/tests/helloworld.c | 24 ------------------------ target/xilinx/src/cheshire_top_xilinx.sv | 2 ++ 4 files changed, 6 insertions(+), 28 deletions(-) diff --git a/Bender.lock b/Bender.lock index b3b37c05e..0c8cad171 100644 --- a/Bender.lock +++ b/Bender.lock @@ -24,7 +24,7 @@ packages: - common_verification - tech_cells_generic axi_llc: - revision: ef30225613a585b96264866f866c5e36e23f1481 + revision: 7d7fc1349d4915a657de535a491bc26fbf0d2cfa version: null source: Git: https://github.com/pulp-platform/axi_llc.git @@ -172,7 +172,7 @@ packages: - common_cells - register_interface tagger: - revision: 044d92c17728e7c608cd6678d01ec2d749c7ab83 + revision: 2149244de2a9914cff33722d0d527ca3c1b3c877 version: null source: Git: git@iis-git.ee.ethz.ch:dishen/tagger.git diff --git a/Bender.yml b/Bender.yml index 99eba9a25..28934a4f9 100644 --- a/Bender.yml +++ b/Bender.yml @@ -14,7 +14,7 @@ package: dependencies: apb_uart: { git: "https://github.com/pulp-platform/apb_uart.git", version: 0.2.1 } axi: { git: "https://github.com/pulp-platform/axi", rev: 4fb5a02 } - axi_llc: { git: "https://github.com/pulp-platform/axi_llc", rev: ef30225 } + axi_llc: { git: "https://github.com/pulp-platform/axi_llc", rev: 7d7fc13 } axi_riscv_atomics: { git: "https://github.com/pulp-platform/axi_riscv_atomics.git", version: 0.8.1 } axi_rt: { git: "https://github.com/pulp-platform/axi_rt.git", version: 0.0.0-alpha.3 } axi_vga: { git: "https://github.com/pulp-platform/axi_vga.git", version: 0.1.1 } @@ -29,7 +29,7 @@ dependencies: register_interface: { git: "https://github.com/pulp-platform/register_interface.git", version: 0.4.2 } riscv-dbg: { git: "https://github.com/pulp-platform/riscv-dbg.git", version: 0.8.0 } serial_link: { git: "https://github.com/pulp-platform/serial_link.git", version: 1.1.0 } - tagger: { git: "git@iis-git.ee.ethz.ch:dishen/tagger.git", rev: 044d92c } + tagger: { git: "git@iis-git.ee.ethz.ch:dishen/tagger.git", rev: 2149244 } unbent: { git: "https://github.com/pulp-platform/unbent.git", version: 0.1.5 } export_include_dirs: diff --git a/sw/tests/helloworld.c b/sw/tests/helloworld.c index afe3643d6..ee3702e4c 100644 --- a/sw/tests/helloworld.c +++ b/sw/tests/helloworld.c @@ -15,30 +15,6 @@ #include "regs/axi_llc.h" int main(void) { - - // Configure LLC partitioning - uint32_t *a = (0x03001054); - *a = 0xa000; // give pat0 size 0xa0 - a = (0x03001064); // commit changes for llc - *a = 1; - - // Configure Tagger for partitioning - - a = (0x0300a004); // set addr range from 0 to 0xffff_ffff - *a = (0xffffffff >> 2); - a = (0x0300a050); // set TOR mode - *a = 1; - a = (0x0300a044); // set user signal to 1 - *a = 1; - a = (0x0300a000); // commit changes for tagger - *a = 1; - - // Switch LLC into non-SPM mode - a = (0x03001000); - *a = 0; - a = (0x03001010); - *a = 1; - char str[] = "Hello World!\r\n"; uint32_t rtc_freq = *reg32(&__base_regs, CHESHIRE_RTC_FREQ_REG_OFFSET); uint64_t reset_freq = clint_get_core_freq(rtc_freq, 2500); diff --git a/target/xilinx/src/cheshire_top_xilinx.sv b/target/xilinx/src/cheshire_top_xilinx.sv index 802b9c72a..f9ef433a1 100644 --- a/target/xilinx/src/cheshire_top_xilinx.sv +++ b/target/xilinx/src/cheshire_top_xilinx.sv @@ -127,6 +127,8 @@ module cheshire_top_xilinx LlcCachePartition : 0, LlcMaxPartition : 0, LlcRemapHash : axi_llc_pkg::Modulo, + LlcUserAmoMsb : 6, + LlcUserAmoLsb : 2, // VGA: RGB332 VgaRedWidth : 5, VgaGreenWidth : 6,