update

.project

@@ -8,6 +8,7 @@
 	<buildSpec>
 		<buildCommand>
 			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
 			<arguments>
 			</arguments>
 		</buildCommand>

.settings/language.settings.xml

@@ -5,7 +5,7 @@
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-948251149478650085" id="ilg.gnuarmeclipse.managedbuild.cross.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT GCC Built-in Compiler Settings Cross ARM" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+			<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-897121475649177215" id="ilg.gnuarmeclipse.managedbuild.cross.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT GCC Built-in Compiler Settings Cross ARM" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>
@@ -16,7 +16,7 @@
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-948251149478650085" id="ilg.gnuarmeclipse.managedbuild.cross.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT GCC Built-in Compiler Settings Cross ARM" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+			<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-897121475649177215" id="ilg.gnuarmeclipse.managedbuild.cross.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT GCC Built-in Compiler Settings Cross ARM" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>
@@ -27,7 +27,7 @@
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-997554102294574118" id="ilg.gnuarmeclipse.managedbuild.cross.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT GCC Built-in Compiler Settings Cross ARM" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+			<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-950027335418731358" id="ilg.gnuarmeclipse.managedbuild.cross.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT GCC Built-in Compiler Settings Cross ARM" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>

RTL00_SDKV35a/component/common/api/wifi/wifi_conf.c

@@ -32,7 +32,7 @@ extern int inic_stop(void);
 #define printf(...)
 #endif
 
-#define sscanf	_sscanf
+//#define sscanf	_sscanf
 
 #define SHOW_PRIVATE_OUT 1 // =0 - off, = 1 On
 
@@ -62,6 +62,7 @@ extern int inic_stop(void);
  *               Variables Declarations
  ******************************************************/
 
+
 extern struct netif xnetif[NET_IF_NUM];
 
 /******************************************************
@@ -70,7 +71,8 @@ extern struct netif xnetif[NET_IF_NUM];
 static internal_scan_handler_t scan_result_handler_ptr = { 0, 0, 0, RTW_FALSE,
 		0, 0, 0, 0, 0 };
 static internal_join_result_t* join_user_data;
-extern rtw_mode_t wifi_mode;
+rtw_mode_t wifi_mode = RTW_MODE_NONE;
+//extern rtw_mode_t wifi_mode;
 int error_flag = RTW_UNKNOWN;
 uint32_t rtw_join_status;
 #if ATCMD_VER == ATVER_2

RTL00_SDKV35a/component/soc/realtek/8195a/cmsis/device/rtl_stdlib.h

@@ -9,7 +9,7 @@
 
 #ifndef _RTL_STDLIB_H_
 #define _RTL_STDLIB_H_
-
+#if 0
 #include <basic_types.h>
 #include <strproc.h>
 #include <diag.h>
@@ -19,7 +19,7 @@
 //
 #define strlen(str)						prvStrLen((const u8*)str)
 #define strcmp(str1, str2)				prvStrCmp((const u8*)str1, (const u8*)str2)
-#define sscanf(src, format...)			//TODO: Strtoul(src,0,16) / Strtoul(src,0,10)
+//#define sscanf(src, format...)			//TODO: Strtoul(src,0,16) / Strtoul(src,0,10)
 #define strtok(str, delim)				prvStrTok(str, delim)
 #define strcpy(dst, src)				prvStrCpy((u8 *)dst, (const u8*)src)
 #define atoi(str)						prvAtoi(str)
@@ -37,5 +37,5 @@
 //
 #define malloc 							pvPortMalloc
 #define free							vPortFree
-
+#endif
 #endif //_RTL_STDLIB_H_

RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.c

@@ -10,7 +10,7 @@
  */
 
 #include "rtl_bios_data.h"
-
+extern void * UartLogRomCmdTable;
 /* ROM + startup.c */
 RAM_DEDECATED_VECTOR_TABLE_SECTION IRQ_FUN NewVectorTable[64];	// 10000000
 RAM_USER_IRQ_FUN_TABLE_SECTION IRQ_FUN UserIrqFunTable[64];		// 10000100
@@ -37,9 +37,29 @@ INFRA_RAM_BSS_SECTION u32 _rand_z4, _rand_z3, _rand_z2, _rand_z1, _rand_first; /
 /* ROM + RTL_CONSOL */
 MON_RAM_BSS_SECTION	u8 *ArgvArray[MAX_ARGV]; // 100006AC *ArgvArray[10] !
 MON_RAM_BSS_SECTION u8 UartLogHistoryBuf[UART_LOG_HISTORY_LEN][UART_LOG_CMD_BUFLEN]; // 10000430 UartLogHistoryBuf[5][127] !
-MON_RAM_BSS_SECTION volatile UART_LOG_CTL	UartLogCtl;		// 10000408
+MON_RAM_BSS_SECTION volatile UART_LOG_CTL UartLogCtl; // 10000408
+/*
+= {
+		.NewIdx = 0,
+		.SeeIdx = 0,
+		.RevdNo  = UART_LOG_HISTORY_LEN,
+		.EscSTS = 0,
+		.ExecuteCmd = 0,
+		.ExecuteEsc = 0,
+		.BootRdy = 0,
+		.Resvd = 0,
+		.pTmpLogBuf = &UartLogBuf,
+		.pfINPUT = (void*) &DiagPrintf,
+		.pCmdTbl = (PCOMMAND_TABLE) &UartLogRomCmdTable,
+		.CmdTblSz = 6,
+		.CRSTS = 0,
+		.pHistoryBuf = UartLogHistoryBuf,
+		.TaskRdy = 0
+//		.Sema
+};
+*/
 MON_RAM_BSS_SECTION UART_LOG_BUF			UartLogBuf;		// 10000388
-MON_RAM_BSS_SECTION volatile UART_LOG_CTL	*pUartLogCtl;	// 10000384
+MON_RAM_BSS_SECTION volatile UART_LOG_CTL	*pUartLogCtl = &UartLogCtl;	// 10000384
 /* ROM + LIB C */
 LIBC_RAM_BSS_SECTION int __rtl_errno;		// 10000bc4 __rtl_sread_v1_00(), __rtl_write_v1_00(), __rtl_lseek_v1_00(), __rtl_close_v1_00(), __rtl_sbrk_v1_00()..
 LIBC_RAM_BSS_SECTION struct mallinfo __rtl_malloc_current_mallinfo; // 10000b9c __rom_mallocr_init_v1_00()

RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c

@@ -16,10 +16,10 @@
 
 #define DEFAULT_BAUDRATE UART_BAUD_RATE_38400
 
-#define BOOT_RAM_TEXT_SECTION __attribute__((section(".ram.boot.text")))
-//#define BOOT_RAM_RODATA_SECTION __attribute__((section(".ram.boot.rodata")))
-//#define BOOT_RAM_DATA_SECTION __attribute__((section(".ram.boot.data")))
-//#define BOOT_RAM_BSS_SECTION __attribute__((section(".ram.boot.bss")))
+#define BOOT_RAM_TEXT_SECTION // __attribute__((section(".boot.text")))
+//#define BOOT_RAM_RODATA_SECTION __attribute__((section(".boot.rodata")))
+//#define BOOT_RAM_DATA_SECTION __attribute__((section(".boot.data")))
+//#define BOOT_RAM_BSS_SECTION __attribute__((section(".boot.bss")))
 
 //-------------------------------------------------------------------------
 // Function declarations
@@ -32,14 +32,11 @@ extern _LONG_CALL_ VOID VectorTableInitRtl8195A(u32 StackP);
 extern _LONG_CALL_ VOID HalInitPlatformLogUartV02(VOID);
 extern _LONG_CALL_ VOID HalInitPlatformTimerV02(VOID);
 
-//#pragma arm section code = ".ram.boot.text";
-//#pragma arm section rodata = ".ram.boot.rodata", rwdata = ".ram.boot.data", zidata = ".ram.boot.bss";
+//#pragma arm section code = ".boot.text";
+//#pragma arm section rodata = ".boot.rodata", rwdata = ".boot.data", zidata = ".boot.bss";
 
 typedef void (*START_FUNC)(void);
 
-PRAM_FUNCTION_START_TABLE __attribute__((section(".data.pRamStartFun"))) pRamStartFun =
-		(PRAM_FUNCTION_START_TABLE) 0x10000BC8;
-
 /* Start table: */
 START_RAM_FUN_SECTION RAM_FUNCTION_START_TABLE __ram_start_table_start__ = {
 		RtlBootToSram + 1,	// StartFun(),	Run if ( v400001F4 & 0x8000000 ) && ( v40000210 & 0x80000000 )

RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/startup.c

@@ -18,7 +18,6 @@
 #include "wifi_conf.h"
 #include "rtl_consol.h"
 
-
 //#define INFRA_START_SECTION __attribute__((section(".infra.ram.start")))
 
 //-------------------------------------------------------------------------
@@ -28,7 +27,7 @@ extern void HalWdgIntrHandle(void);
 extern void xPortPendSVHandler(void);
 extern void xPortSysTickHandler(void);
 extern void vPortSVCHandler(void);
-extern void ShowRamBuildInfo(void); // app_start.c: VOID ShowRamBuildInfo(VOID)
+//extern void ShowRamBuildInfo(void); // app_start.c: VOID ShowRamBuildInfo(VOID)
 void HalNMIHandler_Patch(void);
 void SDIO_Device_Off(void);
 void VectorTableOverrideRtl8195A(u32 StackP);
@@ -37,11 +36,10 @@ void SYSPlatformInit(void);
 //-------------------------------------------------------------------------
 // Data declarations
 extern u8 __bss_start__, __bss_end__;
+//extern HAL_TIMER_OP	HalTimerOp;
 
-IMAGE2_START_RAM_FUN_SECTION RAM_START_FUNCTION gImage2EntryFun0 = { InfraStart
-		+ 1 };
-
-// HAL_GPIO_ADAPTER PINMUX_RAM_DATA_SECTION gBoot_Gpio_Adapter;
+IMAGE2_START_RAM_FUN_SECTION RAM_START_FUNCTION gImage2EntryFun0 =
+	{ InfraStart + 1 };
 
 //----- HalNMIHandler_Patch
 void HalNMIHandler_Patch(void) {
@@ -50,21 +48,23 @@ void HalNMIHandler_Patch(void) {
 		HalWdgIntrHandle(); // ROM: HalWdgIntrHandle = 0x3485;
 }
 
+/*
 //----- VectorTableOverrideRtl8195A
 void INFRA_START_SECTION VectorTableOverrideRtl8195A(u32 StackP) {
 	NewVectorTable[2] = HalNMIHandler_Patch;
 }
+*/
 
 //----- SYSPlatformInit
 void INFRA_START_SECTION SYSPlatformInit(void) {
 	HAL_SYS_CTRL_WRITE32(REG_SYS_EFUSE_SYSCFG0,
 			(HAL_SYS_CTRL_READ32(REG_SYS_EFUSE_SYSCFG0)
 			& (~(BIT_MASK_SYS_EEROM_LDO_PAR_07_04 << BIT_SHIFT_SYS_EEROM_LDO_PAR_07_04)))
-				| BIT_SYS_EEROM_LDO_PAR_07_04(6)); // & 0xF0FFFFFF | 0x6000000
+			| BIT_SYS_EEROM_LDO_PAR_07_04(6)); // & 0xF0FFFFFF | 0x6000000
 	HAL_SYS_CTRL_WRITE32(REG_SYS_XTAL_CTRL1,
 			(HAL_SYS_CTRL_READ32(REG_SYS_XTAL_CTRL1)
 			& (~(BIT_MASK_SYS_XTAL_DRV_RF1 << BIT_SHIFT_SYS_XTAL_DRV_RF1)))
-				| BIT_SYS_XTAL_DRV_RF1(1)); //  & 0xFFFFFFE7 | 8;
+			| BIT_SYS_XTAL_DRV_RF1(1)); //  & 0xFFFFFFE7 | 8;
 }
 
 //----- SDIO_Device_Off
@@ -80,31 +80,90 @@ void INFRA_START_SECTION SDIO_Device_Off(void) {
 			& (~(BIT_HCI_SDIOD_PIN_EN)));
 }
 
+__weak void __low_level_init(void) {
+	// weak function
+}
+
+// weak main function !
+__weak int main(void) {
+	HalPinCtrlRtl8195A(JTAG, 0, 1);
+
+	DiagPrintf("\r\nRTL Console ROM: Start - press key 'Up', Help '?'\r\n");
+	while (pUartLogCtl->ExecuteEsc != 1);
+	pUartLogCtl->RevdNo = 0;
+	pUartLogCtl->BootRdy = 1;
+	DiagPrintf("\r<RTL8710AF>");
+	while (1) {
+		while (pUartLogCtl->ExecuteCmd != 1);
+		UartLogCmdExecute(pUartLogCtl);
+		DiagPrintf("\r<RTL8710AF>");
+		pUartLogCtl->ExecuteCmd = 0;
+	}
+
+	return 0;
+}
+
 //----- InfraStart
 void INFRA_START_SECTION InfraStart(void) {
 	NewVectorTable[2] = HalNMIHandler_Patch;
-	HAL_SYS_CTRL_WRITE32(REG_SYS_CLK_CTRL0,
-			HAL_SYS_CTRL_READ32(REG_SYS_CLK_CTRL0) | BIT4);
-	if (HalCommonInit() != HAL_OK)
-		DBG_8195A("Hal Common Init Failed.\n");
+#ifdef CONFIG_TIMER_MODULE
+	HalTimerOpInit_Patch((VOID*) (&HalTimerOp));
+#endif
+//	HAL_SYS_CTRL_WRITE32(REG_SYS_CLK_CTRL0,	HAL_SYS_CTRL_READ32(REG_SYS_CLK_CTRL0) | BIT4);
 	DBG_8195A("==!== Enter Image 2 ====\n");
-	ShowRamBuildInfo(); // app_start.c: VOID ShowRamBuildInfo(VOID)
+//	ShowRamBuildInfo(); // app_start.c: VOID ShowRamBuildInfo(VOID)
 	memset(&__bss_start__, 0, &__bss_end__ - &__bss_start__);
-	int clk = (HAL_SYS_CTRL_READ32(REG_SYS_CLK_CTRL0)
-			>> BIT_SHIFT_PESOC_OCP_CPU_CK_SEL) & 1;
-	if (clk) {
+	int flash_en = HAL_PERI_ON_READ32(REG_SOC_FUNC_EN)
+			& (1 << BIT_SOC_FLASH_EN);
+	if (flash_en) {
+		if(!SpicCmpDataForCalibrationRtl8195A()) {
+			DBG_8195A("ReInit  SPIC...\n");
+			SpicInitRtl8195AV02(1,0);
+//			if(!SpicCmpDataForCalibrationRtl8195A()) {
+				// TODO: Spic Not Init!
+				// DBG_8195A("Spic error Init!\n");
+//			};
+		};
 		SpicNVMCalLoadAll();
 		SpicReadIDRtl8195A();
-	}
+	};
+    while(!(HAL_READ8(LOG_UART_REG_BASE, 0x14) & BIT6)); //	иначе глючит LogUART, если переключение CLK приходится на вывод символов !
+#if	CPU_CLOCK_SEL_DIV5_3
+	// 6 - 200000000 Hz, 7 - 10000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000 Hz
+	HalCpuClkConfig(CPU_CLOCK_SEL_VALUE);
+	*((int *)(SYSTEM_CTRL_BASE+REG_SYS_SYSPLL_CTRL1)) |= (1<<17);// REG_SYS_SYSPLL_CTRL1 |= BIT_SYS_SYSPLL_DIV5_3
+#else
+	// 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000 Hz
+	*((int *) (SYSTEM_CTRL_BASE + REG_SYS_SYSPLL_CTRL1)) &= ~(1 << 17); // REG_SYS_SYSPLL_CTRL1 &= ~BIT_SYS_SYSPLL_DIV5_3
+	HalCpuClkConfig(CPU_CLOCK_SEL_VALUE);
+#endif
+	HalReInitPlatformLogUartV02();
+/*	HAL_LOG_UART_ADAPTER pUartAdapter;
+	pUartAdapter.BaudRate = UART_BAUD_RATE_38400;
+	HalLogUartSetBaudRate(&pUartAdapter); */
 	SystemCoreClockUpdate();
 	SYSPlatformInit();
 	En32KCalibration();
 	InitSoCPM();
 	SDIO_Device_Off();
 	VectorTableInitForOSRtl8195A(&vPortSVCHandler, &xPortPendSVHandler,
 			&xPortSysTickHandler);
-	if (clk)
+	if (flash_en)
 		SpicDisableRtl8195A();
-	_AppStart();
+#ifdef CONFIG_SDR_EN
+	// clear SDRAM bss
+	extern u8 __sdram_bss_start__[];
+	extern u8 __sdram_bss_end__[];
+	if((int)__sdram_bss_end__-(int)__sdram_bss_start__ > 0)
+	memset(__sdram_bss_start__, 0, (int)__sdram_bss_end__-(int)__sdram_bss_start__);
+#endif
+	// force SP align to 8 byte not 4 byte (initial SP is 4 byte align)
+	__asm(
+			"mov r0, sp\n"
+			"bic r0, r0, #7\n"
+			"mov sp, r0\n"
+	);
+	__low_level_init();
+	main();
 }
 

RTL00_SDKV35a/component/soc/realtek/8195a/misc/bsp/lib/common/GCC/rlx8195A-symbol-v04-img2.ld

@@ -56,7 +56,7 @@ SECTIONS
 	{
 		/* __ram_start_table_start__ = .; */
 		__ram_image1_text_start__ = .;
-		KEEP(*(SORT(.start.ram.data*))) 
+		KEEP(*(.boot.start.ram.data*)) 
 		/* __image1_validate_code__	= .; */
 		KEEP(*(.image1.validate.rodata))
 
@@ -67,18 +67,21 @@ SECTIONS
 		KEEP(*(.libc.reent)) 
 		KEEP(*(.rom.unc.data)) 
 		KEEP(*(.sdr.rand2.data))
-	    __ram_image_end__ = .;
-		/* 0x100020c0: end */
+
+	    PROVIDE (__ram_image_end__ = .);		/* 0x100020c0: end */
+
 		/* boot & images data */
+
 	    KEEP(*(.hal.ram.data))
 		KEEP(*(.hal.flash.data))
-		/* KEEP(*(.data));  ? */
-		build/obj/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_bios_data.o (.rodata*)
-		KEEP(*(.ram.boot.text))
-		build/obj/RTL00_SDKV35a/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.o (.rodata*)
+		KEEP(*(.boot.rodata*))
+		KEEP(*(.boot.text*))
+		KEEP(*(.boot.data))
 	    __image1_bss_start__ = .;
+		KEEP(*(.boot.bss*))
 	    __image1_bss_end__ = .;
 		__ram_image1_text_end__ = .;
+
 	} > BOOT_RAM
 
 	.romheap :
@@ -249,4 +252,5 @@ SECTIONS
 	{
 		KEEP(*(.loader.head*))
 	}
+	ASSERT(__ram_image_end__ != 0x100020c0, "Error rom-bios-boot code & data!") 
 }