This is some shared code for building FPGA projects using the Icestorm toolchain.
yosys- logic sythesis of Verilog
arachne-pnr- placement and routing
fpga-icestorm- transferring the design to the FPGA
iverilog- simulation and running test benches
gtkwave- viewing the simulation results
tinyprog- for TinyFPGA BX
iCEburn- for iceblink
The build system uses GNU make, bash and sed.
Just include the following in your Makefile:
fpga.mk.txt for list of possible commands.
components directory contains some useful Verilog modules:
Support for WaveShare monochrome and color displays (include with
This is a module for UART communication by Tim Goddard, copied here:
This is a module for 16 button keypad, like the one you can find here at SparkFun.
You're free to use all of the code under MIT license. See
uart.v does not belong to me, as mentioned above.