diff --git a/backends/qualcomm/serialization/qc_compiler_spec.fbs b/backends/qualcomm/serialization/qc_compiler_spec.fbs
index bd097fc5ccd..8dd0b93513f 100644
--- a/backends/qualcomm/serialization/qc_compiler_spec.fbs
+++ b/backends/qualcomm/serialization/qc_compiler_spec.fbs
@@ -36,6 +36,7 @@ enum QcomChipset: int {
   SM8550 = 43,
   SSG2115P = 46,
   SM8650 = 57,
+  SA8295 = 39,
 }
 
 /// Indicate the information of the specified SoC.
diff --git a/backends/qualcomm/serialization/qc_schema.py b/backends/qualcomm/serialization/qc_schema.py
index 816d8134184..e03cc842100 100644
--- a/backends/qualcomm/serialization/qc_schema.py
+++ b/backends/qualcomm/serialization/qc_schema.py
@@ -41,6 +41,7 @@ class QcomChipset(IntEnum):
     SM8550 = 43  # v73
     SSG2115P = 46  # v73
     SM8650 = 57  # v75
+    SA8295 = 39  # v68
 
 
 @dataclass
@@ -55,6 +56,7 @@ class SocInfo:
     QcomChipset.SM8550: SocInfo(QcomChipset.SM8550, HtpInfo(HtpArch.V73, 8)),
     QcomChipset.SM8650: SocInfo(QcomChipset.SM8650, HtpInfo(HtpArch.V75, 8)),
     QcomChipset.SSG2115P: SocInfo(QcomChipset.SSG2115P, HtpInfo(HtpArch.V73, 2)),
+    QcomChipset.SA8295: SocInfo(QcomChipset.SA8295, HtpInfo(HtpArch.V68, 8)),
 }
 
 
diff --git a/backends/qualcomm/utils/utils.py b/backends/qualcomm/utils/utils.py
index 4bda07fdc2b..590ede74319 100644
--- a/backends/qualcomm/utils/utils.py
+++ b/backends/qualcomm/utils/utils.py
@@ -967,6 +967,7 @@ def get_soc_to_arch_map():
         "SM8550": HtpArch.V73,
         "SM8475": HtpArch.V69,
         "SM8450": HtpArch.V69,
+        "SA8295": HtpArch.V68,
     }
 
 
@@ -977,6 +978,7 @@ def get_soc_to_chipset_map():
         "SM8550": QcomChipset.SM8550,
         "SM8475": QcomChipset.SM8475,
         "SM8450": QcomChipset.SM8450,
+        "SA8295": QcomChipset.SA8295,
     }