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x87 instructions in a separate function\n target/i386: remove now-converted opcodes from old decoder\n target/i386: port extensions of one-byte opcodes to new decoder\n target/i386: move BSWAP to new decoder\n target/i386: move remaining conditional operations to new decoder\n target/i386: merge and enlarge a few ranges for call to disas_insn_new\n target/i386: move C0-FF opcodes to new decoder (except for x87)\n target/i386: generalize gen_movl_seg_T0\n target/i386: move 60-BF opcodes to new decoder\n target/i386: allow instructions with more than one immediate\n target/i386: extract gen_far_call/jmp, reordering temporaries\n target/i386: move 00-5F opcodes to new decoder\n target/i386: reintroduce debugging mechanism\n target/i386: cleanup *gen_eob*\n target/i386: clarify the \"reg\" argument of functions returning CCPrepare\n target/i386: do not use s->T0 and s->T1 as scratch registers for CCPrepare\n target/i386: extend cc_* when using them to compute flags\n target/i386: pull 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conditional operations to new decoder\n target/i386: merge and enlarge a few ranges for call to disas_insn_new\n target/i386: move C0-FF opcodes to new decoder (except for x87)\n target/i386: generalize gen_movl_seg_T0\n target/i386: move 60-BF opcodes to new decoder\n target/i386: allow instructions with more than one immediate\n target/i386: extract gen_far_call/jmp, reordering temporaries\n target/i386: move 00-5F opcodes to new decoder\n target/i386: reintroduce debugging mechanism\n target/i386: cleanup *gen_eob*\n target/i386: clarify the \"reg\" argument of functions returning CCPrepare\n target/i386: do not use s->T0 and s->T1 as scratch registers for CCPrepare\n target/i386: extend cc_* when using them to compute flags\n target/i386: pull cc_op update to callers of gen_jmp_rel{,_csize}\n ...\n\nSigned-off-by: Richard Henderson ","shortMessageHtmlLink":"Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into 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underflow can be calculated as:\n\n T = ((Rn ^ Rm) & (Result ^ Rn)) >> 31\n\nHowever we were using the incorrect:\n\n T = ((Rn ^ Rm) & (Result ^ Rm)) >> 31\n\nFix by using the Rn register instead of Rm.\n\nAdd tests provided by Paul Cercueil.\n\nCc: qemu-stable@nongnu.org\nFixes: ad8d25a11f (\"target-sh4: implement addv and subv using TCG\")\nReported-by: Paul Cercueil \nSuggested-by: Paul Cercueil \nResolves: https://gitlab.com/qemu-project/qemu/-/issues/2318\nReviewed-by: Richard Henderson \nSigned-off-by: Philippe Mathieu-Daudé \nReviewed-by: Yoshinori Sato \nMessage-Id: <20240430163125.77430-3-philmd@linaro.org>\n(cherry picked from commit e88a856efd1d3c3ffa8e53da4831eff8da290808)\nSigned-off-by: Michael Tokarev ","shortMessageHtmlLink":"target/sh4: Fix SUBV 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pz76Hr8=\n# =i2cV\n# -----END PGP SIGNATURE-----\n# gpg: Signature made Mon 06 May 2024 04:40:07 AM PDT\n# gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F\n# gpg: issuer \"mark.cave-ayland@ilande.co.uk\"\n# gpg: Good signature from \"Mark Cave-Ayland \" [full]\n\n* tag 'qemu-sparc-20240506' of https://github.com/mcayland/qemu:\n target/sparc: Split out do_ms16b\n target/sparc: Fix FPMERGE\n target/sparc: Fix FMULD8*X16\n target/sparc: Fix FMUL8x16A{U,L}\n target/sparc: Fix FMUL8x16\n target/sparc: Fix FEXPAND\n linux-user/sparc: Add more hwcap bits for sparc64\n hw/sparc64: set iommu_platform=on for virtio devices attached to the sun4u machine\n docs/about: Deprecate the old \"UltraSparc\" CPU names that contain a \"+\"\n docs/system/target-sparc: Improve the Sparc documentation\n target/sparc/cpu: Avoid spaces by default in the CPU names\n target/sparc/cpu: Rename the CPU models with a \"+\" in their names\n\nSigned-off-by: Richard Henderson ","shortMessageHtmlLink":"Merge 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names\n\nSigned-off-by: Richard Henderson ","shortMessageHtmlLink":"Merge tag 'qemu-sparc-20240506' of https://github.com/mcayland/qemu i…"}},{"before":"248f6f62df073a3b4158fd0093863ab885feabb5","after":"d4c453f64824bbeec56c7e72aa83019a7db70d9e","ref":"refs/heads/master","pushedAt":"2024-05-06T17:17:30.000Z","pushType":"push","commitsCount":63,"pusher":{"login":"stsquad","name":"Alex Bennée","path":"/stsquad","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/22458?s=80&v=4"},"commit":{"message":"Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging\n\n* target/i386: Introduce SapphireRapids-v3 to add missing features\n* switch boards to \"default y\"\n* allow building emulators without any board\n* configs: list \"implied\" device groups in the default configs\n* remove unnecessary declarations from typedefs.h\n* target/i386: Give IRQs a chance when resetting HF_INHIBIT_IRQ_MASK\n\n# -----BEGIN PGP SIGNATURE-----\n#\n# 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kvm-all.c\n pci: remove some types from typedefs.h\n tcg: remove CPU* types from typedefs.h\n display: remove GraphicHwOps from typedefs.h\n qapi/machine: remove types from typedefs.h\n monitor: remove MonitorDef from typedefs.h\n migration: remove PostcopyDiscardState from typedefs.h\n lockable: remove QemuLockable from typedefs.h\n intc: remove PICCommonState from typedefs.h\n qemu-option: remove QemuOpt from typedefs.h\n net: remove AnnounceTimer from typedefs.h\n numa: remove types from typedefs.h\n qdev-core: remove DeviceListener from typedefs.h\n fw_cfg: remove useless declarations from typedefs.h\n build: do not build virtio-vga-gl if virgl/opengl not available\n bitmap: Use g_try_new0/g_new0/g_renew\n target/i386: Introduce SapphireRapids-v3 to add missing features\n docs: document new convention for Kconfig board symbols\n ...\n\nSigned-off-by: Richard Henderson ","shortMessageHtmlLink":"Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into 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SIGNATURE-----\n# gpg: Signature made Fri 03 May 2024 08:11:31 AM PDT\n# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F\n# gpg: issuer \"richard.henderson@linaro.org\"\n# gpg: Good signature from \"Richard Henderson \" [ultimate]\n\n* tag 'pull-misc-20240503' of https://gitlab.com/rth7680/qemu:\n tests/bench: Add bufferiszero-bench\n util/bufferiszero: Add simd acceleration for aarch64\n util/bufferiszero: Simplify test_buffer_is_zero_next_accel\n util/bufferiszero: Introduce biz_accel_fn typedef\n util/bufferiszero: Improve scalar variant\n util/bufferiszero: Optimize SSE2 and AVX2 variants\n util/bufferiszero: Remove useless prefetches\n util/bufferiszero: Reorganize for early test for acceleration\n util/bufferiszero: Remove AVX512 variant\n util/bufferiszero: Remove SSE4.1 variant\n\nSigned-off-by: Richard Henderson ","shortMessageHtmlLink":"Merge tag 'pull-misc-20240503' of https://gitlab.com/rth7680/qemu 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plugins: Use emit_before_op for PLUGIN_GEN_FROM_TB\n plugins: Use emit_before_op for PLUGIN_GEN_AFTER_INSN\n plugins: Create TCGHelperInfo for all out-of-line callbacks\n plugins: Move function pointer in qemu_plugin_dyn_cb\n plugins: Zero new qemu_plugin_dyn_cb entries\n tcg: Pass function pointer to tcg_gen_call*\n tcg: Make tcg/helper-info.h self-contained\n\nSigned-off-by: Richard Henderson ","shortMessageHtmlLink":"Merge tag 'pull-tcg-20240501' of https://gitlab.com/rth7680/qemu into…"}},{"before":"935da8c66e12796510cf2ab2978934c273999f3b","after":"4977ce198d2390bff8c71ad5cb1a5f6aa24b56fb","ref":"refs/heads/staging","pushedAt":"2024-05-01T22:21:04.000Z","pushType":"push","commitsCount":21,"pusher":{"login":"stsquad","name":"Alex Bennée","path":"/stsquad","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/22458?s=80&v=4"},"commit":{"message":"Merge tag 'pull-tcg-20240501' of https://gitlab.com/rth7680/qemu into staging\n\nplugins: Rewrite plugin tcg expansion\n\n# -----BEGIN PGP SIGNATURE-----\n#\n# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmYyUpkdHHJpY2hhcmQu\n# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV98VAgAoTqIWPHtPJOS800G\n# TlFuQjkEzQCPSKAh6ZbotsAMvfNwBloPpdrUlFr/jT7mURjEl2B7UC/4LzdhuGeQ\n# U/xZt5rXsYvyfS3VwLf8pKBIscF7XjJ1rdfYMvBg9XaNp5VV0aEIk3+6P0uYtzXG\n# cREF0uCYfdK6uoiuifhqRAkgrNnamdwpPbbfvzDQI13wICW7SfR7dcd629clVZ1O\n# QvD1M4bpTWyhClbZzaoHqyPs+HQEM/AY0wOTfYZNbQBu6zFZXNDZCvYhIEWonPBO\n# AKe5KWUrQMwLJhRVejaSSZZDjMdcz3HLaGJppP89/WB+gpY09+LsiuqT7k5c12Bw\n# ueLEhw==\n# =mn63\n# -----END PGP SIGNATURE-----\n# gpg: Signature made Wed 01 May 2024 07:32:57 AM PDT\n# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F\n# gpg: issuer \"richard.henderson@linaro.org\"\n# gpg: Good signature from \"Richard Henderson \" [ultimate]\n\n* tag 'pull-tcg-20240501' of https://gitlab.com/rth7680/qemu:\n plugins: Update the documentation block for plugin-gen.c\n plugins: Inline plugin_gen_empty_callback\n plugins: Merge qemu_plugin_tb_insn_get to plugin-gen.c\n plugins: Split out common cb expanders\n plugins: Replace pr_ops with a proper debug dump flag\n plugins: Introduce PLUGIN_CB_MEM_REGULAR\n plugins: Simplify callback queues\n tcg: Remove INDEX_op_plugin_cb_{start,end}\n tcg: Remove TCG_CALL_PLUGIN\n plugins: Remove plugin helpers\n plugins: Use emit_before_op for PLUGIN_GEN_FROM_MEM\n plugins: Use emit_before_op for PLUGIN_GEN_FROM_INSN\n plugins: Add PLUGIN_GEN_AFTER_TB\n plugins: Use emit_before_op for PLUGIN_GEN_FROM_TB\n plugins: Use emit_before_op for PLUGIN_GEN_AFTER_INSN\n plugins: Create TCGHelperInfo for all out-of-line callbacks\n plugins: Move function pointer in qemu_plugin_dyn_cb\n plugins: Zero new qemu_plugin_dyn_cb entries\n tcg: Pass function pointer to tcg_gen_call*\n tcg: Make tcg/helper-info.h self-contained\n\nSigned-off-by: Richard Henderson ","shortMessageHtmlLink":"Merge tag 'pull-tcg-20240501' of https://gitlab.com/rth7680/qemu into…"}},{"before":"9c6c079bc6723da8061ccfb44361d67b1dd785dd","after":"935da8c66e12796510cf2ab2978934c273999f3b","ref":"refs/heads/master","pushedAt":"2024-05-01T22:14:42.000Z","pushType":"push","commitsCount":12,"pusher":{"login":"stsquad","name":"Alex Bennée","path":"/stsquad","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/22458?s=80&v=4"},"commit":{"message":"Merge tag 'pull-ufs-20240429' of https://gitlab.com/jeuk20.kim/qemu into staging\n\nufs queue\n\n# -----BEGIN PGP SIGNATURE-----\n#\n# iQIzBAABCgAdFiEEUBfYMVl8eKPZB+73EuIgTA5dtgIFAmYvEScACgkQEuIgTA5d\n# tgL3Qg//R3IcISQqqDaJ/ySzKGmkyohJSc6ySLYvla4Aki7PV+um2Dx/XNS7uG2b\n# d3Qz4m6QaOKsocLfldRTn2FxVK238Rp5HNny5vc0kGRdwpR514B7aU0FhpT7qObS\n# wbbgRdDddIBIiCFLhtXtg5/TK2h32VxGrVI6llX4gmd2VzqM0e4xeG1Oj8rZseOY\n# SAgvDv68s1YwlO1p1vPvst/H+mUKYkqtPN1mjfCIn5tM6ss8kCLUnKjqGAg1BnSN\n# xwaGrqqOlzQK2+aV02eiItiow8evU/h+c9eiTnBo/EvBwjoBn6flNXABWXFENnmP\n# JjVIFeiNzSFhBPDzO23GXviuEt96j5lrcGYR48HYMZfEbJNpblXzWvEGMZWnXNgx\n# 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","shortMessageHtmlLink":"Merge tag 'pull-ufs-20240429' of https://gitlab.com/jeuk20.kim/qemu i…"}},{"before":"e79b15350ef613efdfa5067d07534c6a82a78a06","after":"9c6c079bc6723da8061ccfb44361d67b1dd785dd","ref":"refs/heads/staging","pushedAt":"2024-05-01T02:38:14.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"stsquad","name":"Alex Bennée","path":"/stsquad","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/22458?s=80&v=4"},"commit":{"message":"Merge tag 'pull-target-arm-20240430' of https://git.linaro.org/people/pmaydell/qemu-arm into staging\n\ntarget-arm queue:\n * hw/core/clock: allow clock_propagate on child clocks\n * hvf: arm: Remove unused PL1_WRITE_MASK define\n * target/arm: Restrict translation disabled alignment check to VMSA\n * docs/system/arm/emulation.rst: Add missing implemented features\n * target/arm: Enable FEAT_CSV2_3, FEAT_ETS2, FEAT_Spec_FPACC for 'max'\n * tests/avocado: update sunxi kernel from armbian to 6.6.16\n * target/arm: Make new CPUs default to 1GHz generic timer\n * hw/dmax/xlnx_dpdma: fix handling of address_extension descriptor fields\n * hw/char/stm32l4x5_usart: Fix memory corruption by adding correct class_size\n * hw/arm/npcm7xx: Store derivative OTP fuse key in little endian\n * hw/arm: Add DM163 display to B-L475E-IOT01A board\n\n# -----BEGIN PGP SIGNATURE-----\n#\n# iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmYxILcZHHBldGVyLm1h\n# eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3pRzD/40UZrhNbS+FEANkXJ7qpUm\n# giCKn8hVwteWY4T4LugUK9987lU0HZ7CGfsHoSaWNwa7RBdKUoDRqi/CQ1kCfeDO\n# XET42do+6SJhak+4wmzEfYD+K7wnlauun0/dyqCjd2+JP0bln/MIY5r8JCN1GiYS\n# YSAAKoZqAfG1bC3HmxELI9min09GPT+tzw0PAyVJipRtfE+ykZXoCytu0GWU5jB+\n# VBI6SGmqMPd/c/7JfJV8KP8R0Mn3etA3hbOCx7YDL6cUmbepWtNPV8dLeTwofrpa\n# 01uqN83PpbbSYr96QdXXa7Ov105hQH7e8jmr9+7jTpd3f9U7+GwsxxqDR1KDHLgn\n# pUGZneoTDTkJugfXM28A0VoVB3eyJYPCLE9QQ/HXpChXc62NOQV5jcECgLiUDujH\n# hVbeGEG0KViQlhMUfI3vIfTaIjEALDcNw5bxVUCqg8vdO6UtTXqqWdaS4Xgne8HB\n# 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hw/char/stm32l4x5_usart: Fix memory corruption by adding correct class_size\n hw/dmax/xlnx_dpdma: fix handling of address_extension descriptor fields\n target/arm: Default to 1GHz cntfrq for 'max' and new CPUs\n hw/watchdog/sbsa_gwdt: Make watchdog timer frequency a QOM property\n hw/arm/sbsa-ref: Force CPU generic timer to 62.5MHz\n target/arm: Refactor default generic timer frequency handling\n tests/avocado: update sunxi kernel from armbian to 6.6.16\n target/arm: Enable FEAT_Spec_FPACC for -cpu max\n target/arm: Implement ID_AA64MMFR3_EL1\n target/arm: Enable FEAT_ETS2 for -cpu max\n target/arm: Enable FEAT_CSV2_3 for -cpu max\n docs/system/arm/emulation.rst: Add missing implemented features\n target/arm: Restrict translation disabled alignment check to VMSA\n hvf: arm: Remove PL1_WRITE_MASK\n ...\n\nSigned-off-by: Richard Henderson ","shortMessageHtmlLink":"Merge tag 'pull-target-arm-20240430' of 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","shortMessageHtmlLink":"Merge tag 'pull-ufs-20240429' of https://gitlab.com/jeuk20.kim/qemu i…"}},{"before":"de7e907d011cf12805b80150a81470ff7c8b5d44","after":"9c6c079bc6723da8061ccfb44361d67b1dd785dd","ref":"refs/heads/master","pushedAt":"2024-04-30T22:57:13.000Z","pushType":"push","commitsCount":42,"pusher":{"login":"stsquad","name":"Alex Bennée","path":"/stsquad","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/22458?s=80&v=4"},"commit":{"message":"Merge tag 'pull-target-arm-20240430' of https://git.linaro.org/people/pmaydell/qemu-arm into staging\n\ntarget-arm queue:\n * hw/core/clock: allow clock_propagate on child clocks\n * hvf: arm: Remove unused PL1_WRITE_MASK define\n * target/arm: Restrict translation disabled alignment check to VMSA\n * docs/system/arm/emulation.rst: Add missing implemented features\n * target/arm: Enable FEAT_CSV2_3, FEAT_ETS2, FEAT_Spec_FPACC for 'max'\n * tests/avocado: update sunxi kernel from armbian to 6.6.16\n * target/arm: Make new CPUs default to 1GHz generic timer\n * hw/dmax/xlnx_dpdma: fix handling of address_extension descriptor fields\n * hw/char/stm32l4x5_usart: Fix memory corruption by adding correct class_size\n * hw/arm/npcm7xx: Store derivative OTP fuse key in little endian\n * hw/arm: Add DM163 display to B-L475E-IOT01A board\n\n# -----BEGIN PGP SIGNATURE-----\n#\n# iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmYxILcZHHBldGVyLm1h\n# eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3pRzD/40UZrhNbS+FEANkXJ7qpUm\n# giCKn8hVwteWY4T4LugUK9987lU0HZ7CGfsHoSaWNwa7RBdKUoDRqi/CQ1kCfeDO\n# XET42do+6SJhak+4wmzEfYD+K7wnlauun0/dyqCjd2+JP0bln/MIY5r8JCN1GiYS\n# YSAAKoZqAfG1bC3HmxELI9min09GPT+tzw0PAyVJipRtfE+ykZXoCytu0GWU5jB+\n# VBI6SGmqMPd/c/7JfJV8KP8R0Mn3etA3hbOCx7YDL6cUmbepWtNPV8dLeTwofrpa\n# 01uqN83PpbbSYr96QdXXa7Ov105hQH7e8jmr9+7jTpd3f9U7+GwsxxqDR1KDHLgn\n# pUGZneoTDTkJugfXM28A0VoVB3eyJYPCLE9QQ/HXpChXc62NOQV5jcECgLiUDujH\n# hVbeGEG0KViQlhMUfI3vIfTaIjEALDcNw5bxVUCqg8vdO6UtTXqqWdaS4Xgne8HB\n# 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hw/char/stm32l4x5_usart: Fix memory corruption by adding correct class_size\n hw/dmax/xlnx_dpdma: fix handling of address_extension descriptor fields\n target/arm: Default to 1GHz cntfrq for 'max' and new CPUs\n hw/watchdog/sbsa_gwdt: Make watchdog timer frequency a QOM property\n hw/arm/sbsa-ref: Force CPU generic timer to 62.5MHz\n target/arm: Refactor default generic timer frequency handling\n tests/avocado: update sunxi kernel from armbian to 6.6.16\n target/arm: Enable FEAT_Spec_FPACC for -cpu max\n target/arm: Implement ID_AA64MMFR3_EL1\n target/arm: Enable FEAT_ETS2 for -cpu max\n target/arm: Enable FEAT_CSV2_3 for -cpu max\n docs/system/arm/emulation.rst: Add missing implemented features\n target/arm: Restrict translation disabled alignment check to VMSA\n hvf: arm: Remove PL1_WRITE_MASK\n ...\n\nSigned-off-by: Richard Henderson ","shortMessageHtmlLink":"Merge tag 'pull-target-arm-20240430' of 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handling of address_extension descriptor fields\n * hw/char/stm32l4x5_usart: Fix memory corruption by adding correct class_size\n * hw/arm/npcm7xx: Store derivative OTP fuse key in little endian\n * hw/arm: Add DM163 display to B-L475E-IOT01A board\n\n# -----BEGIN PGP SIGNATURE-----\n#\n# iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmYxILcZHHBldGVyLm1h\n# eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3pRzD/40UZrhNbS+FEANkXJ7qpUm\n# giCKn8hVwteWY4T4LugUK9987lU0HZ7CGfsHoSaWNwa7RBdKUoDRqi/CQ1kCfeDO\n# XET42do+6SJhak+4wmzEfYD+K7wnlauun0/dyqCjd2+JP0bln/MIY5r8JCN1GiYS\n# YSAAKoZqAfG1bC3HmxELI9min09GPT+tzw0PAyVJipRtfE+ykZXoCytu0GWU5jB+\n# VBI6SGmqMPd/c/7JfJV8KP8R0Mn3etA3hbOCx7YDL6cUmbepWtNPV8dLeTwofrpa\n# 01uqN83PpbbSYr96QdXXa7Ov105hQH7e8jmr9+7jTpd3f9U7+GwsxxqDR1KDHLgn\n# pUGZneoTDTkJugfXM28A0VoVB3eyJYPCLE9QQ/HXpChXc62NOQV5jcECgLiUDujH\n# hVbeGEG0KViQlhMUfI3vIfTaIjEALDcNw5bxVUCqg8vdO6UtTXqqWdaS4Xgne8HB\n# KeCu5xXngXEZjIgidZkmIC15FD60B19JdQz2WR+6BDCw8Ajm9iPWlj+ftZztuX/S\n# cFSUZ05BPbTkBzAHG4GBvjXTdwsxX2acGBNtdETOQAxhkoRcug0Pn+BmrZQLqkm5\n# mPKPW9FFxIkkgeK/ZdA4uIEwDZX/LQlnrX129XGt7DVr+yDNKekaVGfLL8x8alT1\n# 3v0Ni/nntc6QtZDB88OIzA==\n# =vAf/\n# -----END PGP SIGNATURE-----\n# gpg: Signature made Tue 30 Apr 2024 09:47:51 AM PDT\n# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE\n# gpg: issuer \"peter.maydell@linaro.org\"\n# gpg: Good signature from \"Peter Maydell \" [full]\n# gpg: aka \"Peter Maydell \" [full]\n# gpg: aka \"Peter Maydell \" [full]\n# gpg: aka \"Peter Maydell \" [unknown]\n\n* tag 'pull-target-arm-20240430' of https://git.linaro.org/people/pmaydell/qemu-arm: (21 commits)\n tests/qtest : Add testcase for DM163\n hw/arm : Connect DM163 to B-L475E-IOT01A\n hw/arm : Create Bl475eMachineState\n hw/arm : Pass STM32L4x5 SYSCFG gpios to STM32L4x5 SoC\n hw/display : Add device DM163\n hw/arm/npcm7xx: Store derivative OTP fuse key in little endian\n hw/char/stm32l4x5_usart: Fix memory corruption by adding correct class_size\n hw/dmax/xlnx_dpdma: fix handling of address_extension descriptor fields\n target/arm: Default to 1GHz cntfrq for 'max' and new CPUs\n hw/watchdog/sbsa_gwdt: Make watchdog timer frequency a QOM property\n hw/arm/sbsa-ref: Force CPU generic timer to 62.5MHz\n target/arm: Refactor default generic timer frequency handling\n tests/avocado: update sunxi kernel from armbian to 6.6.16\n target/arm: Enable FEAT_Spec_FPACC for -cpu max\n target/arm: Implement ID_AA64MMFR3_EL1\n target/arm: Enable FEAT_ETS2 for -cpu max\n target/arm: Enable FEAT_CSV2_3 for -cpu max\n docs/system/arm/emulation.rst: Add missing implemented features\n target/arm: Restrict translation disabled alignment check to VMSA\n hvf: arm: Remove PL1_WRITE_MASK\n ...\n\nSigned-off-by: Richard Henderson ","shortMessageHtmlLink":"Merge tag 'pull-target-arm-20240430' of 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B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF\n# gpg: Good signature from \"Song Gao \" [unknown]\n# gpg: WARNING: This key is not certified with a trusted signature!\n# gpg: There is no indication that the signature belongs to the owner.\n# Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF\n\n* tag 'pull-loongarch-20240429' of https://gitlab.com/gaosong/qemu:\n hw/loongarch: Add cells missing from rtc node\n hw/loongarch: Add cells missing from uart node\n hw/loongarch: fdt remove unused irqchip node\n hw/loongarch: fdt adds pcie irq_map node\n hw/loongarch: fdt adds pch_msi Controller\n hw/loongarch: fdt adds pch_pic Controller\n hw/loongarch: fdt adds Extend I/O Interrupt Controller\n hw/loongarch: fdt adds cpu interrupt controller node\n hw/loongarch: Fix fdt memory node wrong 'reg'\n hw/loongarch: Init efi_fdt table\n hw/loongarch: Init efi_initrd table\n hw/loongarch: Init efi_boot_memmap table\n hw/loongarch: Init efi_system_table\n hw/loongarch: Add init_cmdline\n hw/loongarch: Add slave cpu boot_code\n hw/loongarch: Add load initrd\n hw/loongarch: Move boot functions to boot.c\n\nSigned-off-by: Richard Henderson ","shortMessageHtmlLink":"Merge tag 'pull-loongarch-20240429' of https://gitlab.com/gaosong/qemu …"}},{"before":"2358f1b60f73287fe606c7ff48043b4f9e1c2d0f","after":"de7e907d011cf12805b80150a81470ff7c8b5d44","ref":"refs/heads/staging","pushedAt":"2024-04-30T14:22:24.000Z","pushType":"push","commitsCount":18,"pusher":{"login":"stsquad","name":"Alex Bennée","path":"/stsquad","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/22458?s=80&v=4"},"commit":{"message":"Merge tag 'pull-loongarch-20240429' of https://gitlab.com/gaosong/qemu into staging\n\nAdd boot LoongArch elf kernel with FDT\n\nv2: Fix 'make check-tcg' fail.\n\n# -----BEGIN PGP SIGNATURE-----\n#\n# iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZi8F3AAKCRBAov/yOSY+\n# 35VrBADb6f1mYNUTG5iDvKppvA8RG1TybxfXfgA+Z9vPkJqFkT6wt8J+JFwgh3UT\n# w0xY2Y2xZkPjxnUpEhZiVJjp5hk+BEzr3vE4M5DzKC1vpCYpbojxxN6FB41Up862\n# kS7slW6XsZgKpLLvUkFttPt3G4DUN29CscVgy4Ci0zrqyNjnsw==\n# =ufbc\n# -----END PGP SIGNATURE-----\n# gpg: Signature made Sun 28 Apr 2024 07:28:44 PM PDT\n# gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF\n# gpg: Good signature from \"Song Gao \" [unknown]\n# gpg: WARNING: This key is not certified with a trusted signature!\n# gpg: There is no indication that the signature belongs to the owner.\n# Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF\n\n* tag 'pull-loongarch-20240429' of https://gitlab.com/gaosong/qemu:\n hw/loongarch: Add cells missing from rtc node\n hw/loongarch: Add cells missing from uart node\n hw/loongarch: fdt remove unused irqchip node\n hw/loongarch: fdt adds pcie irq_map node\n hw/loongarch: fdt adds pch_msi Controller\n hw/loongarch: fdt adds pch_pic Controller\n hw/loongarch: fdt adds Extend I/O Interrupt Controller\n hw/loongarch: fdt adds cpu interrupt controller node\n hw/loongarch: Fix fdt memory node wrong 'reg'\n hw/loongarch: Init efi_fdt table\n hw/loongarch: Init efi_initrd table\n hw/loongarch: Init efi_boot_memmap table\n hw/loongarch: Init efi_system_table\n hw/loongarch: Add init_cmdline\n hw/loongarch: Add slave cpu boot_code\n hw/loongarch: Add load initrd\n hw/loongarch: Move boot functions to boot.c\n\nSigned-off-by: Richard Henderson ","shortMessageHtmlLink":"Merge tag 'pull-loongarch-20240429' of https://gitlab.com/gaosong/qemu …"}},{"before":"5fee33d97a7f2e95716417bd164f2f5264acd976","after":"2358f1b60f73287fe606c7ff48043b4f9e1c2d0f","ref":"refs/heads/master","pushedAt":"2024-04-30T14:13:22.000Z","pushType":"push","commitsCount":10,"pusher":{"login":"stsquad","name":"Alex Bennée","path":"/stsquad","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/22458?s=80&v=4"},"commit":{"message":"Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging\n\ntrivial patches for 2024-04-29\n\n# -----BEGIN PGP SIGNATURE-----\n#\n# iQEzBAABCAAdFiEEe3O61ovnosKJMUsicBtPaxppPlkFAmYvknIACgkQcBtPaxpp\n# Pln8ywf+LthaeFDBccSYDKE+bu0zGshog5wBvlD6PHH7+e/tL6y5rKBmoC8aa2Pv\n# 9Op57otEGAjOviLwFh+Xm78B6SwTweFwDlRsLDhzZUyVWMV6RqfPQ2Ix2rTGncCZ\n# t7hpHwnDqtHPkwqqEdXzNC6tlL5wjTlZLOK8osCpUz7Ji4Iqt79KaxGiuEjdHovb\n# DBTOzC1DbfmCEWf7UcoBFsoQLHhYwnasAC+obEGD2ahiIfetyqOwaS0QrpWiw/47\n# fl4sfuFgI2n56AdEtD7PNDiHZaCJ7ZnvlAz4wXu4veqdefgKNi2vlBXKNc0DokNK\n# pHaBsEnFswjVsz5w2ynQRH+i3hMzWg==\n# =rRV+\n# -----END PGP SIGNATURE-----\n# gpg: Signature made Mon 29 Apr 2024 05:28:34 AM PDT\n# gpg: using RSA key 7B73BAD68BE7A2C289314B22701B4F6B1A693E59\n# gpg: Good signature from \"Michael Tokarev \" [full]\n# gpg: aka \"Michael Tokarev \" [full]\n# gpg: aka \"Michael Tokarev \" [full]\n\n* tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu:\n checkpatch.pl: forbid strerrorname_np()\n target/riscv/kvm: remove sneaky strerrorname_np() instance\n target/loongarch/cpu.c: typo fix: expection\n backends/cryptodev-builtin: Fix local_error leaks\n scripts/checkpatch: Do not use mailmap\n scripts/checkpatch: Avoid author email mangled by qemu-*@nongnu.org\n target/ppc/cpu_init: Remove \"PowerPC\" prefix from the CPU list\n target/s390x/cpu_models: Rework the output of \"-cpu help\"\n target/i386/cpu: Remove \"x86\" prefix from the CPU list\n\nSigned-off-by: Richard Henderson ","shortMessageHtmlLink":"Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu int…"}},{"before":"5fee33d97a7f2e95716417bd164f2f5264acd976","after":"2358f1b60f73287fe606c7ff48043b4f9e1c2d0f","ref":"refs/heads/staging","pushedAt":"2024-04-30T00:20:00.000Z","pushType":"push","commitsCount":10,"pusher":{"login":"stsquad","name":"Alex Bennée","path":"/stsquad","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/22458?s=80&v=4"},"commit":{"message":"Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging\n\ntrivial patches for 2024-04-29\n\n# -----BEGIN PGP SIGNATURE-----\n#\n# iQEzBAABCAAdFiEEe3O61ovnosKJMUsicBtPaxppPlkFAmYvknIACgkQcBtPaxpp\n# Pln8ywf+LthaeFDBccSYDKE+bu0zGshog5wBvlD6PHH7+e/tL6y5rKBmoC8aa2Pv\n# 9Op57otEGAjOviLwFh+Xm78B6SwTweFwDlRsLDhzZUyVWMV6RqfPQ2Ix2rTGncCZ\n# t7hpHwnDqtHPkwqqEdXzNC6tlL5wjTlZLOK8osCpUz7Ji4Iqt79KaxGiuEjdHovb\n# DBTOzC1DbfmCEWf7UcoBFsoQLHhYwnasAC+obEGD2ahiIfetyqOwaS0QrpWiw/47\n# fl4sfuFgI2n56AdEtD7PNDiHZaCJ7ZnvlAz4wXu4veqdefgKNi2vlBXKNc0DokNK\n# pHaBsEnFswjVsz5w2ynQRH+i3hMzWg==\n# =rRV+\n# -----END PGP SIGNATURE-----\n# gpg: Signature made Mon 29 Apr 2024 05:28:34 AM PDT\n# gpg: using RSA key 7B73BAD68BE7A2C289314B22701B4F6B1A693E59\n# gpg: Good signature from \"Michael Tokarev \" [full]\n# gpg: aka \"Michael Tokarev \" [full]\n# gpg: aka \"Michael Tokarev \" [full]\n\n* tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu:\n checkpatch.pl: forbid strerrorname_np()\n target/riscv/kvm: remove sneaky strerrorname_np() instance\n target/loongarch/cpu.c: typo fix: expection\n backends/cryptodev-builtin: Fix local_error leaks\n scripts/checkpatch: Do not use mailmap\n scripts/checkpatch: Avoid author email mangled by qemu-*@nongnu.org\n target/ppc/cpu_init: Remove \"PowerPC\" prefix from the CPU list\n target/s390x/cpu_models: Rework the output of \"-cpu help\"\n target/i386/cpu: Remove \"x86\" prefix from the CPU list\n\nSigned-off-by: Richard Henderson ","shortMessageHtmlLink":"Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu int…"}},{"before":"fd87be1dada5672f877e03c2ca8504458292c479","after":"5fee33d97a7f2e95716417bd164f2f5264acd976","ref":"refs/heads/master","pushedAt":"2024-04-30T00:07:18.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"stsquad","name":"Alex Bennée","path":"/stsquad","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/22458?s=80&v=4"},"commit":{"message":"Merge tag 'samuel-thibault' of https://people.debian.org/~sthibault/qemu into staging\n\nslirp: Use newer slirp_*_hostxfwd API\n\nNicholas Ngai (1):\n net/slirp: Use newer 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AA92EBBDF0148AA61A43B8AEE4894CAC45414BB0\n# gpg: Good signature from \"Samuel Thibault \" [undefined]\n# gpg: aka \"Samuel Thibault \" [undefined]\n# gpg: aka \"Samuel Thibault \" [unknown]\n# gpg: aka \"Samuel Thibault \" [undefined]\n# gpg: aka \"Samuel Thibault \" [undefined]\n# gpg: aka \"Samuel Thibault \" [unknown]\n# gpg: aka \"Samuel Thibault \" [unknown]\n# gpg: aka \"Samuel Thibault \" [unknown]\n# gpg: WARNING: This key is not certified with a trusted signature!\n# gpg: There is no indication that the signature belongs to the owner.\n# Primary key fingerprint: 900C B024 B679 31D4 0F82 304B D017 8C76 7D06 9EE6\n# Subkey fingerprint: AA92 EBBD F014 8AA6 1A43 B8AE E489 4CAC 4541 4BB0\n\n* tag 'samuel-thibault' of https://people.debian.org/~sthibault/qemu:\n net/slirp: Use newer slirp_*_hostxfwd API\n\nSigned-off-by: Richard Henderson ","shortMessageHtmlLink":"Merge tag 'samuel-thibault' of https://people.debian.org/~sthibault/qemu"}},{"before":"fd87be1dada5672f877e03c2ca8504458292c479","after":"5fee33d97a7f2e95716417bd164f2f5264acd976","ref":"refs/heads/staging","pushedAt":"2024-04-29T21:34:47.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"stsquad","name":"Alex Bennée","path":"/stsquad","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/22458?s=80&v=4"},"commit":{"message":"Merge tag 'samuel-thibault' of https://people.debian.org/~sthibault/qemu into staging\n\nslirp: Use newer slirp_*_hostxfwd API\n\nNicholas Ngai (1):\n net/slirp: Use newer slirp_*_hostxfwd API\n\n# -----BEGIN PGP SIGNATURE-----\n#\n# iQIzBAABCgAdFiEEqpLrvfAUiqYaQ7iu5IlMrEVBS7AFAmYu5OgACgkQ5IlMrEVB\n# S7DGOQ//cnW2fiXnj+ijmQ4+h8Yj2vCtGZ9+7D74Q6KSbY0AkYVhRm+qWJA1XJrR\n# Y7JvetqKGCxhol24x0aopDvcybIDU/EqFrxhmZY+dJhZWxfsvYpLGJ5TfulRA1gy\n# PSDYQi6LlwDJyQT08po2TLA0zSOmxycdrA8mTJuf8UHDiXnwcy9WjDFF1tCrGoN4\n# LgvsUUpQ6y9fZQxbFyPFwtHkUeREvfhRPT0c5lNsF0Cot8uXt5YOyCc0XKjX1d0F\n# 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WARNING: This key is not certified with a trusted signature!\n# gpg: There is no indication that the signature belongs to the owner.\n# Primary key fingerprint: 900C B024 B679 31D4 0F82 304B D017 8C76 7D06 9EE6\n# Subkey fingerprint: AA92 EBBD F014 8AA6 1A43 B8AE E489 4CAC 4541 4BB0\n\n* tag 'samuel-thibault' of https://people.debian.org/~sthibault/qemu:\n net/slirp: Use newer slirp_*_hostxfwd API\n\nSigned-off-by: Richard Henderson ","shortMessageHtmlLink":"Merge tag 'samuel-thibault' of https://people.debian.org/~sthibault/qemu"}},{"before":"294c92efc210d4762db68dc368960574489daf0a","after":"fd87be1dada5672f877e03c2ca8504458292c479","ref":"refs/heads/staging","pushedAt":"2024-04-29T18:21:04.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"stsquad","name":"Alex Bennée","path":"/stsquad","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/22458?s=80&v=4"},"commit":{"message":"Merge tag 'accel-20240426' of https://github.com/philmd/qemu into staging\n\nAccelerators patches\n\nA lot of trivial cleanups and simplifications (moving methods around,\nadding/removing #include statements). Most notable changes:\n\n- Rename NEED_CPU_H -> COMPILING_PER_TARGET\n- Rename few template headers using the '.h.inc' suffix\n- Extract some definitions / declarations into their own header:\n - accel/tcg/user-retaddr.h (helper_retaddr)\n - include/exec/abi_ptr.h (abi_ptr)\n - include/exec/breakpoint.h (CPUBreakpoint, CPUWatchpoint)\n - include/exec/mmu-access-type.h (MMUAccessType)\n - include/user/tswap-target.h (tswapl, bswaptls)\n\n# -----BEGIN PGP SIGNATURE-----\n#\n# iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmYsAuEACgkQ4+MsLN6t\n# wN78Rg//V9UoE0U9Lh6Sd2WpcSAYP9D1CBa+iGXhrmel0utER1sQLu022nvcLdHc\n# XtCgtX3H0yECF8dPX02rVp8IbSlOv3c8N/a6BxD79cRGqgXBYR/dEUqfXqeLJn3l\n# a58YU3i7sLNQ0l7VnwTiBnI0lw170/xJl2B2mcR1SvWuH3dr5vTeIXNureu36ORo\n# rc0oqWHbw1Pyyn8ADE2kPyFCOiwPwvcOvAk8dXGfib+mNCwNVV+ZUtAPi711VD8d\n# 9VW2gu2sXwnWdpROrSugSw+aPVF4UjltL9qJEl5bxoqWFmlET1Zn2NpKvsocUXmh\n# CMQQS2Tr4LpaaVQJGxx0yUe0B65X5+gCkIhsMOubED7GRyTCjrkOPm6exz3ge6WV\n# YmIboggFAk3OjAzLs7yZVkWsTK1Y3+3eX0u7AWPUsUu7rCT/Toc6QxDS7eT2hJfq\n# UDXI355PGbImgiArQa+OsT7v1Le4/iQa+TfN4fdUDpxEdfaxhnijWh+E91CEp+w/\n# Mq7db9Z1aMnhFKIKdkPYyfwB74yXQrmYchJ0QojZjbzqNGwkt9VeC7O9RcYjEaHM\n# hMIexwccxexqGH22wn8vPd6ZVKtiLaG4AXO0v6Dn2YJ7/zb/ntcI6lRZqdBAHKNK\n# MzkjTRRRR0wAfu8Lk8CaNNEqUP4Po43fbYymo6AZhIR8NqfApL0=\n# =ifBx\n# -----END PGP SIGNATURE-----\n# gpg: Signature made Fri 26 Apr 2024 12:39:13 PM PDT\n# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE\n# gpg: Good signature from \"Philippe Mathieu-Daudé (F4BUG) \" [full]\n\n* tag 'accel-20240426' of https://github.com/philmd/qemu: (38 commits)\n plugins: Include missing 'qemu/bitmap.h' header\n hw/core: Avoid including the full 'hw/core/cpu.h' in 'tcg-cpu-ops.h'\n exec: Move CPUTLBEntry helpers to cputlb.c\n exec: Restrict inclusion of 'user/guest-base.h'\n exec: Rename 'exec/user/guest-base.h' as 'user/guest-base.h'\n exec: Restrict 'cpu_ldst.h' to TCG accelerator\n exec: Restrict TCG specific declarations of 'cputlb.h'\n exec: Declare CPUBreakpoint/CPUWatchpoint type in 'breakpoint.h' header\n exec: Declare MMUAccessType type in 'mmu-access-type.h' header\n exec: Declare abi_ptr type in its own 'abi_ptr.h' header\n exec/user: Do not include 'cpu.h' in 'abitypes.h'\n exec: Move [b]tswapl() declarations to 'exec/user/tswap-target.h'\n exec: Declare target_words_bigendian() in 'exec/tswap.h'\n exec/cpu-all: Remove unused tswapls() definitions\n exec/cpu-all: Remove unused 'qemu/thread.h' header\n exec/cpu-all: Reduce 'qemu/rcu.h' header inclusion\n accel/hvf: Use accel-specific per-vcpu @dirty field\n accel/nvmm: Use accel-specific per-vcpu @dirty field\n accel/whpx: Use accel-specific per-vcpu @dirty field\n accel/tcg: Rename helper-head.h -> helper-head.h.inc\n ...\n\nSigned-off-by: Richard Henderson ","shortMessageHtmlLink":"Merge tag 'accel-20240426' of https://github.com/philmd/qemu into sta…"}}],"hasNextPage":true,"hasPreviousPage":false,"activityType":"all","actor":null,"timePeriod":"all","sort":"DESC","perPage":30,"cursor":"djE6ks8AAAAEQ-O9OQA","startCursor":null,"endCursor":null}},"title":"Activity · qemu/qemu"}