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Hexagon (target/hexagon) Add overrides for disabled idef-parser insns
The following have overrides
S2_insert
S2_insert_rp
S2_asr_r_svw_trun
A2_swiz
These instructions have semantics that write to the destination
before all the operand reads have been completed. Therefore,
the idef-parser versions were disabled with the short-circuit patch.
Test cases added to tests/tcg/hexagon/read_write_overlap.c
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230427230012.3800327-16-tsimpson@quicinc.com>- Loading branch information
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,136 @@ | ||
| /* | ||
| * Copyright(c) 2023 Qualcomm Innovation Center, Inc. All Rights Reserved. | ||
| * | ||
| * This program is free software; you can redistribute it and/or modify | ||
| * it under the terms of the GNU General Public License as published by | ||
| * the Free Software Foundation; either version 2 of the License, or | ||
| * (at your option) any later version. | ||
| * | ||
| * This program is distributed in the hope that it will be useful, | ||
| * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| * GNU General Public License for more details. | ||
| * | ||
| * You should have received a copy of the GNU General Public License | ||
| * along with this program; if not, see <http://www.gnu.org/licenses/>. | ||
| */ | ||
|
|
||
| /* | ||
| * Test instructions where the semantics write to the destination | ||
| * before all the operand reads have been completed. | ||
| * | ||
| * These instructions are problematic when we short-circuit the | ||
| * register writes because the destination and source operands could | ||
| * be the same TCGv. | ||
| * | ||
| * We test by forcing the read and write to be register r7. | ||
| */ | ||
|
|
||
| #include <stdint.h> | ||
| #include <stdlib.h> | ||
| #include <stdio.h> | ||
|
|
||
| int err; | ||
|
|
||
| static void __check(const char *filename, int line, int x, int expect) | ||
| { | ||
| if (x != expect) { | ||
| printf("ERROR %s:%d - 0x%08x != 0x%08x\n", | ||
| filename, line, x, expect); | ||
| err++; | ||
| } | ||
| } | ||
|
|
||
| #define check(x, expect) __check(__FILE__, __LINE__, (x), (expect)) | ||
|
|
||
| #define insert(RES, X, WIDTH, OFFSET) \ | ||
| asm("r7 = %1\n\t" \ | ||
| "r7 = insert(r7, #" #WIDTH ", #" #OFFSET ")\n\t" \ | ||
| "%0 = r7\n\t" \ | ||
| : "=r"(RES) : "r"(X) : "r7") | ||
|
|
||
| static void test_insert(void) | ||
| { | ||
| uint32_t res; | ||
|
|
||
| insert(res, 0x12345678, 8, 1); | ||
| check(res, 0x123456f0); | ||
| insert(res, 0x12345678, 0, 1); | ||
| check(res, 0x12345678); | ||
| insert(res, 0x12345678, 20, 16); | ||
| check(res, 0x56785678); | ||
| } | ||
|
|
||
| static inline uint32_t insert_rp(uint32_t x, uint32_t width, uint32_t offset) | ||
| { | ||
| uint64_t width_offset = (uint64_t)width << 32 | offset; | ||
| uint32_t res; | ||
| asm("r7 = %1\n\t" | ||
| "r7 = insert(r7, %2)\n\t" | ||
| "%0 = r7\n\t" | ||
| : "=r"(res) : "r"(x), "r"(width_offset) : "r7"); | ||
| return res; | ||
|
|
||
| } | ||
|
|
||
| static void test_insert_rp(void) | ||
| { | ||
| check(insert_rp(0x12345678, 8, 1), 0x123456f0); | ||
| check(insert_rp(0x12345678, 63, 8), 0x34567878); | ||
| check(insert_rp(0x12345678, 127, 8), 0x34567878); | ||
| check(insert_rp(0x12345678, 8, 24), 0x78345678); | ||
| check(insert_rp(0x12345678, 8, 63), 0x12345678); | ||
| check(insert_rp(0x12345678, 8, 64), 0x00000000); | ||
| } | ||
|
|
||
| static inline uint32_t asr_r_svw_trun(uint64_t x, uint32_t y) | ||
| { | ||
| uint32_t res; | ||
| asm("r7 = %2\n\t" | ||
| "r7 = vasrw(%1, r7)\n\t" | ||
| "%0 = r7\n\t" | ||
| : "=r"(res) : "r"(x), "r"(y) : "r7"); | ||
| return res; | ||
| } | ||
|
|
||
| static void test_asr_r_svw_trun(void) | ||
| { | ||
| check(asr_r_svw_trun(0x1111111122222222ULL, 5), | ||
| 0x88881111); | ||
| check(asr_r_svw_trun(0x1111111122222222ULL, 63), | ||
| 0x00000000); | ||
| check(asr_r_svw_trun(0x1111111122222222ULL, 64), | ||
| 0x00000000); | ||
| check(asr_r_svw_trun(0x1111111122222222ULL, 127), | ||
| 0x22224444); | ||
| check(asr_r_svw_trun(0x1111111122222222ULL, 128), | ||
| 0x11112222); | ||
| check(asr_r_svw_trun(0xffffffff22222222ULL, 128), | ||
| 0xffff2222); | ||
| } | ||
|
|
||
| static inline uint32_t swiz(uint32_t x) | ||
| { | ||
| uint32_t res; | ||
| asm("r7 = %1\n\t" | ||
| "r7 = swiz(r7)\n\t" | ||
| "%0 = r7\n\t" | ||
| : "=r"(res) : "r"(x) : "r7"); | ||
| return res; | ||
| } | ||
|
|
||
| static void test_swiz(void) | ||
| { | ||
| check(swiz(0x11223344), 0x44332211); | ||
| } | ||
|
|
||
| int main() | ||
| { | ||
| test_insert(); | ||
| test_insert_rp(); | ||
| test_asr_r_svw_trun(); | ||
| test_swiz(); | ||
|
|
||
| puts(err ? "FAIL" : "PASS"); | ||
| return err ? EXIT_FAILURE : EXIT_SUCCESS; | ||
| } |